JP4538209B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP4538209B2
JP4538209B2 JP2003303961A JP2003303961A JP4538209B2 JP 4538209 B2 JP4538209 B2 JP 4538209B2 JP 2003303961 A JP2003303961 A JP 2003303961A JP 2003303961 A JP2003303961 A JP 2003303961A JP 4538209 B2 JP4538209 B2 JP 4538209B2
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JP
Japan
Prior art keywords
resist
etching
gas
plasma
modification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003303961A
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English (en)
Japanese (ja)
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JP2005072518A5 (enExample
JP2005072518A (ja
Inventor
伸幸 根岸
勝 伊澤
賢悦 横川
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Hitachi High Tech Corp
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Hitachi High Technologies Corp
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Publication date
Application filed by Hitachi High Technologies Corp filed Critical Hitachi High Technologies Corp
Priority to JP2003303961A priority Critical patent/JP4538209B2/ja
Priority to US10/924,983 priority patent/US7371690B2/en
Publication of JP2005072518A publication Critical patent/JP2005072518A/ja
Publication of JP2005072518A5 publication Critical patent/JP2005072518A5/ja
Application granted granted Critical
Publication of JP4538209B2 publication Critical patent/JP4538209B2/ja
Anticipated expiration legal-status Critical
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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • H01L21/0276Photolithographic processes using an anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • H01L21/0275Photolithographic processes using lasers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Materials For Photolithography (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2003303961A 2003-08-28 2003-08-28 半導体装置の製造方法 Expired - Fee Related JP4538209B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2003303961A JP4538209B2 (ja) 2003-08-28 2003-08-28 半導体装置の製造方法
US10/924,983 US7371690B2 (en) 2003-08-28 2004-08-25 Dry etching method and apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003303961A JP4538209B2 (ja) 2003-08-28 2003-08-28 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2005072518A JP2005072518A (ja) 2005-03-17
JP2005072518A5 JP2005072518A5 (enExample) 2006-11-09
JP4538209B2 true JP4538209B2 (ja) 2010-09-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003303961A Expired - Fee Related JP4538209B2 (ja) 2003-08-28 2003-08-28 半導体装置の製造方法

Country Status (2)

Country Link
US (1) US7371690B2 (enExample)
JP (1) JP4538209B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
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US12293904B2 (en) 2021-03-04 2025-05-06 Kioxia Corporation Substrate processing apparatus, substrate processing method, gas regeneration system, and gas regeneration method

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JP4723871B2 (ja) * 2004-06-23 2011-07-13 株式会社日立ハイテクノロジーズ ドライエッチング装置
JP4761502B2 (ja) * 2004-10-07 2011-08-31 株式会社アルバック 層間絶縁膜のドライエッチング方法
US7491647B2 (en) * 2005-03-08 2009-02-17 Lam Research Corporation Etch with striation control
US7241683B2 (en) * 2005-03-08 2007-07-10 Lam Research Corporation Stabilized photoresist structure for etching process
US7442649B2 (en) * 2005-03-29 2008-10-28 Lam Research Corporation Etch with photoresist mask
US7390753B2 (en) * 2005-11-14 2008-06-24 Taiwan Semiconductor Mfg. Co., Ltd. In-situ plasma treatment of advanced resists in fine pattern definition
US20090191715A1 (en) * 2006-03-09 2009-07-30 Toshio Hayashi Method for etching interlayer dielectric film
US8125069B2 (en) 2006-04-07 2012-02-28 Philtech Inc. Semiconductor device and etching apparatus
TWI437633B (zh) 2006-05-24 2014-05-11 Ulvac Inc Dry etching method for interlayer insulating film
KR101346897B1 (ko) 2006-08-07 2014-01-02 도쿄엘렉트론가부시키가이샤 에칭 방법 및 플라즈마 처리 시스템
JP4182125B2 (ja) * 2006-08-21 2008-11-19 エルピーダメモリ株式会社 半導体装置の製造方法
JP2008053507A (ja) * 2006-08-25 2008-03-06 Matsushita Electric Ind Co Ltd ドライエッチング方法
US7589005B2 (en) * 2006-09-29 2009-09-15 Taiwan Semiconductor Manufacturing Co., Ltd. Methods of forming semiconductor structures and systems for forming semiconductor structures
JP5108489B2 (ja) * 2007-01-16 2012-12-26 株式会社日立ハイテクノロジーズ プラズマ処理方法
JP2009123866A (ja) * 2007-11-14 2009-06-04 Nec Electronics Corp 半導体装置の製造方法、および被エッチング膜の加工方法
JP5128421B2 (ja) * 2008-09-04 2013-01-23 東京エレクトロン株式会社 プラズマ処理方法およびレジストパターンの改質方法
JP5423029B2 (ja) * 2009-02-12 2014-02-19 富士通セミコンダクター株式会社 半導体装置の製造方法
JP5171683B2 (ja) * 2009-02-18 2013-03-27 東京エレクトロン株式会社 プラズマ処理方法
JP5466480B2 (ja) * 2009-02-20 2014-04-09 東京エレクトロン株式会社 プラズマエッチング方法、プラズマエッチング装置および記憶媒体
US9373521B2 (en) 2010-02-24 2016-06-21 Tokyo Electron Limited Etching processing method
JP5662079B2 (ja) * 2010-02-24 2015-01-28 東京エレクトロン株式会社 エッチング処理方法
US9190316B2 (en) * 2011-10-26 2015-11-17 Globalfoundries U.S. 2 Llc Low energy etch process for nitrogen-containing dielectric layer
JP5142236B1 (ja) * 2011-11-15 2013-02-13 エルシード株式会社 エッチング方法
JP2013222852A (ja) * 2012-04-17 2013-10-28 Tokyo Electron Ltd 有機膜をエッチングする方法及びプラズマエッチング装置
JP6226668B2 (ja) * 2012-09-25 2017-11-08 東京エレクトロン株式会社 プラズマ処理方法
JP6037914B2 (ja) * 2013-03-29 2016-12-07 富士フイルム株式会社 保護膜のエッチング方法およびテンプレートの製造方法
JP6158027B2 (ja) * 2013-10-08 2017-07-05 株式会社日立ハイテクノロジーズ プラズマ処理方法
WO2015105651A1 (en) * 2014-01-08 2015-07-16 Applied Materials, Inc. Development of high etch selective hardmask material by ion implantation into amorphous carbon films
TWI518751B (zh) * 2014-05-14 2016-01-21 國立清華大學 成分元素濃度漸變分佈之載子通道及其製作方法
US9512517B2 (en) * 2015-01-23 2016-12-06 Varian Semiconductor Equipment Associates, Inc. Multiple exposure treatment for processing a patterning feature
JP6449141B2 (ja) * 2015-06-23 2019-01-09 東京エレクトロン株式会社 エッチング処理方法及びプラズマ処理装置
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JP6817692B2 (ja) * 2015-08-27 2021-01-20 東京エレクトロン株式会社 プラズマ処理方法
JP6604911B2 (ja) 2016-06-23 2019-11-13 東京エレクトロン株式会社 エッチング処理方法
US9852924B1 (en) * 2016-08-24 2017-12-26 Lam Research Corporation Line edge roughness improvement with sidewall sputtering
TWI810181B (zh) * 2017-04-26 2023-08-01 日商東京威力科創股份有限公司 使用硫及/或碳基化學品之有機膜循環電漿蝕刻方法
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CN113228830B (zh) * 2019-01-09 2024-10-01 东京毅力科创株式会社 等离子体处理装置及等离子体处理方法
CN111524782B (zh) * 2019-02-05 2023-07-25 东京毅力科创株式会社 等离子体处理装置
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Publication number Publication date
US20050048787A1 (en) 2005-03-03
US7371690B2 (en) 2008-05-13
JP2005072518A (ja) 2005-03-17

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