JP4489127B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP4489127B2
JP4489127B2 JP2008049193A JP2008049193A JP4489127B2 JP 4489127 B2 JP4489127 B2 JP 4489127B2 JP 2008049193 A JP2008049193 A JP 2008049193A JP 2008049193 A JP2008049193 A JP 2008049193A JP 4489127 B2 JP4489127 B2 JP 4489127B2
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Japan
Prior art keywords
block
data
errors
monitoring
semiconductor memory
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JP2008049193A
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Japanese (ja)
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JP2009205578A5 (enExample
JP2009205578A (ja
Inventor
敏克 檜田
伸一 菅野
浩邦 矢野
和也 橘内
滋博 浅野
純二 矢野
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Toshiba Corp
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Toshiba Corp
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Priority to JP2008049193A priority Critical patent/JP4489127B2/ja
Priority to PCT/JP2008/067597 priority patent/WO2009107268A1/en
Priority to KR1020097017907A priority patent/KR101012445B1/ko
Priority to US12/529,282 priority patent/US8060797B2/en
Priority to EP08872498A priority patent/EP2245542B1/en
Priority to CN2008800063643A priority patent/CN101622607B/zh
Priority to TW097144965A priority patent/TWI397916B/zh
Publication of JP2009205578A publication Critical patent/JP2009205578A/ja
Publication of JP2009205578A5 publication Critical patent/JP2009205578A5/ja
Application granted granted Critical
Publication of JP4489127B2 publication Critical patent/JP4489127B2/ja
Priority to US13/270,788 priority patent/US8219861B2/en
Priority to US13/486,718 priority patent/US8583972B2/en
Priority to US14/049,742 priority patent/US8793555B2/en
Priority to US14/309,611 priority patent/US9037947B2/en
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/16—Protection against loss of memory contents
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3431—Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System (AREA)
JP2008049193A 2008-02-29 2008-02-29 半導体記憶装置 Active JP4489127B2 (ja)

Priority Applications (11)

Application Number Priority Date Filing Date Title
JP2008049193A JP4489127B2 (ja) 2008-02-29 2008-02-29 半導体記憶装置
KR1020097017907A KR101012445B1 (ko) 2008-02-29 2008-09-22 반도체 기억 장치
US12/529,282 US8060797B2 (en) 2008-02-29 2008-09-22 Semiconductor storage device
EP08872498A EP2245542B1 (en) 2008-02-29 2008-09-22 Semiconductor storage device
CN2008800063643A CN101622607B (zh) 2008-02-29 2008-09-22 半导体存储装置
PCT/JP2008/067597 WO2009107268A1 (en) 2008-02-29 2008-09-22 Semiconductor storage device
TW097144965A TWI397916B (zh) 2008-02-29 2008-11-20 半導體儲存裝置
US13/270,788 US8219861B2 (en) 2008-02-29 2011-10-11 Semiconductor storage device
US13/486,718 US8583972B2 (en) 2008-02-29 2012-06-01 Method of controlling a semiconductor storage device
US14/049,742 US8793555B2 (en) 2008-02-29 2013-10-09 Method of controlling a semiconductor storage device
US14/309,611 US9037947B2 (en) 2008-02-29 2014-06-19 Method of controlling a semiconductor storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008049193A JP4489127B2 (ja) 2008-02-29 2008-02-29 半導体記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2010074959A Division JP2010160816A (ja) 2010-03-29 2010-03-29 半導体記憶装置の制御方法

Publications (3)

Publication Number Publication Date
JP2009205578A JP2009205578A (ja) 2009-09-10
JP2009205578A5 JP2009205578A5 (enExample) 2010-02-04
JP4489127B2 true JP4489127B2 (ja) 2010-06-23

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Application Number Title Priority Date Filing Date
JP2008049193A Active JP4489127B2 (ja) 2008-02-29 2008-02-29 半導体記憶装置

Country Status (7)

Country Link
US (5) US8060797B2 (enExample)
EP (1) EP2245542B1 (enExample)
JP (1) JP4489127B2 (enExample)
KR (1) KR101012445B1 (enExample)
CN (1) CN101622607B (enExample)
TW (1) TWI397916B (enExample)
WO (1) WO2009107268A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
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JP2010160816A (ja) * 2010-03-29 2010-07-22 Toshiba Corp 半導体記憶装置の制御方法
US10529730B2 (en) 2017-09-07 2020-01-07 Toshiba Memory Corporation Memory system

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