JP4442560B2 - Ｓｏｉウエーハの製造方法 - Google Patents

Ｓｏｉウエーハの製造方法 Download PDF

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Publication number
JP4442560B2
JP4442560B2 JP2005502689A JP2005502689A JP4442560B2 JP 4442560 B2 JP4442560 B2 JP 4442560B2 JP 2005502689 A JP2005502689 A JP 2005502689A JP 2005502689 A JP2005502689 A JP 2005502689A JP 4442560 B2 JP4442560 B2 JP 4442560B2
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Japan
Prior art keywords
oxide film
buried oxide
thickness
heat treatment
wafer
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Expired - Fee Related
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JP2005502689A
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English (en)
Japanese (ja)
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JPWO2004075298A1 (ja
Inventor
功 横川
浩司 阿賀
清隆 高野
清 三谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
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Shin Etsu Handotai Co Ltd
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Publication of JPWO2004075298A1 publication Critical patent/JPWO2004075298A1/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H10P30/209—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species in silicon to make buried insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1908—Preparing SOI wafers using silicon implanted buried insulating layers, e.g. oxide layers [SIMOX]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Element Separation (AREA)
JP2005502689A 2003-02-19 2004-02-13 Ｓｏｉウエーハの製造方法 Expired - Fee Related JP4442560B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2003040875 2003-02-19
JP2003040875 2003-02-19
PCT/JP2004/001557 WO2004075298A1 (ja) 2003-02-19 2004-02-13 Ｓｏｉウエーハの製造方法及びｓｏｉウエーハ

Publications (2)

Publication Number Publication Date
JPWO2004075298A1 JPWO2004075298A1 (ja) 2006-06-01
JP4442560B2 true JP4442560B2 (ja) 2010-03-31

Family

ID=32905270

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005502689A Expired - Fee Related JP4442560B2 (ja) 2003-02-19 2004-02-13 Ｓｏｉウエーハの製造方法

Country Status (7)

Country Link
US (1) US7524744B2 (https=)
EP (1) EP1596437A4 (https=)
JP (1) JP4442560B2 (https=)
KR (1) KR100947815B1 (https=)
CN (1) CN100418194C (https=)
TW (1) TW200416814A (https=)
WO (1) WO2004075298A1 (https=)

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* Cited by examiner, † Cited by third party
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EP1719179B1 (en) * 2004-02-25 2018-10-03 Sony Semiconductor Solutions Corporation Photodetecting device
JP5374805B2 (ja) * 2006-03-27 2013-12-25 株式会社Ｓｕｍｃｏ Ｓｉｍｏｘウェーハの製造方法
KR101340004B1 (ko) * 2006-04-24 2013-12-11 신에쯔 한도타이 가부시키가이샤 Ｓｏｉ 웨이퍼의 제조방법
WO2008078132A1 (en) * 2006-12-26 2008-07-03 S.O.I.Tec Silicon On Insulator Technologies Method for producing a semiconductor-on-insulator structure
WO2008078133A1 (en) * 2006-12-26 2008-07-03 S.O.I.Tec Silicon On Insulator Technologies Method for producing a semiconductor-on-insulator structure
FR2912259B1 (fr) * 2007-02-01 2009-06-05 Soitec Silicon On Insulator Procede de fabrication d'un substrat du type "silicium sur isolant".
WO2008096194A1 (en) 2007-02-08 2008-08-14 S.O.I.Tec Silicon On Insulator Technologies Method of fabrication of highly heat dissipative substrates
WO2008114099A1 (en) 2007-03-19 2008-09-25 S.O.I.Tec Silicon On Insulator Technologies Patterned thin soi
US20100193899A1 (en) * 2007-11-23 2010-08-05 S.O.I.Tec Silicon On Insulator Technologies Precise oxide dissolution
DE112008003726B4 (de) 2008-02-20 2023-09-21 Soitec Oxidation nach Oxidauflösung
JP2010027959A (ja) * 2008-07-23 2010-02-04 Sumco Corp 高抵抗ｓｉｍｏｘウェーハの製造方法
JP5493345B2 (ja) * 2008-12-11 2014-05-14 信越半導体株式会社 Ｓｏｉウェーハの製造方法
KR100987794B1 (ko) 2008-12-22 2010-10-13 한국전자통신연구원 반도체 장치의 제조 방법
US8168507B2 (en) * 2009-08-21 2012-05-01 International Business Machines Corporation Structure and method of forming enhanced array device isolation for implanted plate EDRAM
CN101958317A (zh) * 2010-07-23 2011-01-26 上海宏力半导体制造有限公司 一种晶圆结构及其制造方法
FR2964495A1 (fr) * 2010-09-02 2012-03-09 Soitec Silicon On Insulator Procede de fabrication d'une structure seoi multiple comportant une couche isolante ultrafine
FR2972564B1 (fr) 2011-03-08 2016-11-04 S O I Tec Silicon On Insulator Tech Procédé de traitement d'une structure de type semi-conducteur sur isolant
FR2998418B1 (fr) * 2012-11-20 2014-11-21 Soitec Silicon On Insulator Procede de fabrication d'un substrat de type semi-conducteur sur isolant
CN105009297B (zh) * 2013-03-12 2019-06-14 应用材料公司 用于金属氧化物半导体薄膜晶体管的介电薄膜的针孔评估方法
CN103579109B (zh) * 2013-11-01 2016-06-08 电子科技大学 一种光电集成电路的制造方法
CN107393863A (zh) * 2017-05-22 2017-11-24 茆胜 Oled微型显示器ic片及其制备方法
US11245051B2 (en) 2018-10-12 2022-02-08 Boe Technology Group Co., Ltd. Micro light emitting diode apparatus and fabricating method thereof

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US5310689A (en) * 1990-04-02 1994-05-10 Motorola, Inc. Method of forming a SIMOX structure
JP3036619B2 (ja) 1994-03-23 2000-04-24 コマツ電子金属株式会社 Ｓｏｉ基板の製造方法およびｓｏｉ基板
US5893729A (en) * 1995-06-28 1999-04-13 Honeywell Inc. Method of making SOI circuit for higher temperature and higher voltage applications
US5712173A (en) * 1996-01-24 1998-01-27 Advanced Micro Devices, Inc. Method of making semiconductor device with self-aligned insulator
US5795813A (en) * 1996-05-31 1998-08-18 The United States Of America As Represented By The Secretary Of The Navy Radiation-hardening of SOI by ion implantation into the buried oxide layer
JPH1079355A (ja) * 1996-09-03 1998-03-24 Komatsu Denshi Kinzoku Kk Ｓｏｉ基板の製造方法
JP3762144B2 (ja) * 1998-06-18 2006-04-05 キヤノン株式会社 Ｓｏｉ基板の作製方法
JP3395661B2 (ja) * 1998-07-07 2003-04-14 信越半導体株式会社 Ｓｏｉウエーハの製造方法
JP2000082679A (ja) * 1998-07-08 2000-03-21 Canon Inc 半導体基板とその作製方法
JP4476390B2 (ja) * 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2000091406A (ja) * 1998-09-08 2000-03-31 Mitsubishi Materials Silicon Corp ウェーハ保持具
FR2784796B1 (fr) * 1998-10-15 2001-11-23 Commissariat Energie Atomique Procede de realisation d'une couche de materiau enterree dans un autre materiau
JP2001144275A (ja) 1999-08-27 2001-05-25 Shin Etsu Handotai Co Ltd 貼り合わせｓｏｉウエーハの製造方法および貼り合わせｓｏｉウエーハ
JP3910766B2 (ja) 1999-09-16 2007-04-25 日野自動車株式会社 車高調整装置
JP2001257329A (ja) * 2000-03-10 2001-09-21 Nippon Steel Corp Ｓｉｍｏｘ基板およびその製造方法
US6417078B1 (en) 2000-05-03 2002-07-09 Ibis Technology Corporation Implantation process using sub-stoichiometric, oxygen doses at different energies
US6461933B2 (en) * 2000-12-30 2002-10-08 Texas Instruments Incorporated SPIMOX/SIMOX combination with ITOX option
JP2002270614A (ja) * 2001-03-12 2002-09-20 Canon Inc Ｓｏｉ基体、その熱処理方法、それを有する半導体装置およびその製造方法
US20020190318A1 (en) * 2001-06-19 2002-12-19 International Business Machines Corporation Divot reduction in SIMOX layers
US20050170570A1 (en) * 2004-01-30 2005-08-04 International Business Machines Corporation High electrical quality buried oxide in simox

Also Published As

Publication number Publication date
JPWO2004075298A1 (ja) 2006-06-01
WO2004075298A1 (ja) 2004-09-02
CN100418194C (zh) 2008-09-10
KR20050100665A (ko) 2005-10-19
CN1748312A (zh) 2006-03-15
EP1596437A1 (en) 2005-11-16
TW200416814A (en) 2004-09-01
TWI344667B (https=) 2011-07-01
KR100947815B1 (ko) 2010-03-15
US7524744B2 (en) 2009-04-28
US20060051945A1 (en) 2006-03-09
EP1596437A4 (en) 2009-12-02

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