JP4271112B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4271112B2 JP4271112B2 JP2004273827A JP2004273827A JP4271112B2 JP 4271112 B2 JP4271112 B2 JP 4271112B2 JP 2004273827 A JP2004273827 A JP 2004273827A JP 2004273827 A JP2004273827 A JP 2004273827A JP 4271112 B2 JP4271112 B2 JP 4271112B2
- Authority
- JP
- Japan
- Prior art keywords
- metal plate
- adhesive
- frame portion
- heat dissipation
- mounting substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/17—Surface bonding means and/or assemblymeans with work feeding or handling means
- Y10T156/1798—Surface bonding means and/or assemblymeans with work feeding or handling means with liquid adhesive or adhesive activator applying means
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Dispersion Chemistry (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
前記放熱金属板は、n角形(nは3以上の整数)であり、
前記額縁部は、前記実装基板を取り囲むようにn角形に形成され、このn角形のコーナー部および該コーナー部の近傍の内壁に複数の溝が設けられていることを特徴とする。
図1は、本発明による第1の実施形態に従ったモジュール型半導体装置100(以下、単に、半導体装置100という)の平面図である。半導体装置100は、例えば、モータの電流制御に用いられ、代表的には、6kVrms/分以上の絶縁耐圧を有する。
図5は、第2の実施形態に従って接着剤50を金属板30に塗布した様子を示す図である。第2の実施形態では、金属板30の四隅に供給された接着剤は、金属板30の辺に供給された接着剤よりも金属板30の外縁寄りにある。これにより、金属板30のコーナー部において、接着剤50は金属板30と額縁部40との間からはみ出したとしても、額縁部40の外側へはみ出す。尚、第2の実施形態による半導体装置の平面図は、図1と同様である。
図7は、第3の実施形態に従って接着剤50を金属板30に塗布した様子を示す図である。第3の実施形態では、接着剤は、金属板30の四隅において供給されていない。これにより、本実施形態によれば、金属板30の四隅において接着剤50のはみ出しがない。第3の実施形態による半導体装置の平面図は、図1と同様である。
図9は、本発明による第4の実施形態に従った半導体装置に用いられる額縁部40のコーナー部C(図1参照)を示す図である。第4の実施形態では、額縁部40のコーナー部およびその近傍の内壁に溝Dが設けられている。溝Dの一端は開放されており、その他端は額縁部40の内壁の途中で閉じている。溝Dの開放端に金属板30が面する。額縁部40以外の構成要素は、他のいずれかの実施形態の構成要素と同様でよい。
10 半導体チップ
20 実装基板
30 放熱用金属板
40 額縁部
50 接着剤
60 封止樹脂
Claims (4)
- 半導体チップを実装した実装基板と、
前記実装基板を搭載したn角形(nは3以上の正数)の放熱用金属板と、
前記放熱用金属板の外周に沿って設けられ、前記実装基板を取り囲む額縁部と、
前記放熱用金属板と前記額縁部との間に供給され、前記放熱用金属板と前記額縁部とを接着する接着剤と、
前記放熱用金属板および前記額縁部からなる箱内において前記半導体チップおよび前記実装基板を封止する封止樹脂とを備え、
前記接着剤の供給量は、前記放熱用金属板のn角形の辺部よりもコーナー部において少ないことを特徴とする半導体装置。 - 半導体チップを実装した実装基板と、
前記実装基板を搭載し、n角形(nは3以上の正数)の放熱用金属板と、
前記放熱用金属板の外周に沿って設けられ、前記実装基板を取り囲む額縁部と、
前記放熱用金属板と前記額縁部との間に供給され、前記放熱用金属板と前記額縁部とを接着する接着剤と、
前記放熱用金属板および前記額縁部からなる箱内において前記半導体チップおよび前記実装基板を封止する封止樹脂とを備え、
前記放熱用金属板のn角形のコーナー部に供給された前記接着剤は、前記放熱用金属板のn角形の辺部に供給された前記接着剤よりも前記放熱用金属板の外縁寄りにあることを特徴とする半導体装置。 - 半導体チップを実装した実装基板と、
前記実装基板を搭載した放熱用金属板と、
前記放熱用金属板の外周に沿って設けられ、前記実装基板を取り囲むように形成され、内壁に溝を有する額縁部と、
前記放熱用金属板と前記額縁部との間に供給され、前記放熱用金属板と前記額縁部とを接着する接着剤と、
前記放熱用金属板および前記額縁部からなる箱内において前記半導体チップおよび前記実装基板を封止する封止樹脂とを備え、
前記放熱金属板は、n角形(nは3以上の整数)であり、
前記額縁部は、前記実装基板を取り囲むようにn角形に形成され、このn角形のコーナー部および該コーナー部の近傍の内壁に複数の溝が設けられていることを特徴とする半導体装置。 - 前記溝の一端は開放されており、前記放熱用金属板に面していることを特徴とする請求項3に記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004273827A JP4271112B2 (ja) | 2004-09-21 | 2004-09-21 | 半導体装置 |
US11/181,987 US7265982B2 (en) | 2004-09-21 | 2005-07-15 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004273827A JP4271112B2 (ja) | 2004-09-21 | 2004-09-21 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006093232A JP2006093232A (ja) | 2006-04-06 |
JP4271112B2 true JP4271112B2 (ja) | 2009-06-03 |
Family
ID=36073726
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004273827A Expired - Fee Related JP4271112B2 (ja) | 2004-09-21 | 2004-09-21 | 半導体装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7265982B2 (ja) |
JP (1) | JP4271112B2 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8154114B2 (en) * | 2007-08-06 | 2012-04-10 | Infineon Technologies Ag | Power semiconductor module |
US8018047B2 (en) * | 2007-08-06 | 2011-09-13 | Infineon Technologies Ag | Power semiconductor module including a multilayer substrate |
CN103336606B (zh) * | 2013-06-14 | 2016-03-02 | 业成光电(深圳)有限公司 | 触控模组 |
US10483176B2 (en) * | 2015-12-04 | 2019-11-19 | Mitsubishi Electric Corporation | Semiconductor module |
JP6743439B2 (ja) * | 2016-03-18 | 2020-08-19 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP7135293B2 (ja) * | 2017-10-25 | 2022-09-13 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
WO2020149188A1 (ja) * | 2019-01-17 | 2020-07-23 | 三菱電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP7163819B2 (ja) * | 2019-02-27 | 2022-11-01 | 株式会社豊田自動織機 | 半導体モジュール |
JP2022039118A (ja) * | 2020-08-27 | 2022-03-10 | 富士電機株式会社 | 半導体モジュール及び半導体モジュールの製造方法 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4787332A (en) * | 1986-02-12 | 1988-11-29 | Robotics, Inc. | Adhesive dispensing pump control system |
US4699575A (en) * | 1986-02-12 | 1987-10-13 | Robotics, Inc. | Adhesive pump and it's control system |
US4842162A (en) * | 1987-03-27 | 1989-06-27 | Nordson Corporation | Apparatus and method for dispensing fluid materials using position-dependent velocity feedback |
JP3545019B2 (ja) | 1993-11-04 | 2004-07-21 | 株式会社豊田自動織機 | 電子製品の封止ケース |
US5956231A (en) * | 1994-10-07 | 1999-09-21 | Hitachi, Ltd. | Semiconductor device having power semiconductor elements |
JP3201187B2 (ja) * | 1994-12-08 | 2001-08-20 | 富士電機株式会社 | 半導体装置 |
JP3196540B2 (ja) | 1994-12-09 | 2001-08-06 | 富士電機株式会社 | 半導体装置 |
JP3168901B2 (ja) * | 1996-02-22 | 2001-05-21 | 株式会社日立製作所 | パワー半導体モジュール |
US6017485A (en) * | 1996-03-28 | 2000-01-25 | Carborundum Corporation | Process for making a low electrical resistivity, high purity aluminum nitride electrostatic chuck |
US5979794A (en) * | 1997-05-13 | 1999-11-09 | Ingersoll-Rand Company | Two-part stream dispensing for high viscosity materials |
KR100371974B1 (ko) * | 1997-05-26 | 2003-02-17 | 스미토모덴키고교가부시키가이샤 | 구리회로접합기판 및 그 제조방법 |
JPH11307658A (ja) | 1998-04-22 | 1999-11-05 | Fuji Electric Co Ltd | 半導体装置のパッケージ |
DE10009678C1 (de) * | 2000-02-29 | 2001-07-19 | Siemens Ag | Wärmeleitende Klebstoffverbindung und Verfahren zum Herstellen einer wärmeleitenden Klebstoffverbindung |
JP4151209B2 (ja) * | 2000-08-29 | 2008-09-17 | 三菱電機株式会社 | 電力用半導体装置 |
JP4089143B2 (ja) * | 2000-08-30 | 2008-05-28 | 三菱電機株式会社 | 電力用半導体装置 |
DE10232566B4 (de) * | 2001-07-23 | 2015-11-12 | Fuji Electric Co., Ltd. | Halbleiterbauteil |
US6774465B2 (en) * | 2001-10-05 | 2004-08-10 | Fairchild Korea Semiconductor, Ltd. | Semiconductor power package module |
TWI278975B (en) * | 2003-03-04 | 2007-04-11 | Siliconware Precision Industries Co Ltd | Semiconductor package with heatsink |
US20050242341A1 (en) * | 2003-10-09 | 2005-11-03 | Knudson Christopher T | Apparatus and method for supporting a flexible substrate during processing |
-
2004
- 2004-09-21 JP JP2004273827A patent/JP4271112B2/ja not_active Expired - Fee Related
-
2005
- 2005-07-15 US US11/181,987 patent/US7265982B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2006093232A (ja) | 2006-04-06 |
US7265982B2 (en) | 2007-09-04 |
US20060061971A1 (en) | 2006-03-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7265982B2 (en) | Semiconductor device | |
JP2005516398A (ja) | ワンパッケージ化されたダイを有する半導体装置 | |
CN109637983B (zh) | 芯片封装 | |
JPH09260550A (ja) | 半導体装置 | |
JP7247574B2 (ja) | 半導体装置 | |
KR101647863B1 (ko) | 반도체 장치 | |
JP4549171B2 (ja) | 混成集積回路装置 | |
JPH03108744A (ja) | 樹脂封止型半導体装置 | |
CN108155172B (zh) | 集成电路封装 | |
JPH1065042A (ja) | 半導体装置 | |
US20210111109A1 (en) | Flat no-lead package with surface mounted structure | |
JP5112972B2 (ja) | 半導体装置およびその製造方法 | |
JP7101309B2 (ja) | 電子部品収納用パッケージ | |
JP2022143167A (ja) | 半導体装置 | |
WO2017154072A1 (ja) | 半導体装置および半導体装置の製造方法 | |
JPH03280453A (ja) | 半導体装置及びその製造方法 | |
CN216698339U (zh) | 一种芯片封装组件 | |
US7579675B2 (en) | Semiconductor device having surface mountable external contact areas and method for producing the same | |
CN219759566U (zh) | 绝缘基板及功率器件 | |
CN216413071U (zh) | 二极管封装结构 | |
JP6104545B2 (ja) | 半導体装置の製造方法、および成形部材 | |
KR20010067312A (ko) | 반도체 장치 및 그 제조방법 | |
JP2009158825A (ja) | 半導体装置 | |
JP4995764B2 (ja) | リード支持型半導体パッケージ | |
JP2018093084A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20061108 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20080822 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080826 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20081010 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20081121 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090120 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20090210 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20090224 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120306 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120306 Year of fee payment: 3 |
|
LAPS | Cancellation because of no payment of annual fees |