CN108155172B - 集成电路封装 - Google Patents
集成电路封装 Download PDFInfo
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- CN108155172B CN108155172B CN201711143139.1A CN201711143139A CN108155172B CN 108155172 B CN108155172 B CN 108155172B CN 201711143139 A CN201711143139 A CN 201711143139A CN 108155172 B CN108155172 B CN 108155172B
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Abstract
提供一种集成电路IC封装,具有从所述IC封装伸出,用于将所述IC封装与印刷电路板PCB电性连接的一个或多个引脚。所述IC封装具有带有第一电子元件的第一管芯、带有第二电子元件的第二管芯、以及具有平面表面的导电板。所述第一电子元件可以是半导体电源装置而所述第二电子元件可以是控制电路。所述导电板的平面表面被同时电性连接到所述第一管芯的平面表面以及一个或更多个引脚,从而在所述第一管芯和所述一个或更多个引脚之间建立电性连接。所述第二管芯可以被布置在所述导电板的顶部。作为备选方案,具有第三电子元件的第三管芯可以被布置在所述导电板的顶部。
Description
技术领域
本文件涉及集成电路IC封装的领域。特别地,本文件涉及用于在单个IC封装中组装两个或三个带有相应的电子元件的管芯的技术。
背景技术
AC/DC转换器用作多种应用的电源。这些应用的范围包括从便携式电子装置的电源适配器到用于网络设备和家用电器的电源。用于实现AC/DC转换器的传统的IC封装包括半导体电源装置和用于控制所述半导体电源装置的数字控制器。Legacy类型的IC封装(例如小外形集成电路SOIC、塑料双列直插式封装PDIP、薄型收缩小外形封装TSSOP、袖珍型小外形封装MSOP、收缩小外形封装SSOP、或者双列扁平无引线DFN)经常被应用。
在封装时,管芯也就是半导体材料块被封装在IC封装中,其用作支撑的壳体,用以防止物理损伤和腐蚀。此外,所述IC封装支撑了电气接触点(表现为引线或引脚),其将管芯与印刷电路板PCB连接,所述IC封装可以被安装到所述印刷电路板PCB上。
一般来说,需要考虑几个设计时的考虑因素。例如,使管芯耗尽、穿过IC封装、并进入PCB的载流路径的电气特性必须被仔细地进行设计。具体而言,所期望的是在后的载流路径呈现出较低的电阻、较低的电容及较低的电感。
另一方面,机械可靠性是一个重要的设计标准。IC管芯负责保护芯片的安全免受潜在的破坏。其封装必须抵抗物理破坏并提供气密性的密封以隔离水分。滞留的水分的扩散可能会导致不同材料和结构的内部分离(分层)。裂缝可能会延伸到IC封装的表面,并且在最严重的情况下,整个IC封装可能会膨胀及爆裂。这被称为“爆米花”效应。
最后,也需要考虑热学上的考虑因素。为管芯提供有效的散热也是IC封装的职责。对于用于AC/DC转换器中的半导体电源装置而言尤其如此。
发明内容
本文件解决了如上所述的技术问题。具体而言,本文件解决了这样的问题:提供一种IC封装,其具有改善的电气和热学特性,而且对分层具有抵抗力。本文件还在单个的IC封装中通过集成第三硅管芯而展示了附加其他功能的能力。根据一个方面,一种集成电路IC封装包括从所述IC封装伸出,用于将所述IC封装与印刷电路板PCB电性连接的一个或更多个引脚(也可表现为引线或焊盘)。进一步地,所述IC封装包括:包括第一电子元件的第一管芯、包括第二电子元件的第二管芯、以及具有平面表面的导电板。所述导电板被电性连接到所述一个或更多个引脚。所述导电板的平面表面被电性连接到所述第一管芯的平面表面,从而在所述第一管芯和所述一个或更多个引脚之间建立电性连接。可选地,所述一个或多个引脚可以被电性连接到所述导电板的所述平面表面。
例如,所述IC封装可以是小外形集成电路SOIC封装或者双列扁平无引线DFN封装。作为备选方案,所述IC封装可以是其他的鸥翼型封装,例如TSSMOP、MSOP、或者SSOP。
管芯被认为是半导体材料制成的块体,电子元件,例如所述第一电子元件或者所述第二电子元件,被形成在所述管芯上。所述第一电子元件可以是例如晶体管,例如金属氧化物半导体场效应晶体管MOSFET、双极结型晶体管BJT、绝缘栅双极晶体管IGBT、MOS门控晶闸管、或者其他的半导体电源装置。所述第二电子元件可以是例如控制电路,用于控制包含在所述第一管芯中的晶体管的工作。
例如,包含在所述第一管芯中的所述第一电子元件可以是MOSFET,而所述第一管芯的平面表面可以包括所述MOSFET的源极端。换言之,由所述导电板建立的所述电性连接可以是所述一个或更多个引脚与所述MOSFET的源极端之间的电性连接。为了简化下面的描述,并且不失去普遍性,所述一个或更多个引脚将会被表现为源极引脚。所述源极引脚可以是例如J型引线或者鸥翼型引线,它们能够从所述IC封装的一端,例如长端,延伸出来。
所述导电板可以是例如扁平的金属板,由例如铜、银、铝或金等材料制成。特别地,所述导电板可以具有扁平的立方体形状,特别是扁平的长方体形状。因此,所述导电板的平面表面可以是例如具有矩形形状的平面表面。本领域技术人员将会很容易地理解,在实践中,所述导电板的所述平面表面在其几何学意义上可能并不是完美的平面。相反地,这里假定“平面”表面的概念也涵盖了略微凸凹不平的基本上为平面的表面。具体地,所述导电板的所述平面表面可以包括一个具有导电环氧树脂的层,所述导电环氧树脂用于将所述导电板的所述平面表面贴附在所述第一管芯的平面表面上和/或所述源极引脚上。在另一种方式中,所述导电板的所述平面表面的不够完美的平面度可能是例如具有不同厚度的导电环氧树脂层导致的结果。或者,所述导电板的所述平面表面的不够完美的平面度可能并不是由所述导电环氧树脂层导致的,而是由所述导电板的其余部分的不够完善的制造工艺导致的。
在以下的描述中,所述导电板的所述平面表面将会被不失去普遍性地表现为所述导电板的底部表面。
所述第一管芯可以实质上具有立方体形的形状,例如长方体形状。这样,所述第一管芯的平面表面可以是例如矩形的平面表面。与所述导电板相似,所述第一管芯可以并不是完美的长方体,而所述第一管芯的平面表面可以并不是完美的平面。相反地,显而易见的是“平面形”表面的概念也涵盖了所述第一管芯的略微凸凹不平的、但是至少在很大程度上基本上为平面的表面。
所述第一管芯和所述源极引脚之间的电性连接可以仅仅通过所述导电板来建立。换句话说,所述IC封装可以不包括任何处于所述源极引脚和所述第一管芯之间的焊线或者类似的电性连接。在技术实施的传统情况下,多条焊线将会在所述第一管芯和所述源极引脚之间携带很高的电流。与这种实施方式相比,所述导电板显示出以下的优点:完成了具有低电阻和低电感的电性连接。与此同时,所述导电板能够允许相比于根据现有技术已知的互连技术更高的热通量,并且在所述IC封装中,特别是在所述第一管芯中产生的热量可以被更加有效地引导出去。总而言之,所述导电板担负了散热器和具有减小的电阻及电感的寄生最小化装置的功能。
为了使所述IC封装的电学和热学特效达到最佳,处于所述导电板的底部表面和所述第一管芯的平面表面之间的第一接触区域可以被最大化。为此目的,所述底部表面的尺寸(例如它的宽度和/或它的长度)可以被选择为足够大的以覆盖所述第一管芯的平面表面。此外,如果所述底部表面和所述第一管芯的平面表面两者都具有矩形形状,则这两个表面的边缘可以被对准,以使得所述第一管芯和所述导电板之间的重叠最大化。
依照相似的方式,所述导电板的底部表面和所述源极引脚之间的第二接触区域可以通过对所述导电板和所述源极引脚的尺寸的适当选择而被增大。为此目的,至少两个源极引脚可以通过引脚框架被电性连接在所述IC封装中,而且所述导电板的底部表面可以被电性连接到所述引脚框架。在一些众所周知的IC封装类型中,所述引脚框架也可以被认为是引线框架。
作为进一步的优点,所述导电板不需要任何弯曲的形状或者任何用于形成所述导电板并且将其安装在所述第一管芯和所述源极引脚(或者所述引脚框架)上的复杂工具。与现有的工艺技术例如使用具有特定形状的铜质夹具导体的技术相反,可以使用简单的金属板来将所述第一管芯固定到位并且在所述第一管芯和所述源极引脚之间建立电性连接。扁平的金属板可以例如通过冲压或锯切工艺被容易地获得,而且能够利用标准的选取和放置工具被连接到IC封装上。具体而言,用于安装所述导电板的选取和放置工具可以与用于安装所述第一管芯和所述第二管芯的选取和放置工具是相同的。因此,此处推荐的导电板具有显著地降低IC封装的生产成本的潜力。
所述导电板可以包括另一个表面,在下文中被表现为顶部表面,其位于和所述底部表面所在的一侧相反的另一侧上。与所述源极引脚和所述第一管芯两者都被物理地贴附和电性地连接到其上的所述底部表面相似,所述顶部表面可以是基本上为平面形的,并且可以具有例如矩形的形状。所述底部表面和所述顶部表面可以形成所述导电板的整体表面的一部分。
所述第二管芯的表面可以被贴附到所述导电板的所述顶部表面,从而使得所述导电板被至少部分地夹持在所述第一及第二管芯之间。所述第二管芯可以包括隔离层,用于将处于上述配置状态的第一管芯和第二管芯电性隔离。由于所述导电板的形状是扁平的,具有两个平面表面,因此它有可能有效地把所述第一管芯和所述第二管芯布置在相对于彼此非常接近的区域中,也就是在所述导电板的隔开的两侧上。换句话说,所述导电板可以用作管芯贴装板DAP来安装所述第二管芯,或者如同将会在下面的段落中被描述的、用于多芯片共同封装的第三管芯。因此,所述导电板允许了IC封装的进一步的小型化,同时仍然取得了如上所述的电学和热学性能上的优势。例如,此处推荐的将所述导电板夹持在所述第一管芯和所述第二管芯之间的技术在DFN封装中是尤其具备优势的。
作为备选方案,所述导电板的具有优势的几何形状可以通过将第三管芯放置在所述导电板的顶部上来加以扩展。更具体地说,所述IC封装可以进一步包括第三管芯,其包括第三电子元件,并且所述第三管芯的表面可以被贴附到所述导电板的所述顶部表面上,从而使得所述导电板被至少部分地夹持在所述第一及第三管芯之间。所述导电板可以被配置用来在所述第一管芯和所述第三管芯之间建立电性连接。
所述第三电子元件可以是晶体管,例如MOSFET、BJT、IGBT、MOS门控晶闸管、或者其他半导体电源装置。作为备选方案,所述第三电子元件可以是例如集成无源器件IPD,也就是说,所述第三管芯可以包括处于硅晶圆结构中的多组电阻、电感和/或电容。
所述IC封装可以包括其他的引脚,它们在下面的描述中将会被表现为漏极引脚。所述漏极引脚可以是例如J型引线或者鸥翼型引线。例如,所述漏极引脚可以从所述IC封装的与所述源极引脚所在的一边相反的长边伸出。所述漏极引脚的用途是将所述IC封装机械地和电性地连接到所述PCB。
所述漏极引脚可以被连接到导电固定件上,所述导电固定件用于将所述第一管芯固定在所述导电板的底部表面和所述导电固定件之间。而且所述导电固定件还可以被配置成在所述第一管芯和所述导电固定件之间建立电性接触。在第一组装步骤中,所述第一管芯可以被放置在所述导电固定件上,并且在第二组装步骤中,所述导电板可以被放置在所述第一管芯的顶部上。优选地,当所述IC封装被连接到外部PCB时,所述导电板可以被布置成与外部PCB的表面层平行。上述的组装方式允许(a)将所述第一管芯在所述IC封装中的位置进行固定;以及(b)从所述第一管芯到所述源极引脚(通过所述导电板)以及到所述漏极引脚(通过所述导电固定件)建立具有较低的电阻和电感的电性连接。
所述导电固定件的暴露的表面可以形成所述IC封装的外表面的一部分,从而使得所述导电固定件可以与所述PCB电性连接。在此,所述暴露的表面可以沿着与所述导电板的所述平面表面(底部平面)基本平行的平面延伸。包含在所述第一管芯中的所述第一电子元件可以是MOSFET,而所述导电固定件的未暴露的表面可以被用来在所述导电固定件和所述第一管芯的包含所述MOSFET的漏极端的第二表面之间建立电性连接。
应该说明的是,所述第一管芯中的所述MOSFET的源极端和漏极端可以被互换。例如,所述导电固定件的未暴露的表面可以被用来在所述导电固定件和所述第一管芯的包含所述MOSFET的源极端的第二表面之间建立电性连接。相似地,所述第一管芯的平面表面——其可以被与所述导电板电性连接——可以包括所述MOSFET的漏极端。
例如,所述导电固定件的暴露的表面、所述导电固定件的未暴露的表面、和/或所述第一管芯的第二表面可以是基本上为平面形状(例如矩形)的表面。此外,前述的三个表面可以被布置成彼此平行。所述MOSFET的漏极电流而后可以不仅是通过漏极端,而且还通过所述导电件固定流动到所述PCB。更加具体地说,所述漏极电流可以沿着垂直于所述导电固定件的暴露和未暴露的表面的方向通过所述导电固定件流动到所述PCB。由于所述导电固定件的暴露的表面的面积可以被设计成实质上大于所述漏极引脚的累总接触面积,仅仅就热学和电学性能而言,上述的配置胜过了依赖于漏极引脚的技术方案中的情况。特别地,在所述导电固定件的暴露的表面的辅助下,实现优良的接合点到板体、接合点到空气和/或接合点到外壳的热电阻性能成为可能的。
所述导电固定件可以包括部分暴露的导电板,其中其暴露的表面和未暴露的表面被布置在所述部分暴露的导电板的相反的两侧。此外,所述导电固定件可以包括下沉部件,用于将所述部分暴露的导电板与漏极引脚电性地和机械地连接。特别地,所述下沉部件可以从所述IC封装的布置有所述部分暴露的导电板的较低水平面延伸到所述IC封装的布置有前述导电板的较高水平面。所述较高水平面和所述较低水平面都可以被布置成彼此平行。
所述IC封装的元件可以被用模具复合材料(也被称为密封胶)封装,用来保护这些元件免遭水分的和物理的破坏。更具体地说,仅有所述导电固定件的暴露的表面、所述源极引脚、所述漏极引脚以及其他引脚可以是能够从所述IC封装的外部电性地接触到的。为了改善所述模具复合材料与所述导电板的锁定能力,以及为了防止分层现象,所述导电板的顶部表面的至少一部分可以包括某些种类的纹理(粗糙度),其形式为凹陷或凸起。所述凹陷可以包括多种锚固涉及的变化形式,例如坝槽、蚀刻陷斑(亦即U形凹槽)、或者冲压的V形凹槽。例如,所述凹陷或凸起可以被设置在所述导电板的顶部表面的没有被连接到所述第二管芯或所述第三管芯的区域中。
所述IC封装可以进一步包括至少一个控制引脚。所述第二管芯可以被与所述至少一个控制引脚以丝焊方式连接,用于和外部的PCB建立电气接触。所述至少一个控制引脚可以被与电性连接到所述导电板的所述源极引脚隔离。换一种方式来说,所述至少一个控制引脚也被与所述导电板及所述第一管芯隔离。类似地,所述至少一个控制引脚也可以被与所述漏极引脚隔离,并且进而与所述第一管芯隔离。
将与所述第二管芯连接的引脚与所述源极引脚和/或所述漏极引脚隔离在所述IC封装中实现了不同的电位和电流之间的更好的分离。传统上,所述第一管芯可以是半导体电源装置,其在较高的电位及电流之下被驱动,同时较低的电位和电流对于所述第二管芯中的控制电路的操作已经是足够的。这样,将所述第二管芯与所述源极引脚和/或所述漏极引脚隔离在所述集成电路的工作期间防止了两种电位之间的漏电电流。
根据另一方面,推荐了一种在集成电路IC封装中布置第一电子元件和第二电子元件的方法。所述方法包括提供包含第一电子元件的第一管芯、包含第二电子元件的第二管芯、以及从所述IC封装伸出,用于将所述IC封装与印刷电路板PCB电性连接的一个或更多个引脚(例如源极引脚)。具有平面表面的导电板被布置在所述第一管芯的平面表面的顶部上和所述一个或更多个引脚上,从而在所述第一管芯和所述一个或更多个引脚之间建立电性连接。
进一步地,导电固定件可以被连接在所述第一管芯下方以将所述第一管芯固定在所述导电板的平面表面与所述导电固定件之间。在此,所述导电固定件可以被电性地连接到用于将所述IC封装与所述PCB电性连接的其他引脚(例如漏极引脚)。所述导电固定件可以被设置成使得所述导电固定件的暴露的表面构成所述IC封装的外表面的一部分,进而使得所述导电固定件能够与所述PCB电性连接。
应当注意的是,如同在本文件中概述的包括其优选实施方式的方法和系统可以被单独地或者结合在本文件中公开的其他的方法和系统进行使用。此外,在系统的背景下概述的技术特征也适用于相应的方法。另外,在本文件中概述的方法和系统的所有方面可以被任意地组合。特别地,权利要求的技术特征能够被以任意的形式与彼此进行组合。
在本文件中,术语“耦接”、“连接”、“被耦接”或者“被连接”指的是元件彼此之间处于电性的连通状态,无论是例如通过导线的直接连接,还是以某些其他方式形成的连接。
附图说明
本发明被结合附图以示例性的方式在下面进行说明,其中
图1示出了示意性的现有技术的IC封装,其具有两个使用丝焊方式连接的管芯;
图2示出了示例性的具有三个管芯的IC封装的示意图;
图3示出了示例性的具有三个管芯的IC封装的侧视图;
图4示出了示例性的具有三个管芯的IC封装的另一个示意图;
图5示出了示例性的具有三个管芯的IC封装的俯视图;
图6示出了通过示例性的IC封装的两个截面;
图7示出了示例性的IC封装的外部示意图;
图8示出了示例性的具有暴露的管芯连接板的IC封装的另一个外部示意图;
图9示出了示例性的具有两个管芯的较小的IC DFN封装的示意图;
图10示出了示例性的具有两个管芯的较小的IC DFN封装的另一个示意图;
图11示出了示例性的导电板的一种设计变型;
图12示出了示例性的导电板的另一种设计变型;以及
图13示出了示例性的导电板的又一种设计变型。
具体实施方式
图1示出了一种示意性的IC封装1,其在现有技术中是已知的。所述IC封装1为基于SOIC 8L技术的引线框架式封装,具有安装在第一管芯连接板DAP191上的第一管芯110以及安装在第二DAP192上的第二管芯120。管芯110、120两者都通过例如管芯粘贴胶被安装在相应的DAP191、192上。所述第一管芯110实现了MOSFET,而所述第二管芯120实现了用于控制所述MOSFET的控制电路。所述IC封装1被用于机械保护的环氧树脂模具复合材料EMC包封。十二条焊线199将所述MOSFET的源极端与源极引线框架103电性连接,所述源极引线框架103接下来被与两条源极引线101、102电性连接。所述源极引线101、102可以被连接到外部的PCB,用于建立电性的接触。在图1中所描述的IC封装1中,需要所述十二条焊线199来提供所述MOSFET的对较高电流的需求。
图2示出了用于描述本文件中提供的方案的一种示例性的IC封装2的示意图。该示例性的IC封装2可以被认为是具有三个管芯的多芯片共同封装。第一管芯210包括MOSFET。第三管芯230可以是例如另一个MOSFET、BJT、或者集成无源器件IPD。所述IPD可以包括多个电阻、电感或电容。第二管芯220包括用于控制所述第一管芯210及所述第三管芯230的工作的控制电路。然而,在这里所述第一管芯并未被通过传统的铜质或金质导线与源极引线框架203和源极引线201、202连接。作为替代,导电板240被布置(a)在所述第一管芯210的顶部,处于包括所述MOSFET的源极引脚的区域中;以及(b)在所述源极引线框架203的顶部,用于在所述第一管芯210上的所述MOSFET源极端和所述源极引线201、202之间建立电性连接。具体而言,所述导电板的平面形的底部表面被同时电性连接到所述第一管芯210的平面表面和所述源极引线框架203。因此,所述导电板240在所述MOSFET的源极端和所述源极引线201、202之间实现了电性连接。
相比于图1中的焊线199,所述导电板240实现了具有低电阻和低电感的电性接触。此外,从所述第一管芯210到所述源极引线框架203的热流量以及散热被实质性地改善了。与此同时,所述导电板240还用作用于在所述导电板240的顶部安装所述第三管芯230的管芯连接板DAP。在所述被描绘出的配置中,所述导电板被至少部分地夹持在所述第一管芯210和所述第三管芯230之间。在图2中,包括所述控制电路的所述第二管芯210仍然被布置在DAP292的顶部。
所述MOSFET的栅极端211被布置在所述第一管芯210的一个表面上,该表面邻近于(也就是共面于)所述第一管芯210的被所述导电板240覆盖的平面表面。也就是说,所述导电板240的尺寸被选择成仅覆盖所述MOSFET的源极端。所述MOSFET的栅极端211是未被覆盖的,并且能够通过丝焊方式被连接至所述IC封装2内部的其他元件,例如连接至所述第二管芯220内部的控制电路以及/或者也可能连接到所述第三管芯230。
所述MOSFET的漏极端被安装在所述第一管芯210的一个表面上,该表面与所述第一管芯210的与所述导电板240接触的表面相反。如同在图2中可见的那样,IC封装2提供了导电固定件250,用于将所述第一管芯210固定在在所述导电连接件250和所述导电板240之间,并且还用于在所述MOSFET的漏极端和三个漏极引线204、205、206之间建立电性连接。
图3示出了从不同的角度观察的所述示例性的IC封装2。图3示出了在所述第一管芯210及所述第三管芯230的区域中通过所述IC封装2的截面。在图3和下面的所有附图中,相同或相似的参考标号代表被显示的IC封装中的相同或相似的物体。特别地,图3显示出所述导电固定件250实际上包括被表现为暴露的导电平板251的第一部分以及被表现为下沉部件252的第二部分。所述暴露的导电板251被布置在所述第一管芯210下方并且将所述第一管芯210(至少部分地)夹持在其自身与所述导电板240之间。所述导电板240和所述暴露的导电板251在基本上彼此平行的分层中延伸。此外,当所述IC封装被贴附到外部的PCB表面上的时候,后续的分层也与所述外部的PCB表面在其中延伸的分层平行。所述外部的PCB表面被用虚线表示在图3中并且使用参考标号99标示。
所述暴露的导电板251构成所述IC封装2的外部表面的一部分,从而使得所述暴露的导电板251能够连接到外部的PCB。这样,所述暴露的导电板251可以将所述MOSFET的漏极与所述PCB直接连接。此外,所述暴露的导电板251通过所述下沉部件252被连接至漏极引线框架207以及漏极引线204、205、206。因此,所述暴露的导电板251也可以通过漏极引线204、205、206将所述MOSFET的漏极与所述PCB间接地连接。
所述第三管芯230可以被进一步用来建立到达所述导电板240的电性连接。为此目的,所述第三管芯230的底部表面的至少一部分可以包括导电材料。再次申明,所述源极引线201、203和所述第三管芯230之间的丝焊连接是被避免的。如同在图3中所示,焊线231可以将所述第三管芯230的输出端和所述漏极引线框架207连接。
图3进一步揭露了所述导电板240包括环氧树脂层241,用于将所述导电板240粘合到所述源极引线框架203上以及所述第一管芯210的顶部表面上。图4示出了从又一个角度观察的所述IC封装2。
图5及6使用两个不同种类的下沉结构配置阐明了IC封装2的分离垫片设计。一方面,图5示出了IC封装2的俯视图,其中虚拟的分隔线1000表示出物理的间隙被设置在IC封装2中,位于和所述第一管芯210及所述第三管芯230连接的高压节点、以及与所述第二管芯220连接的低压节点之间。高压节点包括例如所述源极引线201、202、所述源极引线框架203、所述导电板240、所述漏极引线框架207、以及所述漏极引线204、205、206。低压节点包括例如包含所述控制电路的所述第二管芯220、与所述源极引线201、202布置在所述IC封装2的同一侧(并且可以被通过焊线被连接至所述第二管芯220)的控制引线208、以及与所述漏极引线204、205、206布置在所述IC封装2的同一侧(并且可以被通过焊线连接至所述第二管芯220)的控制引线209。沿着分隔线1000的所述物理间隙将所述高压节点与所述低压节点电性隔离,并且在所述IC的工作期间有效地避免了任何的泄漏电流。
另一方面,图6示出了通过所述IC封装2的两个截面,其用于说明所述三个管芯相对于外部的PCB表面被布置的不同高度。所述第一截面601与在图3中描绘的截面相似,并且示出了所述第一管芯210及所述第三管芯230的区域中(也就是所述高压节点的区域中)的IC封装2。所述第二截面602示出了所述第二管芯220的区域中(也就是所述低压节点的区域中)的IC封装2。为了更好地比较,图6中包含有指示所述IC封装2的顶部水平面91和底部水平面92的虚线。在所述顶部水平面,所述源极的和漏极的引线框架203、207传统上被设置在现有的IC封装中,用来通过相应的引线建立与PCB的电性连接。在所述底部水平面,一种用于将所述IC封装2与PCB连接的新的可能性通过所述暴露的导电板251被提供出来。相比于经过传统引线的连接,所述暴露的导电板251提供了给所述PCB的优良的散热以及具有较低的电阻及电感的电性连接。
通过在图6中把所述第一截面601与所述第二截面602进行比较,显而易见的是,仅有导电固定件250可以与所述外部的PCB直接连接,而且DAP192是例如被模具复合物覆盖的,并且其因此只有通过引线208、209才能够与所述外部PCB连接。
此外,在研究图6时,显而易见的是所述第二管芯220和所述第三管芯230两者都被布置在所述顶部水平面91上方。在此,所述第二管芯220被安装在所述导电板240的顶部,而所述第三管芯230被安装在所述第二DAP192的顶部。然而,所述第一管芯210位于所述第一水平面91的下方并且被通过所述导电固定件250与所述IC封装的外部表面连接。因此,所述第一管芯210和所述第二管芯220之间的距离不仅是通过沿着分隔线1000设置间隙而被增大,而且也由于所述IC封装2中的各个管芯被布置在其上的,特别是用于所述第一管芯中的MOSFET的不同的高度/水平面而增加。
图7及8从两个不同的视角示出了IC封装2的两种外部示意图。IC封装2可以通过八个引线201、202、204、205、206、208及209与外部的PCB电性地连接。此外,在所述IC封装2的底部一侧,描绘了暴露的导电板251。所述暴露的导电板251的表面可以被设计得足够大,以允许布置在所述IC封装2内部的半导体电源装置所需要的高电流。
图9及10示出了第二种示例性的IC封装3的不同的立体图,其使用导电板340来高效地装配所述第一管芯310和所述第二管芯320。该IC封装3是以DFN 8L技术为基础的,并且包括两个输入焊盘/引脚301及302,它们被通过输入框架303与所述导电板340的底部表面连接。如同就IC封装2进行详细描述的那样,导电板340允许所述第一管芯310和所述第二管芯320两者的在空间上有效的组装。同样地,所述第一管芯310可以是电源装置,而所述第二管芯320可以是用于控制所述电源装置的控制电路。所述第一管芯310和所述第二管芯320被布置在所述导电板340的相对的两侧。
进一步地,所述导电板340和所述输入框架303之间的较大范围的重叠实现了优良的电气和热学性能。导电固定件将所述第一管芯310的漏极端(a)与所述IC封装3的后侧、以及(b)与所述输出焊盘/引脚304、305电性连接。
最后,图11、12及13示出了不同的导电板60、70、80,它们可以被用于上述的IC封装2及3中。一般而言,所述导电板的顶部表面的至少一部分可以包括凹陷或凸起,用于提高模具复合材料的锁定能力以及避免分层现象。所述分层现象可以发生在例如位于例如由金属制成的所述导电板和所述模具复合材料的电介质材料之间的界面处。图11示出了一种示例性的导电板60,其具有矩形形状的坝槽。所述坝槽可以是例如密纹结构。此外,图11示出了围绕着被安装在所述导电板60顶部的所述管芯220、230、320、330形成的用于排出环氧树脂的沟槽61。进一步地,图11示出了为进行丝焊连接而保留的下方限定/地面限定区域。例如,所述区域62可以被用于通过焊线63建立到达位于所述导电板60顶部的所述管芯的电性连接。
图12示出了一种示例性的导电板70,其具有三角形形状的V形凹槽。所述V形凹槽可以例如通过冲压工艺被添加到所述导电板70上。作为备选方案,图13示出了一种示例性的导电板80,其具有U形凹槽(例如陷斑)。所述U形凹槽可以例如通过蚀刻工艺被添加到导电板80上。
应当注意的是,上述的叙述和图示仅仅是说明了所推荐的方法和系统的基本原理。本领域技术人员将能够实现多种布置方式,这些布置方式在这里虽然没有被明确地描述或显示,但是它们体现了本发明的基本原理并且也被包括在它的精神和范围之内。此外,在本文件中概述的所有示例和实施方式在原则上明确地意味着仅仅用于解释性的目的,用以帮助读者理解所建议的方法和系统的原理。另外,在此提供了本发明的原理、方面、实施方式、以及其具体示例的所有陈述都意味着包含了它们的等效变换形式。
Claims (23)
1.一种集成电路IC封装,包括:
第一引脚和第二引脚,其中所述第一引脚和所述第二引脚均从所述IC封装伸出,用于将所述IC封装与印刷电路板PCB电性连接的;
引脚框架,所述引脚框架在所述第一引脚和所述第二引脚之间延伸,并连接所述第一引脚和所述第二引脚;
包含有第一电子元件的第一管芯;
包含有第二电子元件的第二管芯;以及
具有扁平立方体形状的导电板,其中所述导电板的连续平面矩形表面的底部被电性地连接到所述引脚框架,并且所述导电板从所述第一管芯延伸到所述引脚框架;
其中所述导电板的所述连续平面矩形表面的另一底部连接到所述第一管芯的平面表面,从而在所述第一管芯和所述引脚框架之间建立电性连接。
2.根据权利要求1所述的IC封装,其中所述第一引脚和所述第二引脚被电性地连接到所述导电板的连续平面矩形表面。
3.根据权利要求1或2所述的IC封装,其中所述第一电子元件为晶体管而所述第二电子元件为用于控制所述晶体管的工作的控制电路。
4.根据权利要求1所述的IC封装,进一步包括至少一个控制引脚,其中所述第二管芯被通过丝焊方式与所述至少一个控制引脚连接,用于建立与所述PCB的电性接触,且所述至少一个控制引脚与被电性地连接到所述导电板的所述第一引脚和所述第二引脚隔离。
5.根据权利要求1所述的IC封装,其中所述第一管芯和所述第一引脚和所述第二引脚之间的电性连接被仅仅通过所述导电板建立。
6.根据权利要求1所述的IC封装,其中所述导电板的与所述连续平面矩形表面相反的表面的至少一部分包括凹陷或凸起。
7.根据权利要求1所述的IC封装,进一步包括包含有第三电子元件的第三管芯,其中所述第三管芯的表面被贴附到所述导电板的与所述连续平面矩形表面相反的表面,从而使得所述导电板被至少部分地夹持在所述第一及第三管芯之间。
8.根据权利要求7所述的IC封装,其中所述导电板被配置用来在所述第一管芯与所述第三管芯之间建立电性连接。
9.根据权利要求1所述的IC封装,其中所述第二管芯的表面被贴附到所述导电板的与所述连续平面矩形表面相反的表面,从而使得所述导电板被至少部分地夹持在所述第一及第二管芯之间。
10.根据权利要求1所述的IC封装,其中被包含在所述第一管芯中的所述第一电子元件是金属氧化物半导体场效应晶体管MOSFET,且所述第一管芯的平面表面包含有所述MOSFET的源极端。
11.根据权利要求1所述的IC封装,包括其他引脚,其中所述其他引脚被贴附到导电固定件,所述固定件被配置用来将所述第一管芯固定在所述导电板的连续平面矩形表面和所述导电固定件之间。
12.根据权利要求11所述的IC封装,其中所述其他引脚从所述IC封装的与被连接至所述导电板的所述第一引脚和所述第二引脚相反的一侧伸出。
13.根据权利要求11所述的IC封装,其中当所述IC封装被连接到外部的PCB板时,所述导电板被布置成与外部的PCB板平行。
14.根据权利要求11所述的IC封装,其中所述导电固定件的暴露的表面构成所述IC封装的外部表面的一部分,从而使得所述导电固定件能够与所述PCB电性地连接。
15.根据权利要求14所述的IC封装,其中所述暴露的表面沿着与所述导电板的连续平面矩形表面实质上平行的平面延伸。
16.根据权利要求11所述的IC封装,其中被包含在所述第一管芯中的所述第一电子元件是MOSFET,且所述导电固定件的未暴露的表面被设置用来在所述导电固定件和所述第一管芯的包含所述MOSFET的漏极端的第二表面之间建立电性连接。
17.根据权利要求11所述的IC封装,进一步包括至少一个其他控制引脚,其中所述第二管芯被通过丝焊方式与所述至少一个其他控制引脚连接,以建立与所述PCB的电性接触,并且所述至少一个其他控制引脚与所述其他引脚隔离。
18.根据权利要求1所述的IC封装,其中所述第一管芯具有基本上为立方体的形状。
19.根据权利要求1所述的IC封装,其中所述导电板的连续平面矩形表面包括导电环氧树脂。
20.根据权利要求1所述的IC封装,其中所述IC封装为小外形集成电路SOIC封装或双列扁平无引线DFN封装。
21.在集成电路IC封装中布置第一电子元件和第二电子元件的方法,所述方法包括:
提供包含有所述第一电子元件的第一管芯、包含有所述第二电子元件的第二管芯、以及第一引脚和第二引脚,其中所述第一引脚和所述第二引脚从所述IC封装伸出,用于将所述IC封装与印刷电路板PCB电性连接,并且其中引脚框架在所述第一引脚和所述第二引脚之间延伸;以及
在所述第一管芯的平面表面的顶部上布置具有扁平立方体形状和连续平面矩形表面的导电板,从而在所述第一管芯和所述引脚框架之间建立电性连接。
22.根据权利要求21所述的方法,进一步包括:
在所述第一管芯下方连接导电固定件,以将所述第一管芯固定在所述导电板的连续平面矩形表面和所述导电固定件之间;其中所述导电固定件被电性地连接到其他引脚,用于将所述IC封装与所述PCB电性连接。
23.根据权利要求22所述的方法,进一步包括:
对所述导电固定件进行布置,从而使所述导电固定件的暴露的表面构成所述IC封装的外部表面的一部分,进而使得所述导电固定件能够与所述PCB电性地连接。
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