CN114203659A - 多层互连带 - Google Patents
多层互连带 Download PDFInfo
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- CN114203659A CN114203659A CN202111024889.3A CN202111024889A CN114203659A CN 114203659 A CN114203659 A CN 114203659A CN 202111024889 A CN202111024889 A CN 202111024889A CN 114203659 A CN114203659 A CN 114203659A
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- Prior art keywords
- metal layer
- metal
- tape
- interconnect
- side metallization
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Abstract
本发明涉及多层互连带。一种半导体封装组件包括:载体,该载体具有管芯附着表面和与管芯附着表面分离的接触焊盘;安装在管芯附着表面上的半导体管芯,该半导体管芯包括背对管芯附着表面的正面金属化体;互连带,该互连带附着到半导体管芯和接触焊盘,使得互连带将正面金属化体电连接到接触焊盘;以及包封互连带的至少一部分和半导体管芯的电绝缘包封体。互连带包括第一金属层和第二金属层的层堆叠体,第二金属层形成在第一金属层的顶部上。第一金属层包括与第二金属层不同的金属。第一金属层面向正面金属化体。
Description
技术领域
本发明的实施例总体上涉及半导体封装,并且更具体而言,涉及电互连结构和技术。
背景技术
半导体封装被设计为在半导体管芯和诸如印刷电路板(PCB)之类的外部装置之间提供连接兼容性,并且保护半导体管芯免受潜在的破坏性环境条件的影响,所述破坏性环境条件诸如是温度变化、湿气、灰尘颗粒等。功率半导体器件,例如功率晶体管、二极管等,被用于各种广泛应用中以控制大电流(例如至少1安培)和/或大电压(例如至少100伏特)。
针对低电阻和高效散热来设计用于功率半导体器件的半导体封装。半导体封装中的当前互连解决方案具有各种缺点。例如,接合线提供了低电流承载能力,并且因此增加了封装电阻。另一方面,金属互连夹需要大的接合表面。
因此,需要半导体封装中的改进的互连技术。
发明内容
公开了一种半导体封装组件。根据一个实施例,半导体封装组件包括:载体,该载体包括管芯附着表面和与管芯附着表面分离的接触焊盘;安装在管芯附着表面上的半导体管芯,该半导体管芯包括背对管芯附着表面的正面金属化体(metallization);互连带,该互连带附着到半导体管芯和接触焊盘,使得互连带将正面金属化体电连接到接触焊盘;以及包封互连带的至少一部分和半导体管芯的电绝缘包封体。互连带包括第一金属层和第二金属层的层堆叠体,第二金属层形成在第一金属层的顶部上。第一金属层包括与第二金属层不同的金属。第一金属层面向正面金属化体。
单独地或组合地,第一金属层直接接触正面金属化体。
单独地或组合地,第一金属层与正面金属化体熔合在一起。
单独地或组合地,第一金属层和正面金属化体均包括第一金属,并且第二金属层包括不同于第一金属的第二金属。
单独地或组合地,第一金属是Al或Al的合金。
单独地或组合地,第二金属是Cu或Cu的合金。
单独地或组合地,第二金属具有比第一金属高的电导率,并且第二金属层比第一金属层厚。
单独地或组合地,所述互连带的上表面在包封体的上表面处暴露。
单独地或组合地,所述互连带包括基本上平行于包封体的上表面的平坦跨越部(flat span),并且所述互连带的暴露的上表面包括平坦跨越部中的第二金属层的上表面区域。
单独地或组合地,载体是金属引线框架,其包括管芯焊盘和从管芯焊盘延伸离开的多条引线,管芯焊盘包括管芯附着表面,并且接触焊盘是到多条引线中的一条或多条引线的电连接点。
公开了一种制造半导体封装组件的方法。根据一个实施例,该方法包括:提供载体,该载体包括管芯附着表面和与管芯附着表面分离的接触焊盘;将半导体管芯安装在管芯附着表面上,该半导体管芯包括在安装之后背对管芯附着表面的正面金属化体;将互连带附着到半导体管芯和接触焊盘,使得互连带将正面金属化体电连接到接触焊盘;以及形成包封互连带的至少一部分和半导体管芯的电绝缘包封体。互连带包括第一金属层和第二金属层的层堆叠体,第二金属层形成在第一金属层的顶部上。第一金属层包括与第二金属层不同的金属。在附着之后,第一金属层面向正面金属化体。
单独地或组合地,将互连带附着到正面金属化体包括在第一金属层和正面金属化体之间形成直接电连接。
单独地或组合地,形成直接电连接包括在没有中间接合材料的情况下将第一金属层和正面金属化体熔合在一起。
单独地或组合地,将第一金属层和正面金属化体熔合在一起包括不施加热的超声引线接合工艺。
单独地或组合地,第一金属层和正面金属化体均包括第一金属,并且第二金属层包括不同于第一金属的第二金属。
单独地或组合地,在形成包封体之后,所述互连带的上表面在包封体的上表面处暴露。
单独地或组合地,该方法还包括在附着互连带期间或之后在互连带中形成平坦跨越部,并且所述互连带的暴露的上表面包括平坦跨越部中的第二金属层的上表面区域。
单独地或组合地,形成平坦跨越部包括在附着互连带期间执行的成环技术(looping technique)。
单独地或组合地,形成平坦跨越部包括在形成电绝缘包封体期间对互连带进行压处理。
单独地或组合地,形成平坦跨越部包括在形成电绝缘包封体之后对互连带平坦化。
附图说明
附图中的元件不一定相对于彼此成比例。相同的附图标记表示相应的类似部件。各种所示实施例的特征可以组合,除非它们彼此排斥。在附图中示出了实施例并在随后的描述中详细说明了实施例。
图1A示出了互连带的侧视图,并且图1B示出了互连带沿着图1A中标记的平面I-I'的截面图。
图2示出了根据实施例的半导体封装组件的侧视图,半导体封装组件包括具有包封体的轮廓的互连带。
图3A示出了具有包封体的轮廓的半导体封装组件的平面图,并且图3B示出了包括包封体的半导体封装组件的平面图。
具体实施方式
本文描述了具有互连带的半导体封装组件的实施例,该互连带被有利地配置用于无焊料附着和高电流承载能力。互连带具有多层配置,该多层配置具有第一金属层和形成在第一金属层顶部上的第二金属层。第一金属层和第二金属层包括被选择以满足不同设计标准的不同金属。例如,第一金属层可以包括有助于与半导体管芯和/或接触表面机械附着的金属。同时,第二金属层可以包括具有比第一金属层更高的电导率的金属,从而降低互连带的电阻。互连带可被配置为使得互连带的上表面从包封体暴露。互连带的这个暴露的上表面区域可以与外部热沉进行界面相接,从而允许半导体封装组件的有效冷却。
参考图1A-1B,示出了根据实施例的互连带100。术语“互连带”是指用于在两个导电表面之间提供电连接的特定类型的电连接器,所述导电表面例如是来自半导体管芯的焊盘和引线的接合表面。互连带由导电金属形成,并具有宽度超过其厚度的扁平截面占用区域(footprint)。作为比较,用于在两个导电表面之间提供电连接的另一种类型的电连接器是接合线。接合线由具有圆形或近似圆形截面的机械柔性导线形成。接合线通常具有比互连带更小的截面积。因此,在所有其他因素相同的情况下,互连带具有比相同长度的接合线更大的电流承载能力。用于在两个导电表面之间提供电连接的另一种类型的电连接器是互连夹。互连夹由基本刚性的片状金属板形成。尽管在所有其他因素相同的情况下,互连夹可以提供比相同长度的互连带更大的电流承载能力,但是由于互连夹形状不能像互连带一样容易地与轮廓相合,所以互连夹提供了较小的机械通用性。此外,互连夹通常必须被焊接到接触表面。这增加了工艺的成本和复杂性,并且需要更大的接合表面以解决“焊料渗出”问题,即焊接副产物问题,其中回流的焊料材料从焊接元件的占用区域膨胀出来。
互连带100由导电金属条提供,该导电金属条可以缠绕在卷轴上。互连带100的宽度(W)可以大于互连带100的厚度(T)。例如,如图1B的截面图所示,互连带100可以具有大于1的宽高比(即,宽度(W)与厚度(T)的比率)。在各种实施例中,该宽高比可以是大约3:1、5:1、10:1等。用数字术语表示,例如,互连带100的宽度(W)通常可以在0.5mm-10mm的范围内,优选在0.5mm-2mm的范围内,并且互连带100的厚度(T)(在小于宽度时)通常可以在0.05mm-5mm的范围内,优选在0.05mm-0.4mm的范围内。
互连带100包括第一金属层102和第二金属层104(第二金属层104形成在第一金属层102顶部上)的层堆叠体。这意味着在互连带100的截面平面中(例如,如图1B所示),第一金属层102和第二金属层104彼此上下堆叠。第二金属层104提供互连带100的上表面108,并且第一金属层102提供互连带100的下表面106。互连带100的下表面106可以是与通过互连带100连接的元件的接触表面进行界面相接的表面。代替所示的两层配置,互连带100的其他实施例包括具有以类似方式彼此上下堆叠的三个或更多个金属层的层堆叠体。
第一金属层102包括与第二金属层104不同的金属。例如,第一金属层102可以包括Al、Cu、Ni、Ag、Au、Pd、Pt、Ni等及其合金中的任何一种或多种,并且第二金属层104可以包括Al、Cu、Ni、Ag、Au、Pd、Pt、Ni等及其合金中的任何不同的一种或多种。这些不同金属的选择可以基于不同的标准。例如,第一金属层102可以包括相对于第二金属层104的金属更适宜用于与特定接触表面附着的金属。同时,第二金属层104可以包括相对于第一金属层102的金属更散热和/或更导电的金属。单独地或组合地,第二金属层104可以比第一金属层102厚。这种布置通过使第二金属层104占据互连带100的大部分截面厚度而利用了两层之间的改进的导电性。在另一实施例中,第二金属层104可以包括可焊接的金属,这提供了额外的优点,即外部散热器可以焊接或附着到第二金属层104。
参考图2和图3A-3B,示出了根据实施例的包括互连带100的半导体封装组件200。半导体封装组件200包括载体202。载体202包括管芯附着表面204和与管芯附着表面204物理分离的接触焊盘206。管芯附着表面204和接触焊盘206可以包括或镀有各种导电金属,例如Cu、Al、Ni、Ag、Au、Pd、Pt、Ni等。在所示的实施例中,载体202是引线框架结构,其包括管芯焊盘208和从管芯焊盘208延伸离开的多条引线210。管芯附着表面204设置在管芯焊盘208上,并且接触焊盘是与引线210合并的结构的一部分。接触焊盘206可以包括从引线框架暴露的裸露金属,例如Cu、Al等,或覆盖引线框架的基底金属的Ni、NiP等的镀层。在另一实施例中,载体202可以是用于无引线封装的引线框架,这意味着引线210将在最终无引线封装的底表面处暴露。
在所示的实施例中,接触焊盘206和引线210相对于管芯附着表面204垂直偏移。在其他实施例(未示出)中,接触焊盘206和/或引线210可以设置在与管芯附着表面204相同的平面上。在所示的实施例中,接触焊盘206设置在与每条引线210合并的公共焊盘结构上。在其他实施例中,接触焊盘206可以由单条引线210提供或连接到单条引线210。
在其他实施例中,载体202可以是提供的全局电路载体,该载体在其上容纳多个电子部件。这些全局电路载体的示例包括PCB(印刷电路板)和功率模块衬底,例如DBC(直接敷铜)衬底、AMB(活性金属钎焊)衬底等。在这种情况下,管芯附着表面204和接触焊盘206可以由形成在全局电路载体上的两个分离的接合焊盘提供。
半导体封装组件200包括安装在管芯附着表面204上的半导体管芯212。可以在半导体管芯212与管芯附着表面204之间提供例如焊料、烧结物、胶带、胶水等粘合剂以实现该接合。半导体管芯212包括背对管芯附着表面204的正面金属化体214。正面金属化体214是半导体管芯212的可从外部访问的最上方金属层。正面金属化体214可以被构造为接合焊盘,其提供去往半导体管芯212的端子连接(例如,源极、漏极、阳极、发射极等)。正面金属化体214可以包括各种导电金属中的任何一种,例如Cu、Al、Ni、Ag、Au、Pd、Pt、Ni等及其合金。
一般而言,半导体管芯212可以具有各种各样的器件配置。这些器件配置的示例包括诸如晶体管管芯、二极管管芯等分立半导体器件,以及诸如逻辑器件、控制器、传感器等集成半导体器件。半导体管芯212可以被配置为垂直器件,即,在垂直于半导体主体的主(上)表面的方向上穿过半导体管芯212的厚度进行导电的器件。可替换地,半导体管芯212可以被配置为横向器件,即,在平行于半导体主体的主(上)表面的方向上进行导电的器件。半导体管芯212的半导体主体可以包括各种半导体材料中的任何一种,包括IV型半导体,例如硅、硅锗、碳化硅等,以及III-V型半导体,例如氮化镓、砷化镓等。
根据实施例,半导体管芯212被配置为功率器件,即被配置为控制100V或更大的量级的电压和/或1安培或更大的电流的器件。这些器件的示例包括功率二极管和功率晶体管器件,例如MOSFET(金属氧化物半导体场效应晶体管)、IGBT(绝缘栅双极晶体管)、HEMT(高电子迁移率晶体管)。在这些实施例中,正面金属化体214可以包括器件的负载端子(例如,源极、发射极、阳极等)。半导体管芯212的相对负载端子(例如,漏极、集电极、阴极等)可以由半导体管芯212的背面金属化体216提供。所示出的实施例仅包括在半导体管芯的主表面上的一个接合焊盘,其可以对应于功率二极管的阳极或阴极。功率晶体管可以具有类似的配置,但是具有在主上表面上提供的单独连接到不同引线的单独控制端子(例如,栅极)。
半导体封装组件200包括附着到半导体管芯212和接触焊盘206并且提供正面金属化体214和接触焊盘206之间的电连接的互连带100。所示的半导体封装组件200包括彼此并联连接的两个互连带100。更一般地,半导体封装组件200的实施例可以包括任何数量的互连带100,例如,一个、两个、三个等。互连带100可以彼此并联连接(如图所示)以降低特定电连接的电阻。另外或替代地,多个互连带100可以用在一个封装中以提供不同的电连接。
互连带100被布置成具有面向正面金属化体214和接触焊盘206的第一金属层102。根据实施例,第一金属层102直接接触正面金属化体214。在这种情况下,互连带100和第一金属层102之间的电连接通过这些元件之间的直接物理接触来提供。在更具体的示例中,第一金属层102与正面金属化体214熔合在一起。这意味着在第一金属层102的金属和正面金属化体214的金属之间(以超声方式)提供金属接合,使得这些元件彼此内聚地结合。结果,在互连带100和正面金属化体214之间存在稳定的机械连接。第一金属层102也可以以类似的方式与接触焊盘206熔合。
根据实施例,第一金属层102和正面金属化体214均包括第一金属。通过将第一金属层102和正面金属化体214形成为包括共同的第一金属,可以使用诸如超声楔形引线接合之类的无焊料附着技术将第一金属层102与正面金属化体214熔合,其细节将在下面被进一步详细描述。在一个具体的示例中,第一金属是Al或Al的合金。同时,第二金属层104包括不同于第一金属的第二金属。在一个具体的示例中,第二金属是Cu或Cu的合金。由于Cu的电导率是Al的电导率的大约两倍,所以这种布置有利地使用Cu的材料特性来降低互连带100的电阻。第二金属层104的厚度可以大于第一金属层102的厚度,以增强第二金属对互连带100的电阻的有益影响。在一个示例中,互连带100具有在约0.1mm与0.5mm厚之间的总厚度,其中第二金属层104具有互连带100的总厚度的至少60%的厚度。
半导体封装组件200包括包封半导体管芯212的包封体218。包封体218包括密封并保护互连带100的至少一部分和半导体管芯212的电绝缘包封材料。该包封材料可以包括环氧树脂材料、热固性塑料等。包封体218包括下表面220、与底部下表面220相对的上表面222、以及在下表面和上表面之间延伸的边缘表面224。在所示的配置中,管芯焊盘208的下表面在包封体218的下表面220处暴露,引线210从边缘表面224突出,这些结构中的每一个都提供了封装的外部可访问的端子。各种其他封装配置是可能的,例如无引线、扁平引线、弯曲引线等。在载体202是提供的例如PCB、功率模块衬底之类的全局电路载体202的情况下,包封体218可以由直接形成在载体202上的诸如环氧树脂之类的绝缘体区域提供,或者可以完全省略包封体218。
根据一个实施例,互连带100的上表面108在包封体218的上表面226处暴露。在这种布置中,互连带100的暴露的上表面108提供用于外部热沉(未示出)的界面,从而提供用于耗散由半导体管芯212产生的热的热传递路径。为此,第二金属层104的金属可以被选择为与第一金属层102相比具有更优的热性能和/或非常适于与外部热沉进行界面相接。第二金属层104包括Cu或Cu的合金的上述示例代表了在这方面有利的材料选择的一个示例。
根据实施例,互连带100包括基本上平行于(例如,在+/-5度内)包封体218的上表面222的平坦跨越部110。平坦跨越部110是互连带100的沿着单个平面延伸的部分。互连带100的暴露上表面108包括在平坦跨越部110中的第二金属层104的上表面区域。互连带100的上表面108基本上平行于(例如,在+/-5度内)包封体218的上表面222延伸。如图所示,互连带100的暴露上表面108稍微偏离包封体218的上表面222。在其他实施例中,互连带100的暴露上表面108可以与包封体218的上表面共面。
可以根据以下技术来制造半导体封装组件200。首先,提供载体202。在载体202是引线框架的情况下,引线框架可以以条带形式提供,其中在每个条带中具有多个单元引线框架。随后,例如使用诸如焊料、胶带等粘合剂将半导体管芯212安装在管芯附着表面204上。
在安装半导体管芯212之后,可以将互连带100附着到正面金属化体214和接触焊盘206。这种附着形成了表面之间的电连接和稳定的机械接合。根据实施例,第一金属层102与正面金属化体214熔合在一起,而没有任何中间导电接合材料设置在互连带100和正面金属化体214之间。即,在第一金属层102和正面金属化体214之间不提供焊接材料。在无焊料附着技术的一个示例中,正面金属化体214和第一金属层102通过超声引线接合而熔合在一起。根据该技术,使正面金属化体214和第一金属层102彼此直接接触,并且向表面施加高于可听到水平的高频(即,超声)的横向振动(sideways vibration)。该能量引起两个金属区域之间的熔合。超声能量的施加可以与机械压力结合以加速该过程。该过程可以在不施加热量的情况下进行。可以使用相同的技术将互连带100的第一金属层102接合到接触焊盘206。
在将互连带100附着到半导体管芯212和接触焊盘206之后,可以执行包封工艺以形成包封体218。可以通过诸如注射成型、传递成型、压缩成型等成型工艺形成包封体218。
可以使用各种不同的技术来将互连带100形成为具有平坦跨越部110和/或具有从包封体218的上表面222暴露的互连带100的上表面108。根据一种技术,在附着过程期间,例如通过执行成环技术来操控互连带100的几何形状。根据该工艺,附着到互连带的工艺工具同时操控互连带以在互连带100中形成有角的弯曲部,从而形成平坦跨越部110。互连带100的基本几何形状在包封期间可以保持完整,使得互连带100的上表面108与模腔齐平,并且因此从模制化合物暴露。可替换地或另外地,互连带100在包封之前可以具有弯曲的几何形状,并且模制工具可以在包封体218的形成期间对互连带100进行压处理,使得在模制完成之后互连带100的上表面基本上平行于包封体218的上表面222。可替换地或另外地,可以在形成包封体218之后执行研磨工艺。根据该技术,有意地以互连带100中的某些部分从包封体218突出的方式形成包封体218。就互连带100的从包封体218突出的部分中存在的任何弯曲而言,可以通过诸如研磨或抛光之类的平坦化技术消除该弯曲,使得互连带100的暴露上表面变得与包封体218的上表面222基本平行(并且可选地共面)。
为了便于描述,使用诸如“下方”、“下部”、“下面”、“上方”、“上部”等空间相对术语来解释一个元件相对于第二元件的定位。这些术语旨在涵盖除了与图中所示的那些取向不同的取向之外的器件的不同取向。此外,诸如“第一”、“第二”等术语也用于描述各种元件、区域、部分等,并且也不旨在是限制性的。在整个说明书中,相同的术语指代相同的元件。
如本文所用的,术语“具有”、“含有”、“包含”、“包括”等是开放式术语,其指示所陈述的元件或特征的存在,但不排除另外的元件或特征。冠词“一”、“一个”和“所述”旨在包括复数以及单数,除非上下文另有明确指示。
考虑到上述变化和应用的范围,应当理解,本发明不受前面的描述限制,也不受附图限制。相反,本发明仅由所附权利要求及其合法等同方案来限制。
Claims (20)
1.一种半导体封装组件,包括:
载体,所述载体包括管芯附着表面和与所述管芯附着表面分离的接触焊盘;
半导体管芯,所述半导体管芯安装在所述管芯附着表面上,所述半导体管芯包括背对所述管芯附着表面的正面金属化体;
互连带,所述互连带附着到所述半导体管芯和所述接触焊盘,使得所述互连带将所述正面金属化体电连接到所述接触焊盘;以及
电绝缘包封体,所述电绝缘包封体包封所述互连带的至少一部分和所述半导体管芯,
其中,所述互连带包括第一金属层和第二金属层的层堆叠体,所述第二金属层形成在所述第一金属层的顶部上,
其中,所述第一金属层包括与所述第二金属层不同的金属,并且
其中,所述第一金属层面向所述正面金属化体。
2.根据权利要求1所述的半导体封装组件,其中,所述第一金属层直接接触所述正面金属化体。
3.根据权利要求2所述的半导体封装组件,其中,所述第一金属层与所述正面金属化体熔合在一起。
4.根据权利要求1所述的半导体封装组件,其中,所述第一金属层和所述正面金属化体均包括第一金属,并且其中,所述第二金属层包括不同于所述第一金属的第二金属。
5.根据权利要求4所述的半导体封装组件,其中,所述第一金属是Al或Al的合金。
6.根据权利要求4所述的半导体封装组件,其中,所述第二金属是Cu或Cu的合金。
7.根据权利要求4所述的半导体封装组件,其中,所述第二金属具有比所述第一金属高的电导率,并且其中,所述第二金属层比所述第一金属层厚。
8.根据权利要求1所述的半导体封装组件,其中,所述互连带的上表面在所述包封体的上表面处暴露。
9.根据权利要求8所述的半导体封装组件,其中,所述互连带包括基本上平行于所述包封体的上表面的平坦跨越部,并且其中,所述互连带的暴露的上表面包括所述平坦跨越部中的所述第二金属层的上表面区域。
10.根据权利要求1所述的半导体封装组件,其中,所述载体是金属引线框架,其包括管芯焊盘和从所述管芯焊盘延伸离开的多条引线,其中,所述管芯焊盘包括所述管芯附着表面,并且其中,所述接触焊盘是到所述多条引线中的一条或多条引线的电连接点。
11.一种制造半导体封装组件的方法,所述方法包括:
提供载体,所述载体包括管芯附着表面和与所述管芯附着表面分离的接触焊盘;
将半导体管芯安装在所述管芯附着表面上,所述半导体管芯包括在所述安装之后背对所述管芯附着表面的正面金属化体;
将互连带附着到所述半导体管芯和所述接触焊盘,使得所述互连带将所述正面金属化体电连接到所述接触焊盘;以及
形成包封所述互连带的至少一部分和所述半导体管芯的电绝缘包封体,
其中,所述互连带包括第一金属层和第二金属层的层堆叠体,所述第二金属层形成在所述第一金属层的顶部上,
其中,所述第一金属层包括与所述第二金属层不同的金属,并且
其中,在所述附着之后,所述第一金属层面向所述正面金属化体。
12.根据权利要求11所述的方法,其中,将所述互连带附着到所述正面金属化体包括在所述第一金属层和所述正面金属化体之间形成直接电连接。
13.根据权利要求12所述的方法,其中,形成所述直接电连接包括在没有中间接合材料的情况下将所述第一金属层和所述正面金属化体熔合在一起。
14.根据权利要求13所述的方法,其中,将所述第一金属层和所述正面金属化体熔合在一起包括不施加热的超声引线接合工艺。
15.根据权利要求11所述的方法,其中,所述第一金属层和所述正面金属化体均包括第一金属,并且其中,所述第二金属层包括不同于所述第一金属的第二金属。
16.根据权利要求15所述的方法,其中,在形成所述包封体之后,所述互连带的上表面在所述包封体的上表面处暴露。
17.根据权利要求16所述的方法,还包括在附着所述互连带期间或之后在所述互连带中形成平坦跨越部,并且其中,所述互连带的暴露的上表面包括所述平坦跨越部中的所述第二金属层的上表面区域。
18.根据权利要求17所述的方法,其中,形成所述平坦跨越部包括在附着所述互连带期间执行的成环技术。
19.根据权利要求17所述的方法,其中,形成所述平坦跨越部包括在形成所述电绝缘包封体期间对所述互连带进行压处理。
20.根据权利要求17所述的方法,其中,形成所述平坦跨越部包括在形成所述电绝缘包封体之后对所述互连带平坦化。
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