JP4255144B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP4255144B2
JP4255144B2 JP14747798A JP14747798A JP4255144B2 JP 4255144 B2 JP4255144 B2 JP 4255144B2 JP 14747798 A JP14747798 A JP 14747798A JP 14747798 A JP14747798 A JP 14747798A JP 4255144 B2 JP4255144 B2 JP 4255144B2
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Japan
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JP14747798A
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English (en)
Japanese (ja)
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JPH11339492A5 (enExample
JPH11339492A (ja
Inventor
高晴 辻
司 大石
宏 加藤
茂樹 冨嶋
裕樹 島野
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Renesas Technology Corp
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Renesas Technology Corp
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Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP14747798A priority Critical patent/JP4255144B2/ja
Priority to US09/195,212 priority patent/US6058053A/en
Priority to KR1019990004049A priority patent/KR100290696B1/ko
Publication of JPH11339492A publication Critical patent/JPH11339492A/ja
Publication of JPH11339492A5 publication Critical patent/JPH11339492A5/ja
Application granted granted Critical
Publication of JP4255144B2 publication Critical patent/JP4255144B2/ja
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Expired - Fee Related legal-status Critical Current

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/844Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by splitting the decoders in stages

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  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
JP14747798A 1998-05-28 1998-05-28 半導体記憶装置 Expired - Fee Related JP4255144B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP14747798A JP4255144B2 (ja) 1998-05-28 1998-05-28 半導体記憶装置
US09/195,212 US6058053A (en) 1998-05-28 1998-11-18 Semiconductor memory device capable of high speed operation and including redundant cells
KR1019990004049A KR100290696B1 (ko) 1998-05-28 1999-02-05 고속 동작이 가능한 용장 셀을 포함하는 반도체 기억 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14747798A JP4255144B2 (ja) 1998-05-28 1998-05-28 半導体記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008264014A Division JP2009009700A (ja) 2008-10-10 2008-10-10 半導体記憶装置

Publications (3)

Publication Number Publication Date
JPH11339492A JPH11339492A (ja) 1999-12-10
JPH11339492A5 JPH11339492A5 (enExample) 2005-10-06
JP4255144B2 true JP4255144B2 (ja) 2009-04-15

Family

ID=15431286

Family Applications (1)

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JP14747798A Expired - Fee Related JP4255144B2 (ja) 1998-05-28 1998-05-28 半導体記憶装置

Country Status (3)

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US (1) US6058053A (enExample)
JP (1) JP4255144B2 (enExample)
KR (1) KR100290696B1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009009700A (ja) * 2008-10-10 2009-01-15 Renesas Technology Corp 半導体記憶装置

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4804503B2 (ja) * 1998-06-09 2011-11-02 ルネサスエレクトロニクス株式会社 半導体記憶装置
JP2000149564A (ja) 1998-10-30 2000-05-30 Mitsubishi Electric Corp 半導体記憶装置
JP4179687B2 (ja) 1998-12-24 2008-11-12 株式会社ルネサステクノロジ 半導体記憶装置
KR100297193B1 (ko) * 1999-04-27 2001-10-29 윤종용 리던던트 로우 대체 구조를 가지는 반도체 메모리 장치 및 그것의 로우 구동 방법
DE69909969D1 (de) * 1999-05-12 2003-09-04 St Microelectronics Srl Unflüchtiger Speicher mit Zeilenredundanz
KR100364791B1 (ko) * 1999-09-15 2002-12-16 주식회사 하이닉스반도체 로우 리던던시 회로를 구비한 비휘발성 강유전체 메모리 장치 및 그의 페일 어드레스 구제방법
JP3544929B2 (ja) * 2000-09-27 2004-07-21 Necマイクロシステム株式会社 半導体記憶装置およびそのリダンダンシ回路置換方法
JP3680725B2 (ja) * 2000-10-26 2005-08-10 松下電器産業株式会社 半導体記憶装置
US6707752B2 (en) 2001-06-22 2004-03-16 Intel Corporation Tag design for cache access with redundant-form address
US6621756B2 (en) * 2001-11-26 2003-09-16 Macronix International Co., Ltd. Compact integrated circuit with memory array
KR20030047027A (ko) * 2001-12-07 2003-06-18 주식회사 하이닉스반도체 메모리 장치
KR100480607B1 (ko) * 2002-08-02 2005-04-06 삼성전자주식회사 리던던시 워드라인에 의하여 결함 워드라인을 대체하는경우 대체효율을 향상시키는 반도체 메모리 장치
KR100492799B1 (ko) 2002-11-08 2005-06-07 주식회사 하이닉스반도체 강유전체 메모리 장치
JP2004259338A (ja) * 2003-02-25 2004-09-16 Hitachi Ltd 半導体集積回路装置
JP2005339674A (ja) * 2004-05-27 2005-12-08 Hitachi Ltd 半導体記憶装置
US7499352B2 (en) * 2006-05-19 2009-03-03 Innovative Silicon Isi Sa Integrated circuit having memory array including row redundancy, and method of programming, controlling and/or operating same
JP2009187641A (ja) * 2008-02-08 2009-08-20 Elpida Memory Inc 半導体記憶装置及びその制御方法、並びに不良アドレスの救済可否判定方法
US9299409B2 (en) 2013-09-11 2016-03-29 Tadashi Miyakawa Semiconductor storage device
US9208848B2 (en) 2014-03-12 2015-12-08 Kabushiki Kaisha Toshiba Semiconductor storage device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6433800A (en) * 1987-07-29 1989-02-03 Toshiba Corp Semiconductor memory
JPH05242693A (ja) * 1992-02-28 1993-09-21 Mitsubishi Electric Corp 半導体記憶装置
JP2582987B2 (ja) * 1992-05-18 1997-02-19 株式会社東芝 半導体メモリ装置
JP3226425B2 (ja) * 1994-09-09 2001-11-05 富士通株式会社 半導体記憶装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009009700A (ja) * 2008-10-10 2009-01-15 Renesas Technology Corp 半導体記憶装置

Also Published As

Publication number Publication date
US6058053A (en) 2000-05-02
KR19990087859A (ko) 1999-12-27
KR100290696B1 (ko) 2001-05-15
JPH11339492A (ja) 1999-12-10

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