JP3997494B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP3997494B2
JP3997494B2 JP11465697A JP11465697A JP3997494B2 JP 3997494 B2 JP3997494 B2 JP 3997494B2 JP 11465697 A JP11465697 A JP 11465697A JP 11465697 A JP11465697 A JP 11465697A JP 3997494 B2 JP3997494 B2 JP 3997494B2
Authority
JP
Japan
Prior art keywords
dielectric constant
film
insulating film
low dielectric
organic low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP11465697A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10150105A5 (enExample
JPH10150105A (ja
Inventor
利昭 長谷川
正永 深沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP11465697A priority Critical patent/JP3997494B2/ja
Publication of JPH10150105A publication Critical patent/JPH10150105A/ja
Publication of JPH10150105A5 publication Critical patent/JPH10150105A5/ja
Application granted granted Critical
Publication of JP3997494B2 publication Critical patent/JP3997494B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
JP11465697A 1996-09-17 1997-05-02 半導体装置 Expired - Fee Related JP3997494B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11465697A JP3997494B2 (ja) 1996-09-17 1997-05-02 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP8-244375 1996-09-17
JP24437596 1996-09-17
JP11465697A JP3997494B2 (ja) 1996-09-17 1997-05-02 半導体装置

Publications (3)

Publication Number Publication Date
JPH10150105A JPH10150105A (ja) 1998-06-02
JPH10150105A5 JPH10150105A5 (enExample) 2005-11-04
JP3997494B2 true JP3997494B2 (ja) 2007-10-24

Family

ID=26453364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11465697A Expired - Fee Related JP3997494B2 (ja) 1996-09-17 1997-05-02 半導体装置

Country Status (1)

Country Link
JP (1) JP3997494B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10804290B2 (en) 2016-09-21 2020-10-13 Toshiba Memory Corporation Semiconductor device and method of manufacturing the same

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3177968B2 (ja) * 1998-12-04 2001-06-18 日本電気株式会社 半導体装置及びその製造方法
US6265780B1 (en) * 1998-12-01 2001-07-24 United Microelectronics Corp. Dual damascene structure for the wiring-line structures of multi-level interconnects in integrated circuit
TW437040B (en) * 1998-08-12 2001-05-28 Applied Materials Inc Interconnect line formed by dual damascene using dielectric layers having dissimilar etching characteristics
US6297163B1 (en) * 1998-09-30 2001-10-02 Lam Research Corporation Method of plasma etching dielectric materials
JP2000133710A (ja) 1998-10-26 2000-05-12 Tokyo Electron Ltd 半導体装置及びその製造方法
JP2000174123A (ja) 1998-12-09 2000-06-23 Nec Corp 半導体装置及びその製造方法
JP3353743B2 (ja) 1999-05-18 2002-12-03 日本電気株式会社 半導体装置とその製造方法
JP4173307B2 (ja) * 1999-06-24 2008-10-29 株式会社ルネサステクノロジ 半導体集積回路の製造方法
US6596623B1 (en) * 2000-03-17 2003-07-22 Advanced Micro Devices, Inc. Use of organic spin on materials as a stop-layer for local interconnect, contact and via layers
JP3403373B2 (ja) 2000-05-26 2003-05-06 松下電器産業株式会社 有機膜のエッチング方法、半導体装置の製造方法及びパターンの形成方法
JP3403374B2 (ja) 2000-05-26 2003-05-06 松下電器産業株式会社 有機膜のエッチング方法、半導体装置の製造方法及びパターンの形成方法
JP3946471B2 (ja) 2001-07-24 2007-07-18 シャープ株式会社 半導体装置の製造方法
JP2003142579A (ja) 2001-11-07 2003-05-16 Hitachi Ltd 半導体装置の製造方法および半導体装置
JP4737361B2 (ja) * 2003-12-19 2011-07-27 Jsr株式会社 絶縁膜およびその形成方法
US6974772B1 (en) * 2004-08-19 2005-12-13 Intel Corporation Integrated low-k hard mask
JP4762280B2 (ja) * 2008-08-06 2011-08-31 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10804290B2 (en) 2016-09-21 2020-10-13 Toshiba Memory Corporation Semiconductor device and method of manufacturing the same
US11502100B2 (en) 2016-09-21 2022-11-15 Kioxia Corporation Semiconductor device and method of manufacturing the same
US11849586B2 (en) 2016-09-21 2023-12-19 Kioxia Corporation Semiconductor device and method of manufacturing the same

Also Published As

Publication number Publication date
JPH10150105A (ja) 1998-06-02

Similar Documents

Publication Publication Date Title
JP3997494B2 (ja) 半導体装置
US9312325B2 (en) Semiconductor metal insulator metal capacitor device and method of manufacture
US6479391B2 (en) Method for making a dual damascene interconnect using a multilayer hard mask
US6043145A (en) Method for making multilayer wiring structure
KR100780986B1 (ko) 반도체장치 및 그 제조방법
US20020022331A1 (en) High capacitance damascene capacitors
US6350674B1 (en) Manufacturing method for semiconductor device having a multilayer interconnect
US7808048B1 (en) System and method for providing a buried thin film resistor having end caps defined by a dielectric mask
JP2002134612A (ja) 半導体装置及びその製造方法
US6821896B1 (en) Method to eliminate via poison effect
JP3279276B2 (ja) 半導体装置の製造方法
US7169665B2 (en) Capacitance process by using passivation film scheme
JP3525788B2 (ja) 半導体装置の製造方法
US6894364B2 (en) Capacitor in an interconnect system and method of manufacturing thereof
JP2001007202A (ja) 半導体装置の製造方法
KR100626935B1 (ko) 금속배선 구조 및 그 제조 방법
US7795136B2 (en) Metal wiring of semiconductor device and forming method thereof
US6352919B1 (en) Method of fabricating a borderless via
KR100514523B1 (ko) 반도체 소자의 금속배선 형성방법
JP2001308179A (ja) 半導体装置の製造方法
JP2000306998A (ja) 半導体装置及びその製造方法
JP2001044202A (ja) 半導体装置及びその製造方法
KR100434508B1 (ko) 변형된 듀얼 다마신 공정을 이용한 반도체 소자의 금속배선 형성방법
WO1996019826A1 (en) A method of fabricating integrated circuits using bilayer dielectrics
KR100262009B1 (ko) 반도체장치의 제조 방법

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050819

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20060403

RD13 Notification of appointment of power of sub attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7433

Effective date: 20070125

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070507

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070622

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20070713

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070726

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100817

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees