JP3821637B2 - 半導体集積回路装置 - Google Patents

半導体集積回路装置 Download PDF

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Publication number
JP3821637B2
JP3821637B2 JP2000254151A JP2000254151A JP3821637B2 JP 3821637 B2 JP3821637 B2 JP 3821637B2 JP 2000254151 A JP2000254151 A JP 2000254151A JP 2000254151 A JP2000254151 A JP 2000254151A JP 3821637 B2 JP3821637 B2 JP 3821637B2
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JP
Japan
Prior art keywords
fuse
circuit
data
program
programmed
Prior art date
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Expired - Fee Related
Application number
JP2000254151A
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English (en)
Japanese (ja)
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JP2002074980A (ja
Inventor
武裕 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2000254151A priority Critical patent/JP3821637B2/ja
Priority to TW090114689A priority patent/TW490842B/zh
Priority to US09/934,834 priority patent/US6542419B2/en
Priority to KR10-2001-0050892A priority patent/KR100433022B1/ko
Publication of JP2002074980A publication Critical patent/JP2002074980A/ja
Application granted granted Critical
Publication of JP3821637B2 publication Critical patent/JP3821637B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18Auxiliary circuits, e.g. for writing into memory

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2000254151A 2000-08-24 2000-08-24 半導体集積回路装置 Expired - Fee Related JP3821637B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2000254151A JP3821637B2 (ja) 2000-08-24 2000-08-24 半導体集積回路装置
TW090114689A TW490842B (en) 2000-08-24 2001-06-18 Semiconductor integrated circuit apparatus
US09/934,834 US6542419B2 (en) 2000-08-24 2001-08-23 Semiconductor integrated circuit device with electrically programmable fuse
KR10-2001-0050892A KR100433022B1 (ko) 2000-08-24 2001-08-23 반도체 집적 회로 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000254151A JP3821637B2 (ja) 2000-08-24 2000-08-24 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JP2002074980A JP2002074980A (ja) 2002-03-15
JP3821637B2 true JP3821637B2 (ja) 2006-09-13

Family

ID=18743150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000254151A Expired - Fee Related JP3821637B2 (ja) 2000-08-24 2000-08-24 半導体集積回路装置

Country Status (4)

Country Link
US (1) US6542419B2 (ko)
JP (1) JP3821637B2 (ko)
KR (1) KR100433022B1 (ko)
TW (1) TW490842B (ko)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6791367B2 (en) * 2002-03-19 2004-09-14 Broadcom Corporation Hardware and software programmable fuses for memory repair
JP3730932B2 (ja) * 2002-04-16 2006-01-05 エルピーダメモリ株式会社 半導体記憶装置および容量ヒューズの状態確認方法
JP4111762B2 (ja) * 2002-07-03 2008-07-02 株式会社ルネサステクノロジ 半導体記憶装置
KR100439104B1 (ko) * 2002-07-11 2004-07-05 주식회사 하이닉스반도체 안티퓨즈 제어 회로
KR100427721B1 (ko) * 2002-07-18 2004-04-28 주식회사 하이닉스반도체 전기적 퓨즈 프로그래밍 제어회로
US7120068B2 (en) * 2002-07-29 2006-10-10 Micron Technology, Inc. Column/row redundancy architecture using latches programmed from a look up table
US7031218B2 (en) * 2002-11-18 2006-04-18 Infineon Technologies Ag Externally clocked electrical fuse programming with asynchronous fuse selection
JP3881641B2 (ja) * 2003-08-08 2007-02-14 株式会社東芝 フューズ回路
JP4282529B2 (ja) * 2004-04-07 2009-06-24 株式会社東芝 半導体集積回路装置及びそのプログラム方法
KR100618696B1 (ko) * 2004-04-28 2006-09-08 주식회사 하이닉스반도체 인식 정보를 갖는 메모리 장치
JP5032155B2 (ja) 2007-03-02 2012-09-26 株式会社東芝 不揮発性半導体記憶装置、及び不揮発性半導体記憶システム
JP5458232B2 (ja) 2007-06-01 2014-04-02 ピーエスフォー ルクスコ エスエイアールエル 半導体記憶装置のアンチフューズ置換判定回路、およびアンチフューズ置換判定方法
JP2009070511A (ja) 2007-09-14 2009-04-02 Toshiba Corp 半導体集積回路装置、リダンダンシシステム
JP5650366B2 (ja) * 2007-10-29 2015-01-07 ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. アンチヒューズ回路及びこれを備える半導体装置、並びに、アンチヒューズ回路へのアドレス書き込み方法
TWI430275B (zh) * 2008-04-16 2014-03-11 Magnachip Semiconductor Ltd 用於程式化非揮發性記憶體裝置之方法
US8097520B2 (en) * 2009-08-19 2012-01-17 International Business Machines Corporation Integration of passive device structures with metal gate layers
US8736278B2 (en) * 2011-07-29 2014-05-27 Tessera Inc. System and method for testing fuse blow reliability for integrated circuits
US9087613B2 (en) * 2012-02-29 2015-07-21 Samsung Electronics Co., Ltd. Device and method for repairing memory cell and memory system including the device
TWI602181B (zh) * 2012-02-29 2017-10-11 三星電子股份有限公司 記憶體系統以及使用測試元件傳輸失效位址至記憶體元件的操作方法
US9953725B2 (en) * 2012-02-29 2018-04-24 Samsung Electronics Co., Ltd. Semiconductor memory devices and methods of operating the same
KR102031147B1 (ko) * 2013-04-04 2019-10-14 에스케이하이닉스 주식회사 메모리 장치, 메모리 장치 및 메모리 시스템의 동작방법

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5110754A (en) 1991-10-04 1992-05-05 Micron Technology, Inc. Method of making a DRAM capacitor for use as an programmable antifuse for redundancy repair/options on a DRAM
US5313424A (en) 1992-03-17 1994-05-17 International Business Machines Corporation Module level electronic redundancy
US5495446A (en) * 1994-09-30 1996-02-27 Sgs-Thomson Microelectronics, Inc. Pre-charged exclusionary wired-connected programmed redundant select
US5831923A (en) 1996-08-01 1998-11-03 Micron Technology, Inc. Antifuse detect circuit
US5668818A (en) 1996-08-06 1997-09-16 Hewlett-Packard Co. System and method for scan control of a programmable fuse circuit in an integrated circuit
JP4115045B2 (ja) * 1999-07-02 2008-07-09 株式会社ルネサステクノロジ 半導体記憶装置
US6166981A (en) * 2000-02-25 2000-12-26 International Business Machines Corporation Method for addressing electrical fuses

Also Published As

Publication number Publication date
TW490842B (en) 2002-06-11
KR20020016538A (ko) 2002-03-04
KR100433022B1 (ko) 2004-05-24
US20020047181A1 (en) 2002-04-25
JP2002074980A (ja) 2002-03-15
US6542419B2 (en) 2003-04-01

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