JP3736607B2 - 半導体装置及びその製造方法、回路基板並びに電子機器 - Google Patents

半導体装置及びその製造方法、回路基板並びに電子機器 Download PDF

Info

Publication number
JP3736607B2
JP3736607B2 JP2000012670A JP2000012670A JP3736607B2 JP 3736607 B2 JP3736607 B2 JP 3736607B2 JP 2000012670 A JP2000012670 A JP 2000012670A JP 2000012670 A JP2000012670 A JP 2000012670A JP 3736607 B2 JP3736607 B2 JP 3736607B2
Authority
JP
Japan
Prior art keywords
semiconductor device
hole
manufacturing
conductive layer
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2000012670A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001203316A (ja
JP2001203316A5 (https=
Inventor
健嗣 和田
文明 松島
伸晃 橋元
一成 梅津
春樹 伊東
輝直 花岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2000012670A priority Critical patent/JP3736607B2/ja
Priority to KR10-2001-0002836A priority patent/KR100425391B1/ko
Priority to TW090101162A priority patent/TW508789B/zh
Priority to US09/765,433 priority patent/US6667551B2/en
Publication of JP2001203316A publication Critical patent/JP2001203316A/ja
Priority to US10/698,432 priority patent/US6852621B2/en
Publication of JP2001203316A5 publication Critical patent/JP2001203316A5/ja
Application granted granted Critical
Publication of JP3736607B2 publication Critical patent/JP3736607B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/46—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0238—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes through pads or through electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
    • H10W20/2125—Top-view shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/652—Cross-sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/244—Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/291—Configurations of stacked chips characterised by containers, encapsulations, or other housings for the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2000012670A 2000-01-21 2000-01-21 半導体装置及びその製造方法、回路基板並びに電子機器 Expired - Lifetime JP3736607B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2000012670A JP3736607B2 (ja) 2000-01-21 2000-01-21 半導体装置及びその製造方法、回路基板並びに電子機器
KR10-2001-0002836A KR100425391B1 (ko) 2000-01-21 2001-01-18 반도체 장치 및 그 제조 방법, 회로기판 및 전자기기
TW090101162A TW508789B (en) 2000-01-21 2001-01-18 Semiconductor device and fabrication method, circuit substrate and electronic machine therefor
US09/765,433 US6667551B2 (en) 2000-01-21 2001-01-22 Semiconductor device and manufacturing thereof, including a through-hole with a wider intermediate cavity
US10/698,432 US6852621B2 (en) 2000-01-21 2003-11-03 Semiconductor device and manufacturing method therefor, circuit board, and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000012670A JP3736607B2 (ja) 2000-01-21 2000-01-21 半導体装置及びその製造方法、回路基板並びに電子機器

Publications (3)

Publication Number Publication Date
JP2001203316A JP2001203316A (ja) 2001-07-27
JP2001203316A5 JP2001203316A5 (https=) 2005-02-24
JP3736607B2 true JP3736607B2 (ja) 2006-01-18

Family

ID=18540360

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000012670A Expired - Lifetime JP3736607B2 (ja) 2000-01-21 2000-01-21 半導体装置及びその製造方法、回路基板並びに電子機器

Country Status (4)

Country Link
US (2) US6667551B2 (https=)
JP (1) JP3736607B2 (https=)
KR (1) KR100425391B1 (https=)
TW (1) TW508789B (https=)

Families Citing this family (98)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3736607B2 (ja) * 2000-01-21 2006-01-18 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器
US6630743B2 (en) * 2001-02-27 2003-10-07 International Business Machines Corporation Copper plated PTH barrels and methods for fabricating
DE10120408B4 (de) * 2001-04-25 2006-02-02 Infineon Technologies Ag Elektronisches Bauteil mit einem Halbleiterchip, elektronische Baugruppe aus gestapelten Halbleiterchips und Verfahren zu deren Herstellung
US6902872B2 (en) * 2002-07-29 2005-06-07 Hewlett-Packard Development Company, L.P. Method of forming a through-substrate interconnect
JP3690380B2 (ja) * 2002-08-02 2005-08-31 セイコーエプソン株式会社 材料の配置方法、電子装置の製造方法、電気光学装置の製造方法
US6867983B2 (en) * 2002-08-07 2005-03-15 Avery Dennison Corporation Radio frequency identification device and method
US6936913B2 (en) * 2002-12-11 2005-08-30 Northrop Grumman Corporation High performance vias for vertical IC packaging
JP4072677B2 (ja) 2003-01-15 2008-04-09 セイコーエプソン株式会社 半導体チップ、半導体ウエハ、半導体装置及びその製造方法、回路基板並びに電子機器
JP2004311948A (ja) * 2003-03-27 2004-11-04 Seiko Epson Corp 半導体装置、半導体デバイス、電子機器、および半導体装置の製造方法
US6934065B2 (en) * 2003-09-18 2005-08-23 Micron Technology, Inc. Microelectronic devices and methods for packaging microelectronic devices
US7091124B2 (en) 2003-11-13 2006-08-15 Micron Technology, Inc. Methods for forming vias in microelectronic devices, and methods for packaging microelectronic devices
US8084866B2 (en) 2003-12-10 2011-12-27 Micron Technology, Inc. Microelectronic devices and methods for filling vias in microelectronic devices
US7583862B2 (en) * 2003-11-26 2009-09-01 Aptina Imaging Corporation Packaged microelectronic imagers and methods of packaging microelectronic imagers
US6943106B1 (en) * 2004-02-20 2005-09-13 Micron Technology, Inc. Methods of fabricating interconnects for semiconductor components including plating solder-wetting material and solder filling
US7253397B2 (en) * 2004-02-23 2007-08-07 Micron Technology, Inc. Packaged microelectronic imagers and methods of packaging microelectronic imagers
EP1571704A1 (en) * 2004-03-04 2005-09-07 Interuniversitair Microelektronica Centrum Vzw Method for depositing a solder material on a substrate in the form of a predetermined pattern
US20050247894A1 (en) 2004-05-05 2005-11-10 Watkins Charles M Systems and methods for forming apertures in microfeature workpieces
US8092734B2 (en) 2004-05-13 2012-01-10 Aptina Imaging Corporation Covers for microelectronic imagers and methods for wafer-level packaging of microelectronics imagers
US7253957B2 (en) * 2004-05-13 2007-08-07 Micron Technology, Inc. Integrated optics units and methods of manufacturing integrated optics units for use with microelectronic imagers
JP4955935B2 (ja) * 2004-05-25 2012-06-20 キヤノン株式会社 貫通孔形成方法および半導体装置の製造方法
US20050275750A1 (en) 2004-06-09 2005-12-15 Salman Akram Wafer-level packaged microelectronic imagers and processes for wafer-level packaging
US7498647B2 (en) * 2004-06-10 2009-03-03 Micron Technology, Inc. Packaged microelectronic imagers and methods of packaging microelectronic imagers
US7262405B2 (en) * 2004-06-14 2007-08-28 Micron Technology, Inc. Prefabricated housings for microelectronic imagers
US7199439B2 (en) * 2004-06-14 2007-04-03 Micron Technology, Inc. Microelectronic imagers and methods of packaging microelectronic imagers
US7294897B2 (en) * 2004-06-29 2007-11-13 Micron Technology, Inc. Packaged microelectronic imagers and methods of packaging microelectronic imagers
US7232754B2 (en) * 2004-06-29 2007-06-19 Micron Technology, Inc. Microelectronic devices and methods for forming interconnects in microelectronic devices
US7416913B2 (en) * 2004-07-16 2008-08-26 Micron Technology, Inc. Methods of manufacturing microelectronic imaging units with discrete standoffs
US7189954B2 (en) 2004-07-19 2007-03-13 Micron Technology, Inc. Microelectronic imagers with optical devices and methods of manufacturing such microelectronic imagers
US7402453B2 (en) * 2004-07-28 2008-07-22 Micron Technology, Inc. Microelectronic imaging units and methods of manufacturing microelectronic imaging units
US7364934B2 (en) 2004-08-10 2008-04-29 Micron Technology, Inc. Microelectronic imaging units and methods of manufacturing microelectronic imaging units
US7397066B2 (en) * 2004-08-19 2008-07-08 Micron Technology, Inc. Microelectronic imagers with curved image sensors and methods for manufacturing microelectronic imagers
US7223626B2 (en) * 2004-08-19 2007-05-29 Micron Technology, Inc. Spacers for packaged microelectronic imagers and methods of making and using spacers for wafer-level packaging of imagers
US7598167B2 (en) * 2004-08-24 2009-10-06 Micron Technology, Inc. Method of forming vias in semiconductor substrates without damaging active regions thereof and resulting structures
US7115961B2 (en) * 2004-08-24 2006-10-03 Micron Technology, Inc. Packaged microelectronic imaging devices and methods of packaging microelectronic imaging devices
US7425499B2 (en) 2004-08-24 2008-09-16 Micron Technology, Inc. Methods for forming interconnects in vias and microelectronic workpieces including such interconnects
US7429494B2 (en) * 2004-08-24 2008-09-30 Micron Technology, Inc. Microelectronic imagers with optical devices having integral reference features and methods for manufacturing such microelectronic imagers
US7276393B2 (en) 2004-08-26 2007-10-02 Micron Technology, Inc. Microelectronic imaging units and methods of manufacturing microelectronic imaging units
SG120200A1 (en) 2004-08-27 2006-03-28 Micron Technology Inc Slanted vias for electrical circuits on circuit boards and other substrates
US7511262B2 (en) * 2004-08-30 2009-03-31 Micron Technology, Inc. Optical device and assembly for use with imaging dies, and wafer-label imager assembly
US20070148807A1 (en) 2005-08-22 2007-06-28 Salman Akram Microelectronic imagers with integrated optical devices and methods for manufacturing such microelectronic imagers
US7109068B2 (en) * 2004-08-31 2006-09-19 Micron Technology, Inc. Through-substrate interconnect fabrication methods
US7646075B2 (en) * 2004-08-31 2010-01-12 Micron Technology, Inc. Microelectronic imagers having front side contacts
US7300857B2 (en) 2004-09-02 2007-11-27 Micron Technology, Inc. Through-wafer interconnects for photoimager and memory wafers
TWI303864B (en) * 2004-10-26 2008-12-01 Sanyo Electric Co Semiconductor device and method for making the same
US7674671B2 (en) * 2004-12-13 2010-03-09 Optomec Design Company Aerodynamic jetting of aerosolized fluids for fabrication of passive structures
US7271482B2 (en) * 2004-12-30 2007-09-18 Micron Technology, Inc. Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods
US7214919B2 (en) * 2005-02-08 2007-05-08 Micron Technology, Inc. Microelectronic imaging units and methods of manufacturing microelectronic imaging units
US7303931B2 (en) * 2005-02-10 2007-12-04 Micron Technology, Inc. Microfeature workpieces having microlenses and methods of forming microlenses on microfeature workpieces
US7190039B2 (en) * 2005-02-18 2007-03-13 Micron Technology, Inc. Microelectronic imagers with shaped image sensors and methods for manufacturing microelectronic imagers
US7485967B2 (en) * 2005-03-10 2009-02-03 Sanyo Electric Co., Ltd. Semiconductor device with via hole for electric connection
US7795134B2 (en) 2005-06-28 2010-09-14 Micron Technology, Inc. Conductive interconnect structures and formation methods using supercritical fluids
US20060290001A1 (en) * 2005-06-28 2006-12-28 Micron Technology, Inc. Interconnect vias and associated methods of formation
US7429529B2 (en) * 2005-08-05 2008-09-30 Farnworth Warren M Methods of forming through-wafer interconnects and structures resulting therefrom
JP4758712B2 (ja) * 2005-08-29 2011-08-31 新光電気工業株式会社 半導体装置の製造方法
US7863187B2 (en) * 2005-09-01 2011-01-04 Micron Technology, Inc. Microfeature workpieces and methods for forming interconnects in microfeature workpieces
US7262134B2 (en) 2005-09-01 2007-08-28 Micron Technology, Inc. Microfeature workpieces and methods for forming interconnects in microfeature workpieces
US7517798B2 (en) * 2005-09-01 2009-04-14 Micron Technology, Inc. Methods for forming through-wafer interconnects and structures resulting therefrom
US7622377B2 (en) * 2005-09-01 2009-11-24 Micron Technology, Inc. Microfeature workpiece substrates having through-substrate vias, and associated methods of formation
US7288757B2 (en) * 2005-09-01 2007-10-30 Micron Technology, Inc. Microelectronic imaging devices and associated methods for attaching transmissive elements
US7629252B2 (en) * 2005-12-23 2009-12-08 Intel Corporation Conformal electroless deposition of barrier layer materials
EP1969135B1 (en) * 2005-12-27 2017-06-21 Ascensia Diabetes Care Holdings AG Process of making electrodes for test sensors
TWI311357B (en) 2006-01-05 2009-06-21 Advanced Semiconductor Eng Wafer-level chip packaging process and chip package structure
TWI293499B (en) * 2006-01-25 2008-02-11 Advanced Semiconductor Eng Three dimensional package and method of making the same
TWI287273B (en) * 2006-01-25 2007-09-21 Advanced Semiconductor Eng Three dimensional package and method of making the same
US7749899B2 (en) 2006-06-01 2010-07-06 Micron Technology, Inc. Microelectronic workpieces and methods and systems for forming interconnects in microelectronic workpieces
US7629249B2 (en) 2006-08-28 2009-12-08 Micron Technology, Inc. Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods
US7560371B2 (en) * 2006-08-29 2009-07-14 Micron Technology, Inc. Methods for selectively filling apertures in a substrate to form conductive vias with a liquid using a vacuum
US7902643B2 (en) 2006-08-31 2011-03-08 Micron Technology, Inc. Microfeature workpieces having interconnects and conductive backplanes, and associated systems and methods
KR100830581B1 (ko) 2006-11-06 2008-05-22 삼성전자주식회사 관통전극을 구비한 반도체 소자 및 그 형성방법
US8102057B2 (en) * 2006-12-27 2012-01-24 Hewlett-Packard Development Company, L.P. Via design for flux residue mitigation
FR2911995B1 (fr) 2007-01-30 2009-03-06 3D Plus Sa Sa Procede d'interconnexion de tranches electroniques
DE102007019552B4 (de) * 2007-04-25 2009-12-17 Infineon Technologies Ag Verfahren zur Herstellung eines Substrats mit Durchführung sowie Substrat und Halbleitermodul mit Durchführung
US20080284041A1 (en) * 2007-05-18 2008-11-20 Samsung Electronics Co., Ltd. Semiconductor package with through silicon via and related method of fabrication
JP5302522B2 (ja) * 2007-07-02 2013-10-02 スパンション エルエルシー 半導体装置及びその製造方法
US8143617B2 (en) * 2007-07-03 2012-03-27 Panasonic Corporation Semiconductor device, semiconductor device manufacturing method and image display device
SG150410A1 (en) 2007-08-31 2009-03-30 Micron Technology Inc Partitioned through-layer via and associated systems and methods
US8350382B2 (en) * 2007-09-21 2013-01-08 Infineon Technologies Ag Semiconductor device including electronic component coupled to a backside of a chip
US7884015B2 (en) 2007-12-06 2011-02-08 Micron Technology, Inc. Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods
KR101490429B1 (ko) * 2008-03-11 2015-02-11 삼성전자주식회사 저항 메모리 소자 및 그 형성 방법
US9324611B2 (en) * 2008-04-03 2016-04-26 Micron Technology, Inc. Corrosion resistant via connections in semiconductor substrates and methods of making same
TWI389291B (zh) * 2008-05-13 2013-03-11 財團法人工業技術研究院 三維堆疊晶粒封裝結構
US7872332B2 (en) 2008-09-11 2011-01-18 Micron Technology, Inc. Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods
US8742588B2 (en) * 2008-10-15 2014-06-03 ÅAC Microtec AB Method for making via interconnection
US20100194465A1 (en) * 2009-02-02 2010-08-05 Ali Salih Temperature compensated current source and method therefor
US8368228B2 (en) * 2009-10-19 2013-02-05 Jeng-Jye Shau Area efficient through-hole connections
US8304286B2 (en) * 2009-12-11 2012-11-06 Stats Chippac Ltd. Integrated circuit packaging system with shielded package and method of manufacture thereof
TW201145493A (en) * 2010-06-01 2011-12-16 Chipmos Technologies Inc Silicon wafer structure and multi-chip stack structure
CN102290397A (zh) * 2010-06-17 2011-12-21 南茂科技股份有限公司 硅晶圆结构及多晶粒的堆栈结构
US8709945B2 (en) 2011-01-26 2014-04-29 Jeng-Jye Shau Area efficient through-hole connections
US8365398B2 (en) 2011-01-26 2013-02-05 Jeng-Jye Shau Accurate alignment for stacked substrates
US10994473B2 (en) 2015-02-10 2021-05-04 Optomec, Inc. Fabrication of three dimensional structures by in-flight curing of aerosols
EP3331978B1 (en) 2015-08-03 2024-10-09 Fujifilm Electronic Materials USA, Inc. Cleaning composition
TWI796337B (zh) 2017-06-16 2023-03-21 美商富士軟片電子材料美國股份有限公司 多層結構
EP3478777B1 (en) 2017-09-11 2020-11-18 FUJIFILM Electronic Materials U.S.A., Inc. Dielectric film forming composition
EP3723909B1 (en) 2017-11-13 2023-10-25 Optomec, Inc. Shuttering of aerosol streams
CN111960376B (zh) * 2020-07-21 2024-08-23 上海集成电路研发中心有限公司 一种mems支撑和电连接孔结构及制备方法
TW202247905A (zh) 2021-04-29 2022-12-16 美商阿普托麥克股份有限公司 用於氣溶膠噴射裝置之高可靠性鞘護輸送路徑
JP2024135267A (ja) * 2023-03-22 2024-10-04 株式会社東芝 電子装置及びその製造方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5326689A (en) * 1976-08-25 1978-03-11 Hitachi Ltd Semiconductor integrated circuit unit
JPS5326666A (en) * 1976-08-25 1978-03-11 Hitachi Ltd Semiconduct or device
JPS5837944A (ja) * 1981-08-28 1983-03-05 Fujitsu Ltd 半導体チツプの実装構造
JPS59222954A (ja) * 1983-06-01 1984-12-14 Hitachi Ltd 積層半導体集積回路およびその製法
JPS6190492A (ja) 1984-10-11 1986-05-08 四国化成工業株式会社 銅スル−ホ−ルプリント配線板の製造方法
JPS62105379A (ja) * 1985-11-01 1987-05-15 株式会社日立製作所 コネクタ装置
US4808273A (en) 1988-05-10 1989-02-28 Avantek, Inc. Method of forming completely metallized via holes in semiconductors
US5229647A (en) * 1991-03-27 1993-07-20 Micron Technology, Inc. High density data storage using stacked wafers
JP2988045B2 (ja) 1991-09-13 1999-12-06 富士通株式会社 ベアチップの構造およびベアチップの実装構造
DE4301133C2 (de) * 1993-01-18 1995-05-18 Danfoss As Hydraulische Kolbenmaschine
JPH06310547A (ja) * 1993-02-25 1994-11-04 Mitsubishi Electric Corp 半導体装置及びその製造方法
US6246247B1 (en) * 1994-11-15 2001-06-12 Formfactor, Inc. Probe card assembly and kit, and methods of using same
US6013948A (en) * 1995-11-27 2000-01-11 Micron Technology, Inc. Stackable chip scale semiconductor package with mating contacts on opposed surfaces
US5707893A (en) * 1995-12-01 1998-01-13 International Business Machines Corporation Method of making a circuitized substrate using two different metallization processes
US6664616B2 (en) * 1996-11-21 2003-12-16 Hitachi, Ltd. Semiconductor device and manufacturing method thereof
JP3184493B2 (ja) * 1997-10-01 2001-07-09 松下電子工業株式会社 電子装置の製造方法
JPH11204519A (ja) * 1998-01-08 1999-07-30 Matsushita Electron Corp 半導体装置及びその製造方法
MY144574A (en) * 1998-09-14 2011-10-14 Ibiden Co Ltd Printed circuit board and method for its production
US6239485B1 (en) * 1998-11-13 2001-05-29 Fujitsu Limited Reduced cross-talk noise high density signal interposer with power and ground wrap
JP3736607B2 (ja) * 2000-01-21 2006-01-18 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器

Also Published As

Publication number Publication date
JP2001203316A (ja) 2001-07-27
KR100425391B1 (ko) 2004-03-30
US6667551B2 (en) 2003-12-23
US20010027011A1 (en) 2001-10-04
US20040092099A1 (en) 2004-05-13
US6852621B2 (en) 2005-02-08
KR20010076331A (ko) 2001-08-11
TW508789B (en) 2002-11-01

Similar Documents

Publication Publication Date Title
JP3736607B2 (ja) 半導体装置及びその製造方法、回路基板並びに電子機器
JP3879816B2 (ja) 半導体装置及びその製造方法、積層型半導体装置、回路基板並びに電子機器
JP3778256B2 (ja) 半導体装置及びその製造方法、回路基板並びに電子機器
CN100573854C (zh) 半导体装置、电路基板以及电子设备
TWI239629B (en) Method of manufacturing semiconductor device, semiconductor device, circuit substrate and electronic apparatus
CN100364092C (zh) 半导体器件及其生产方法
JP2002359347A (ja) 半導体装置及びその製造方法、回路基板並びに電子機器
JP2004311948A (ja) 半導体装置、半導体デバイス、電子機器、および半導体装置の製造方法
JP4304905B2 (ja) 半導体装置の製造方法
JP4292748B2 (ja) 半導体装置の製造方法
JP3800298B2 (ja) バンプの形成方法及び半導体装置の製造方法
JP4127095B2 (ja) 半導体装置の製造方法
JP3943037B2 (ja) 半導体装置の製造方法
JP2003273108A (ja) 半導体装置の製造方法及び半導体装置並びに回路基板及び電子機器
JP2005123601A (ja) 半導体装置の製造方法、半導体装置、及び電子機器

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20040316

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040316

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20050629

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20050705

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050824

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20051005

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20051018

R150 Certificate of patent or registration of utility model

Ref document number: 3736607

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091104

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091104

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101104

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101104

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111104

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111104

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121104

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121104

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131104

Year of fee payment: 8

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R360 Written notification for declining of transfer of rights

Free format text: JAPANESE INTERMEDIATE CODE: R360

R360 Written notification for declining of transfer of rights

Free format text: JAPANESE INTERMEDIATE CODE: R360

R371 Transfer withdrawn

Free format text: JAPANESE INTERMEDIATE CODE: R371

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term