JP3681008B2 - フラグレス半導体装置およびその製造方法 - Google Patents

フラグレス半導体装置およびその製造方法 Download PDF

Info

Publication number
JP3681008B2
JP3681008B2 JP06435294A JP6435294A JP3681008B2 JP 3681008 B2 JP3681008 B2 JP 3681008B2 JP 06435294 A JP06435294 A JP 06435294A JP 6435294 A JP6435294 A JP 6435294A JP 3681008 B2 JP3681008 B2 JP 3681008B2
Authority
JP
Japan
Prior art keywords
die
tie bar
semiconductor
semiconductor device
plastic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP06435294A
Other languages
English (en)
Japanese (ja)
Other versions
JPH06302755A (ja
Inventor
トム・アール・ホリンスワース
マイケル・ビー・マックシェーン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
NXP USA Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP USA Inc filed Critical NXP USA Inc
Publication of JPH06302755A publication Critical patent/JPH06302755A/ja
Application granted granted Critical
Publication of JP3681008B2 publication Critical patent/JP3681008B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29005—Structure
    • H01L2224/29007—Layer connector smaller than the underlying bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01027—Cobalt [Co]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10161—Shape being a cuboid with a rectangular active surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)
  • Wire Bonding (AREA)
JP06435294A 1993-03-22 1994-03-09 フラグレス半導体装置およびその製造方法 Expired - Lifetime JP3681008B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US3496193A 1993-03-22 1993-03-22
US034961 1993-03-22

Publications (2)

Publication Number Publication Date
JPH06302755A JPH06302755A (ja) 1994-10-28
JP3681008B2 true JP3681008B2 (ja) 2005-08-10

Family

ID=21879739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP06435294A Expired - Lifetime JP3681008B2 (ja) 1993-03-22 1994-03-09 フラグレス半導体装置およびその製造方法

Country Status (7)

Country Link
US (1) US5521428A (OSRAM)
EP (1) EP0623953A3 (OSRAM)
JP (1) JP3681008B2 (OSRAM)
KR (1) KR100325277B1 (OSRAM)
CN (1) CN1098558A (OSRAM)
SG (1) SG46361A1 (OSRAM)
TW (1) TW276357B (OSRAM)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5714792A (en) * 1994-09-30 1998-02-03 Motorola, Inc. Semiconductor device having a reduced die support area and method for making the same
US5701090A (en) * 1994-11-15 1997-12-23 Mitsubishi Denki Kabushiki Kaisha Data output circuit with reduced output noise
JP2767404B2 (ja) * 1994-12-14 1998-06-18 アナムインダストリアル株式会社 半導体パッケージのリードフレーム構造
EP0833382B1 (en) * 1996-09-30 2005-11-30 STMicroelectronics S.r.l. Plastic package for electronic devices
KR100205353B1 (ko) * 1996-12-27 1999-07-01 구본준 프리-몰드 패들을 갖는 반도체 패키지 제조 공정용 리드 프레임
DE19704343A1 (de) * 1997-02-05 1998-08-20 Siemens Ag Montageverfahren für Halbleiterbauelemente
TW330337B (en) * 1997-05-23 1998-04-21 Siliconware Precision Industries Co Ltd Semiconductor package with detached die pad
KR100475335B1 (ko) * 1997-08-12 2005-05-19 삼성전자주식회사 반도체칩패키지
US6048744A (en) 1997-09-15 2000-04-11 Micron Technology, Inc. Integrated circuit package alignment feature
US6028350A (en) * 1998-02-09 2000-02-22 Advanced Micro Devices, Inc. Lead frame with strip-shaped die bonding pad
JP3862411B2 (ja) * 1998-05-12 2006-12-27 三菱電機株式会社 半導体装置の製造方法及びその構造
US5998857A (en) * 1998-08-11 1999-12-07 Sampo Semiconductor Corporation Semiconductor packaging structure with the bar on chip
SG92624A1 (en) * 1999-02-09 2002-11-19 Inst Of Microelectronics Lead frame for an integrated circuit chip (integrated circuit peripheral support)
US6331728B1 (en) * 1999-02-26 2001-12-18 Cypress Semiconductor Corporation High reliability lead frame and packaging technology containing the same
TW410452B (en) * 1999-04-28 2000-11-01 Siliconware Precision Industries Co Ltd Semiconductor package having dual chips attachment on the backs and the manufacturing method thereof
US6265761B1 (en) * 1999-05-07 2001-07-24 Maxim Integrated Products, Inc. Semiconductor devices with improved lead frame structures
KR20010111767A (ko) * 2000-06-13 2001-12-20 마이클 디. 오브라이언 반도체 패키지 제조용 리드프레임
US6696749B1 (en) * 2000-09-25 2004-02-24 Siliconware Precision Industries Co., Ltd. Package structure having tapering support bars and leads
SG112799A1 (en) 2000-10-09 2005-07-28 St Assembly Test Services Ltd Leaded semiconductor packages and method of trimming and singulating such packages
US6686258B2 (en) 2000-11-02 2004-02-03 St Assembly Test Services Ltd. Method of trimming and singulating leaded semiconductor packages
US6448107B1 (en) * 2000-11-28 2002-09-10 National Semiconductor Corporation Pin indicator for leadless leadframe packages
DE10104868A1 (de) 2001-02-03 2002-08-22 Bosch Gmbh Robert Mikromechanisches Bauelement sowie ein Verfahren zur Herstellung eines mikromechanischen Bauelements
US6991960B2 (en) 2001-08-30 2006-01-31 Micron Technology, Inc. Method of semiconductor device package alignment and method of testing
TWI267958B (en) * 2002-11-21 2006-12-01 Siliconware Precision Industries Co Ltd Semiconductor package with stilts for supporting dice
JP2005079181A (ja) * 2003-08-28 2005-03-24 Matsushita Electric Ind Co Ltd リードフレーム、それを用いた樹脂封止型半導体装置およびその製造方法
KR100586699B1 (ko) * 2004-04-29 2006-06-08 삼성전자주식회사 반도체 칩 패키지와 그 제조 방법
CN100363863C (zh) * 2004-09-13 2008-01-23 奇鋐科技股份有限公司 计算机机壳
US20070126445A1 (en) * 2005-11-30 2007-06-07 Micron Technology, Inc. Integrated circuit package testing devices and methods of making and using same
CN100409418C (zh) * 2006-08-01 2008-08-06 上海凯虹科技电子有限公司 Qfn芯片封装工艺
US20080157299A1 (en) * 2006-12-28 2008-07-03 Jeffery Gail Holloway Microelectronic Assembly Using Chip-On-Lead (COL) and Cantilever Leads
US7812430B2 (en) * 2008-03-04 2010-10-12 Powertech Technology Inc. Leadframe and semiconductor package having downset baffle paddles
JP5743922B2 (ja) * 2012-02-21 2015-07-01 日立オートモティブシステムズ株式会社 熱式空気流量測定装置
US9754861B2 (en) * 2014-10-10 2017-09-05 Stmicroelectronics Pte Ltd Patterned lead frame
JP6357415B2 (ja) * 2014-12-26 2018-07-11 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US10109563B2 (en) 2017-01-05 2018-10-23 Stmicroelectronics, Inc. Modified leadframe design with adhesive overflow recesses

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1907075B2 (de) * 1969-02-13 1974-07-04 Semikron Gesellschaft Fuer Gleichrichterbau Und Elektronik Mbh, 8500 Nuernberg Verfahren zur Herstellung von Halbleiter-Kleingleichrichtern
FR2436505A1 (fr) * 1978-09-12 1980-04-11 Radiotechnique Compelec Dispositif optoelectronique a emetteur et recepteur couples
JPS6042852A (ja) * 1983-08-18 1985-03-07 Toshiba Corp リ−ドフレ−ム
US4612564A (en) * 1984-06-04 1986-09-16 At&T Bell Laboratories Plastic integrated circuit package
US4829362A (en) * 1986-04-28 1989-05-09 Motorola, Inc. Lead frame with die bond flag for ceramic packages
JPS6340352A (ja) * 1986-08-05 1988-02-20 Furukawa Electric Co Ltd:The 電子部品用リ−ドフレ−ム
US4766478A (en) * 1986-09-02 1988-08-23 Dennis Richard K Lead frame for semi-conductor device and process of connecting same
JPS6480051A (en) * 1987-09-21 1989-03-24 Hitachi Ltd Electric device
JPH01161743A (ja) * 1987-12-17 1989-06-26 Toshiba Corp 半導体装置
US4868635A (en) * 1988-01-13 1989-09-19 Texas Instruments Incorporated Lead frame for integrated circuit
US4994895A (en) * 1988-07-11 1991-02-19 Fujitsu Limited Hybrid integrated circuit package structure
JP2602076B2 (ja) * 1988-09-08 1997-04-23 三菱電機株式会社 半導体装置用リードフレーム
US4924291A (en) * 1988-10-24 1990-05-08 Motorola Inc. Flagless semiconductor package
JPH02273961A (ja) * 1989-04-14 1990-11-08 Fujitsu Ltd リードフレームおよびそれを用いた混成集積回路
US5021864A (en) * 1989-09-05 1991-06-04 Micron Technology, Inc. Die-mounting paddle for mechanical stress reduction in plastic IC packages
JPH03139811A (ja) * 1989-10-26 1991-06-14 Tama Electric Co Ltd リードフレーム
JPH0415947A (ja) * 1990-05-09 1992-01-21 Hitachi Cable Ltd 半導体装置用リードフレームおよび半導体装置
US5161304A (en) * 1990-06-06 1992-11-10 Sgs-Thomson Microelectronics, Inc. Method for packaging an electronic circuit device
JP2501953B2 (ja) * 1991-01-18 1996-05-29 株式会社東芝 半導体装置

Also Published As

Publication number Publication date
CN1098558A (zh) 1995-02-08
KR100325277B1 (ko) 2002-06-20
SG46361A1 (en) 1998-02-20
TW276357B (OSRAM) 1996-05-21
KR940022767A (ko) 1994-10-21
EP0623953A3 (en) 1995-05-31
EP0623953A2 (en) 1994-11-09
JPH06302755A (ja) 1994-10-28
US5521428A (en) 1996-05-28

Similar Documents

Publication Publication Date Title
JP3681008B2 (ja) フラグレス半導体装置およびその製造方法
JPH10163401A (ja) リードフレーム、半導体パッケージ及び半導体パッケージの製造方法
JP2009124095A (ja) 半導体パッケージ及びその実装方法
JPH1131776A (ja) 半導体チップパッケージ
US5559364A (en) Leadframe
JP2000077435A (ja) 半導体装置及びその製造方法
JP2000003988A (ja) リードフレームおよび半導体装置
US5714792A (en) Semiconductor device having a reduced die support area and method for making the same
JP5100967B2 (ja) リードフレーム、これを利用した半導体チップパッケージ及びその製造方法
US6541856B2 (en) Thermally enhanced high density semiconductor package
JPH11121680A (ja) リードフレームおよび半導体装置
JP2838160B2 (ja) Ｘ形状ダイ支持部材を有する半導体装置
TWI249834B (en) Semiconductor device and its manufacturing method
JP4266429B2 (ja) 樹脂封止型半導体装置およびその製造方法
JPH03161958A (ja) プラスチックピングリッドアレイ型半導体パッケージ構造
JP2001077285A (ja) リードフレームとそれを用いた樹脂封止型半導体装置の製造方法
JPS6329960A (ja) 樹脂封止型半導体装置用リ−ドフレ−ム
JP2002057244A (ja) 半導体装置およびその製造方法
JPH09129813A (ja) リードフレームおよびこれを用いた半導体装置
KR100321149B1 (ko) 칩사이즈 패키지
JP2002164497A (ja) 半導体装置およびその製造方法
JP2001077136A (ja) 樹脂封止型半導体装置の製造方法
JP2001007271A (ja) 半導体装置及びその製造方法
JPS63160262A (ja) リ−ドフレ−ムおよびそれを用いた半導体装置
KR200179421Y1 (ko) 적층형 반도체 패캐이지

Legal Events

Date Code Title Description
A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20040615

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20040623

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20040830

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20050121

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20041217

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20050426

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20050512

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080527

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090527

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090527

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100527

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110527

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110527

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120527

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130527

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130527

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140527

Year of fee payment: 9

EXPY Cancellation because of completion of term