JP2023015278A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2023015278A JP2023015278A JP2022181139A JP2022181139A JP2023015278A JP 2023015278 A JP2023015278 A JP 2023015278A JP 2022181139 A JP2022181139 A JP 2022181139A JP 2022181139 A JP2022181139 A JP 2022181139A JP 2023015278 A JP2023015278 A JP 2023015278A
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- Prior art keywords
- resin
- terminal
- semiconductor device
- lead
- mounting portion
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 235
- 229920005989 resin Polymers 0.000 claims abstract description 274
- 239000011347 resin Substances 0.000 claims abstract description 274
- 238000007789 sealing Methods 0.000 claims abstract description 98
- 230000000149 penetrating effect Effects 0.000 claims description 6
- 238000006073 displacement reaction Methods 0.000 description 13
- 239000000463 material Substances 0.000 description 9
- 230000000694 effects Effects 0.000 description 8
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 239000008186 active pharmaceutical agent Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000012466 permeate Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000005452 bending Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
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Abstract
【解決手段】半導体装置A1は、半導体素子、第1リード1、第2リード2及び封止樹脂8を備える。半導体素子は、第1電極および第2電極を備える。第1リードは、第1電極が接合される搭載部主面及び搭載部裏面を有する搭載部110と、第1電極と導通する第1端子120と、を有する。第2リードは、第2電極と導通する第2端子220を有する。封止樹脂は、互いに反対側を向く樹脂主面および樹脂裏面と、各端子が突出する方向を向く樹脂端面と、を備える。搭載部裏面は、樹脂裏面から露出する。封止樹脂は、樹脂裏面側において、第2端子と樹脂端面との境界と、搭載部裏面との間に、樹脂裏面から凹む裏面溝部87を備える。
【選択図】図2
Description
厚さ方向において互いに反対側を向く素子主面および素子裏面と、前記素子裏面に配置された第1電極と、前記素子主面に配置された第2電極とを有する半導体素子と、
前記半導体素子の前記第1電極が接合される搭載部主面、および、前記厚さ方向において前記搭載部主面とは反対側を向く搭載部裏面を有する搭載部と、前記搭載部を介して前記第1電極と導通する第1端子とを有する第1リードと、
前記第2電極と導通する第2端子を有する第2リードと、
前記第1リードおよび前記第2リードの一部ずつと、前記半導体素子とを覆う封止樹脂と、を備え、
前記第1端子および前記第2端子は、前記封止樹脂から突出し、
前記封止樹脂は、厚さ方向において互いに反対側を向く樹脂主面および樹脂裏面と、前記樹脂主面および前記樹脂裏面を繋ぎ、かつ、前記第1端子および前記第2端子が突出する方向を向く樹脂端面と、前記樹脂主面および前記樹脂裏面を繋ぎ、かつ、前記樹脂端面に繋がる1対の樹脂側面とを備え、
前記搭載部裏面は前記樹脂裏面から露出し、
前記封止樹脂は、前記樹脂裏面側において、前記第2端子と前記樹脂端面との境界と、前記搭載部裏面との間に、前記樹脂裏面から前記厚さ方向に離れた部分を有する裏面変位部を備える、半導体装置。
付記2.
前記裏面変位部は、前記厚さ方向視において、前記第1リードに重ならない、付記1に記載の半導体装置。
付記3.
前記裏面変位部は、前記第2端子側の前記樹脂側面まで延びている、付記1または2に記載の半導体装置。
付記4.
前記裏面変位部は、前記樹脂側面に平行な断面が四角形状の溝である、付記1ないし3のいずれか1つに記載の半導体装置。
付記5.
前記裏面変位部は、前記樹脂裏面から突出しており、前記樹脂側面に平行な断面が四角形状である、付記1ないし3のいずれか1つに記載の半導体装置。
付記6.
前記裏面変位部は複数の裏面変位部を含む、付記1ないし5のいずれか1つに記載の半導体装置。
付記7.
前記第1リードは、前記搭載部と前記第1端子とに繋がる連結部をさらに備え、前記連結部は、前記搭載部および前記第1端子に対して傾斜している、付記1ないし6のいずれか1つに記載の半導体装置。
付記8.
前記封止樹脂は、前記樹脂主面から前記樹脂裏面まで貫通する樹脂貫通孔を備え、前記搭載部は、前記搭載部主面から前記搭載部裏面まで貫通する搭載部貫通孔を備え、前記樹脂貫通孔は前記搭載部貫通孔の内側に位置する、付記1ないし7のいずれか1つに記載の半導体装置。
付記9.
前記封止樹脂は、前記樹脂端面から突出する端面凸部を備え、前記第2端子は、前記端面凸部から突出する、付記1ないし8のいずれか1つに記載の半導体装置。
付記10.
前記封止樹脂は、前記端面凸部から離間し、かつ、前記樹脂端面から突出する第2の端面凸部を備え、前記第1端子は、前記第2の端面凸部から突出する、付記9に記載の半導体装置。
付記11.
前記半導体素子は、ダイオードである、付記1ないし10のいずれか1つに記載の半導体装置。
付記12.
第3リードをさらに備える構成において、
前記半導体素子は、前記素子主面に配置された第3電極を備えており、前記第3リードは、前記第3電極と導通する第3端子を備えている、付記1ないし10のいずれか1つに記載の半導体装置。
付記13.
前記封止樹脂は、前記樹脂裏面側において、前記第3端子と前記樹脂端面との境界と、前記搭載部裏面との間に、前記樹脂裏面から前記厚さ方向に離れた部分を有する第2の裏面変位部を備える、付記12に記載の半導体装置。
付記14.
前記裏面変位部は、前記第3端子と前記樹脂端面との境界と、前記搭載部裏面との間まで延びる、付記12に記載の半導体装置。
付記15.
前記半導体素子は、トランジスタである、付記11ないし14のいずれか1つに記載の半導体装置。
付記16.
第4リードをさらに備える構成において、
前記半導体素子は、第4電極を備え、前記第4リードは、前記第4電極と導通する第4端子を備える、付記12に記載の半導体装置。
Claims (16)
- 厚さ方向において互いに反対側を向く素子主面および素子裏面と、前記素子裏面に配置された第1電極と、前記素子主面に配置された第2電極とを有する半導体素子と、
前記半導体素子の前記第1電極が接合される搭載部主面、および、前記厚さ方向において前記搭載部主面とは反対側を向く搭載部裏面を有する搭載部と、前記搭載部を介して前記第1電極に電流を流す第1端子とを有する第1リードと、
前記第2電極と導通する第2端子を有する第2リードと、
前記第1リードおよび前記第2リードの各々の一部と、前記半導体素子とを覆う封止樹脂と、
を備え、
前記第1端子および前記第2端子は、前記封止樹脂から突出し、
前記封止樹脂は、前記厚さ方向において互いに反対側を向く樹脂主面および樹脂裏面と、前記樹脂主面および前記樹脂裏面を繋ぎ、かつ、前記第1端子および前記第2端子が突出する方向を向く樹脂端面と、前記樹脂主面および前記樹脂裏面を繋ぎ、かつ、前記樹脂端面に繋がる1対の樹脂側面とを備え、
前記搭載部裏面は前記樹脂裏面から露出し、
前記封止樹脂は、前記樹脂裏面側において、前記第1端子の前記封止樹脂から露出した部分と前記封止樹脂との境界と、前記搭載部裏面との間に、凹部を備える、半導体装置。 - 前記封止樹脂は、前記樹脂端面とは反対側を向く樹脂第2端面をさらに備え、
前記第1リードは、前記樹脂第2端面から露出しない、請求項1に記載の半導体装置。 - 前記凹部は、前記厚さ方向視において、前記第1リードに重ならない、請求項1または2に記載の半導体装置。
- 前記凹部は、前記1対の樹脂側面の一方にのみ達している、請求項1ないし3のいずれか1つに記載の半導体装置。
- 前記凹部は、前記樹脂側面に平行な断面が四角形状である、請求項1ないし4のいずれか1つに記載の半導体装置。
- 前記凹部は、平坦な単一の底面を含む、請求項1ないし5のいずれか1つに記載の半導体装置。
- 前記第1リードは、前記搭載部と前記第1端子とに繋がる連結部を備え、前記連結部は、前記搭載部および前記第1端子に対して傾斜している、請求項1ないし6のいずれか1つに記載の半導体装置。
- 前記封止樹脂は、前記樹脂主面から前記樹脂裏面まで貫通する樹脂貫通孔を備え、前記搭載部は、前記搭載部主面から前記搭載部裏面まで貫通する搭載部貫通孔を備え、前記樹脂貫通孔は前記搭載部貫通孔の内側に位置する、請求項1ないし7のいずれか1つに記載の半導体装置。
- 前記封止樹脂は、前記樹脂端面から突出する端面凸部を備え、前記第2端子は、前記端面凸部から突出する、請求項1ないし8のいずれか1つに記載の半導体装置。
- 前記封止樹脂は、前記端面凸部から離間し、かつ、前記樹脂端面から突出する第2の端面凸部を備え、前記第1端子は、前記第2の端面凸部から突出する、請求項9に記載の半導体装置。
- 前記半導体素子は、ダイオードである、請求項1ないし10のいずれか1つに記載の半導体装置。
- 第3リードをさらに備える構成において、
前記半導体素子は、前記素子主面に配置された第3電極を備え、前記第3リードは、前記第3電極と導通する第3端子を備える、請求項1ないし10のいずれか1つに記載の半導体装置。 - 前記封止樹脂は、前記樹脂裏面側において、前記第3端子と前記樹脂端面との境界と、前記搭載部裏面との間に、第2の凹部を備え、前記凹部と前記第2の凹部とは、前記1対の樹脂側面が並ぶ方向において離間している、請求項12に記載の半導体装置。
- 前記凹部は、前記第3端子と前記樹脂端面との境界と、前記搭載部裏面との間まで延びる、請求項12に記載の半導体装置。
- 前記半導体素子は、トランジスタである、請求項12ないし14のいずれか1つに記載の半導体装置。
- 第4リードをさらに備える構成において、
前記半導体素子は、第4電極を備え、前記第4リードは、前記第4電極と導通する第4端子を備える、請求項12に記載の半導体装置。
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JP6817777B2 (ja) * | 2015-12-16 | 2021-01-20 | ローム株式会社 | 半導体装置 |
JP6517682B2 (ja) | 2015-12-17 | 2019-05-22 | トヨタ自動車株式会社 | 半導体装置 |
JP6973730B2 (ja) | 2016-07-08 | 2021-12-01 | ローム株式会社 | 半導体装置の製造方法および半導体装置 |
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2019
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DE212019000110U1 (de) | 2020-03-05 |
US11502014B2 (en) | 2022-11-15 |
US20230030063A1 (en) | 2023-02-02 |
DE112019005278T5 (de) | 2021-07-29 |
US11854923B2 (en) | 2023-12-26 |
JP2024059956A (ja) | 2024-05-01 |
WO2020059751A1 (ja) | 2020-03-26 |
CN112703594A (zh) | 2021-04-23 |
US20230282535A1 (en) | 2023-09-07 |
JP7450006B2 (ja) | 2024-03-14 |
JPWO2020059751A1 (ja) | 2021-08-30 |
US20210320044A1 (en) | 2021-10-14 |
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