JP2021530103A5 - - Google Patents
Info
- Publication number
- JP2021530103A5 JP2021530103A5 JP2020572708A JP2020572708A JP2021530103A5 JP 2021530103 A5 JP2021530103 A5 JP 2021530103A5 JP 2020572708 A JP2020572708 A JP 2020572708A JP 2020572708 A JP2020572708 A JP 2020572708A JP 2021530103 A5 JP2021530103 A5 JP 2021530103A5
- Authority
- JP
- Japan
- Prior art keywords
- die
- integrated circuit
- circuit
- chip
- heat sink
- Prior art date
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/024,670 | 2018-06-29 | ||
| US16/024,670 US10629512B2 (en) | 2018-06-29 | 2018-06-29 | Integrated circuit die with in-chip heat sink |
| PCT/US2019/039894 WO2020006459A1 (en) | 2018-06-29 | 2019-06-28 | Integrated circuit die with in-chip heat sink |
Publications (4)
| Publication Number | Publication Date |
|---|---|
| JP2021530103A JP2021530103A (ja) | 2021-11-04 |
| JP2021530103A5 true JP2021530103A5 (https=) | 2022-06-10 |
| JPWO2020006459A5 JPWO2020006459A5 (https=) | 2022-06-10 |
| JP7665338B2 JP7665338B2 (ja) | 2025-04-21 |
Family
ID=67441623
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2020572708A Active JP7665338B2 (ja) | 2018-06-29 | 2019-06-28 | インチップヒートシンクを有する集積回路ダイ |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US10629512B2 (https=) |
| EP (1) | EP3815135B1 (https=) |
| JP (1) | JP7665338B2 (https=) |
| KR (1) | KR102683078B1 (https=) |
| CN (1) | CN112352311A (https=) |
| WO (1) | WO2020006459A1 (https=) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11133263B2 (en) | 2019-09-17 | 2021-09-28 | Intel Corporation | High-density interconnects for integrated circuit packages |
| US11460499B2 (en) * | 2019-09-17 | 2022-10-04 | Intel Corporation | Dual sided thermal management solutions for integrated circuit packages |
| US11488887B1 (en) | 2020-03-05 | 2022-11-01 | Xilinx, Inc. | Thermal enablement of dies with impurity gettering |
| US11769752B2 (en) | 2020-07-24 | 2023-09-26 | Micron Technology, Inc. | Stacked semiconductor die assemblies with substrate heat sinks and associated systems and methods |
| CN116420229A (zh) * | 2021-02-19 | 2023-07-11 | 华为数字能源技术有限公司 | 封装结构、动力电气控制系统及制造方法 |
| US11246211B1 (en) | 2021-03-01 | 2022-02-08 | Xilinx, Inc. | Micro device with through PCB cooling |
| US12154838B2 (en) * | 2021-08-27 | 2024-11-26 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor arrangement and method of forming |
| US12355024B2 (en) | 2021-11-17 | 2025-07-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Heterogenous integration scheme for III-V/Si and Si CMOS integrated circuits |
| US12315781B2 (en) | 2021-12-28 | 2025-05-27 | Xilinx, Inc. | Heat spreader for a semiconductor package |
| CN115881659A (zh) * | 2022-12-07 | 2023-03-31 | 成都海光微电子技术有限公司 | 一种芯片 |
| US20250118706A1 (en) * | 2023-10-05 | 2025-04-10 | Advanced Micro Devices, Inc. | Chip package with a thermal carrier |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3004578B2 (ja) * | 1995-05-12 | 2000-01-31 | 財団法人工業技術研究院 | 熱放散増強のための多熱導伝路とパッケージ統合性及び信頼性向上のための縁の周りを囲むキャップからなる集積回路パッケージ |
| JPH09213696A (ja) * | 1996-02-02 | 1997-08-15 | Hitachi Ltd | 半導体装置 |
| US6433360B1 (en) | 1999-01-15 | 2002-08-13 | Xilinx, Inc. | Structure and method of testing failed or returned die to determine failure location and type |
| US6849940B1 (en) | 2000-11-20 | 2005-02-01 | Ati Technologies, Inc. | Integrated circuit package for the transfer of heat generated by the inte circuit and method of fabricating same |
| US20030038344A1 (en) * | 2001-08-24 | 2003-02-27 | Mcnc | Through-via vertical interconnects, through-via heat sinks and associated fabrication methods |
| US6822325B2 (en) | 2002-08-01 | 2004-11-23 | Altera Corporation | Isolating temperature sensitive components from heat sources in integrated circuits |
| JP3976089B2 (ja) * | 2002-08-09 | 2007-09-12 | 株式会社リコー | 半導体集積回路装置及びその製造方法 |
| JP2006140326A (ja) * | 2004-11-12 | 2006-06-01 | Toshiba Corp | 半導体装置 |
| JP4688526B2 (ja) * | 2005-03-03 | 2011-05-25 | Ｏｋｉセミコンダクタ株式会社 | 半導体装置及びその製造方法 |
| FR2901407A1 (fr) | 2006-05-18 | 2007-11-23 | Commissariat Energie Atomique | Circuit integre sur substrat du type semiconducteur sur isolant, a evacuation laterale de la chaleur |
| US9013035B2 (en) | 2006-06-20 | 2015-04-21 | Broadcom Corporation | Thermal improvement for hotspots on dies in integrated circuit packages |
| KR100874910B1 (ko) * | 2006-10-30 | 2008-12-19 | 삼성전자주식회사 | 수직형 열방출 통로를 갖는 적층형 반도체 패키지 및 그제조방법 |
| US20080169556A1 (en) * | 2007-01-16 | 2008-07-17 | Xin Tec Inc. | Chip package module heat sink |
| KR101361828B1 (ko) * | 2007-09-03 | 2014-02-12 | 삼성전자주식회사 | 반도체 디바이스, 반도체 패키지, 스택 모듈, 카드, 시스템및 반도체 디바이스의 제조 방법 |
| US8021907B2 (en) | 2008-06-09 | 2011-09-20 | Stats Chippac, Ltd. | Method and apparatus for thermally enhanced semiconductor package |
| KR20120053332A (ko) * | 2010-11-17 | 2012-05-25 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조 방법 |
| JP5849478B2 (ja) * | 2011-07-11 | 2016-01-27 | 富士通セミコンダクター株式会社 | 半導体装置および試験方法 |
| US9082633B2 (en) | 2011-10-13 | 2015-07-14 | Xilinx, Inc. | Multi-die integrated circuit structure with heat sink |
| JP6093556B2 (ja) * | 2012-11-13 | 2017-03-08 | 富士通株式会社 | 半導体装置および半導体集積回路装置、電子装置 |
| US9368479B2 (en) * | 2014-03-07 | 2016-06-14 | Invensas Corporation | Thermal vias disposed in a substrate proximate to a well thereof |
| US10164681B2 (en) | 2016-06-06 | 2018-12-25 | Skyworks Solutions, Inc. | Isolating noise sources and coupling fields in RF chips |
| KR20180069636A (ko) * | 2016-12-15 | 2018-06-25 | 삼성전자주식회사 | 반도체 메모리 소자 및 이를 구비하는 칩 적층 패키지 |
-
2018
- 2018-06-29 US US16/024,670 patent/US10629512B2/en active Active
-
2019
- 2019-06-28 CN CN201980043828.6A patent/CN112352311A/zh active Pending
- 2019-06-28 EP EP19745380.6A patent/EP3815135B1/en active Active
- 2019-06-28 KR KR1020217002674A patent/KR102683078B1/ko active Active
- 2019-06-28 WO PCT/US2019/039894 patent/WO2020006459A1/en not_active Ceased
- 2019-06-28 JP JP2020572708A patent/JP7665338B2/ja active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2021530103A5 (https=) | ||
| US11515290B2 (en) | Semiconductor package | |
| KR102643069B1 (ko) | 열 방출 구조를 포함하는 적층 반도체 패키지 | |
| KR102740759B1 (ko) | 반도체 패키지 | |
| TWI840470B (zh) | 半導體封裝 | |
| KR102854683B1 (ko) | 방열층을 포함한 반도체 패키지 | |
| CN104733413A (zh) | 一种mosfet封装结构 | |
| KR101450761B1 (ko) | 반도체 패키지, 적층형 반도체 패키지 및 반도체 패키지의 제조방법 | |
| JPWO2020006459A5 (https=) | ||
| CN1319138C (zh) | 封装的半导体器件的形成方法 | |
| CN101322450B (zh) | 具有内部散热结构的ic封装 | |
| US11296005B2 (en) | Integrated device package including thermally conductive element and method of manufacturing same | |
| CN114464581B (zh) | 封装结构及其制造方法 | |
| CN101286505B (zh) | 具有天线的半导体封装结构 | |
| US10008441B2 (en) | Semiconductor package | |
| KR20090096184A (ko) | 반도체 패키지 | |
| CN204464263U (zh) | 一种模块化的mosfet封装结构 | |
| US20090250797A1 (en) | Multi-Chip Package | |
| KR20040037561A (ko) | 반도체패키지 | |
| US9190355B2 (en) | Multi-use substrate for integrated circuit | |
| US6265769B1 (en) | Double-sided chip mount package | |
| JP4225243B2 (ja) | 半導体装置及び基板接続構造 | |
| JP4371946B2 (ja) | 半導体装置及びその基板接続構造 | |
| TW396571B (en) | Multi-die semiconductor package | |
| JP2004072113A (ja) | 熱的に強化された集積回路パッケージ |