KR102683078B1 - 인칩 열 싱크를 구비한 집적 회로 다이 - Google Patents
인칩 열 싱크를 구비한 집적 회로 다이 Download PDFInfo
- Publication number
- KR102683078B1 KR102683078B1 KR1020217002674A KR20217002674A KR102683078B1 KR 102683078 B1 KR102683078 B1 KR 102683078B1 KR 1020217002674 A KR1020217002674 A KR 1020217002674A KR 20217002674 A KR20217002674 A KR 20217002674A KR 102683078 B1 KR102683078 B1 KR 102683078B1
- Authority
- KR
- South Korea
- Prior art keywords
- heat sink
- die
- circuit
- chip
- chip heat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
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- H01L23/367—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
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- H01L23/481—
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- H01L23/49827—
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- H01L23/50—
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- H01L23/528—
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- H01L24/06—
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- H01L24/17—
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- H01L25/0657—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/42—Vias, e.g. via plugs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/43—Layouts of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
- H10W70/635—Through-vias
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
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- H01L2224/06519—
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- H01L2224/16146—
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- H01L2224/16227—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
- H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
- H10W40/228—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area the projecting parts being wire-shaped or pin-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
- H10W72/07254—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in dispositions
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/247—Dispositions of multiple bumps
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/261—Functions other than electrical connecting
- H10W72/265—Providing thermal transfer, e.g. thermal bumps
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/261—Functions other than electrical connecting
- H10W72/267—Multiple bump connectors having different functions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/321—Structures or relative sizes of die-attach connectors
- H10W72/325—Die-attach connectors having a filler embedded in a matrix
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/877—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/961—Functions of bonds pads
- H10W72/965—Providing thermal transfer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/961—Functions of bonds pads
- H10W72/967—Multiple bond pads having different functions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/288—Configurations of stacked chips characterised by arrangements for thermal management of the stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/291—Configurations of stacked chips characterised by containers, encapsulations, or other housings for the stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/024,670 | 2018-06-29 | ||
| US16/024,670 US10629512B2 (en) | 2018-06-29 | 2018-06-29 | Integrated circuit die with in-chip heat sink |
| PCT/US2019/039894 WO2020006459A1 (en) | 2018-06-29 | 2019-06-28 | Integrated circuit die with in-chip heat sink |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20210024129A KR20210024129A (ko) | 2021-03-04 |
| KR102683078B1 true KR102683078B1 (ko) | 2024-07-08 |
Family
ID=67441623
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020217002674A Active KR102683078B1 (ko) | 2018-06-29 | 2019-06-28 | 인칩 열 싱크를 구비한 집적 회로 다이 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US10629512B2 (https=) |
| EP (1) | EP3815135B1 (https=) |
| JP (1) | JP7665338B2 (https=) |
| KR (1) | KR102683078B1 (https=) |
| CN (1) | CN112352311A (https=) |
| WO (1) | WO2020006459A1 (https=) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11133263B2 (en) | 2019-09-17 | 2021-09-28 | Intel Corporation | High-density interconnects for integrated circuit packages |
| US11460499B2 (en) * | 2019-09-17 | 2022-10-04 | Intel Corporation | Dual sided thermal management solutions for integrated circuit packages |
| US11488887B1 (en) | 2020-03-05 | 2022-11-01 | Xilinx, Inc. | Thermal enablement of dies with impurity gettering |
| US11769752B2 (en) | 2020-07-24 | 2023-09-26 | Micron Technology, Inc. | Stacked semiconductor die assemblies with substrate heat sinks and associated systems and methods |
| CN116420229A (zh) * | 2021-02-19 | 2023-07-11 | 华为数字能源技术有限公司 | 封装结构、动力电气控制系统及制造方法 |
| US11246211B1 (en) | 2021-03-01 | 2022-02-08 | Xilinx, Inc. | Micro device with through PCB cooling |
| US12154838B2 (en) * | 2021-08-27 | 2024-11-26 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor arrangement and method of forming |
| US12355024B2 (en) | 2021-11-17 | 2025-07-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Heterogenous integration scheme for III-V/Si and Si CMOS integrated circuits |
| US12315781B2 (en) | 2021-12-28 | 2025-05-27 | Xilinx, Inc. | Heat spreader for a semiconductor package |
| CN115881659A (zh) * | 2022-12-07 | 2023-03-31 | 成都海光微电子技术有限公司 | 一种芯片 |
| US20250118706A1 (en) * | 2023-10-05 | 2025-04-10 | Advanced Micro Devices, Inc. | Chip package with a thermal carrier |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040021198A1 (en) | 2002-08-01 | 2004-02-05 | Ting-Wah Wong | Isolating temperature sensitive components from heat sources in integrated circuits |
| JP2006245311A (ja) * | 2005-03-03 | 2006-09-14 | Oki Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2014099470A (ja) * | 2012-11-13 | 2014-05-29 | Fujitsu Ltd | 半導体装置および半導体集積回路装置、電子装置 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3004578B2 (ja) * | 1995-05-12 | 2000-01-31 | 財団法人工業技術研究院 | 熱放散増強のための多熱導伝路とパッケージ統合性及び信頼性向上のための縁の周りを囲むキャップからなる集積回路パッケージ |
| JPH09213696A (ja) * | 1996-02-02 | 1997-08-15 | Hitachi Ltd | 半導体装置 |
| US6433360B1 (en) | 1999-01-15 | 2002-08-13 | Xilinx, Inc. | Structure and method of testing failed or returned die to determine failure location and type |
| US6849940B1 (en) | 2000-11-20 | 2005-02-01 | Ati Technologies, Inc. | Integrated circuit package for the transfer of heat generated by the inte circuit and method of fabricating same |
| US20030038344A1 (en) * | 2001-08-24 | 2003-02-27 | Mcnc | Through-via vertical interconnects, through-via heat sinks and associated fabrication methods |
| JP3976089B2 (ja) * | 2002-08-09 | 2007-09-12 | 株式会社リコー | 半導体集積回路装置及びその製造方法 |
| JP2006140326A (ja) * | 2004-11-12 | 2006-06-01 | Toshiba Corp | 半導体装置 |
| FR2901407A1 (fr) | 2006-05-18 | 2007-11-23 | Commissariat Energie Atomique | Circuit integre sur substrat du type semiconducteur sur isolant, a evacuation laterale de la chaleur |
| US9013035B2 (en) | 2006-06-20 | 2015-04-21 | Broadcom Corporation | Thermal improvement for hotspots on dies in integrated circuit packages |
| KR100874910B1 (ko) * | 2006-10-30 | 2008-12-19 | 삼성전자주식회사 | 수직형 열방출 통로를 갖는 적층형 반도체 패키지 및 그제조방법 |
| US20080169556A1 (en) * | 2007-01-16 | 2008-07-17 | Xin Tec Inc. | Chip package module heat sink |
| KR101361828B1 (ko) * | 2007-09-03 | 2014-02-12 | 삼성전자주식회사 | 반도체 디바이스, 반도체 패키지, 스택 모듈, 카드, 시스템및 반도체 디바이스의 제조 방법 |
| US8021907B2 (en) | 2008-06-09 | 2011-09-20 | Stats Chippac, Ltd. | Method and apparatus for thermally enhanced semiconductor package |
| KR20120053332A (ko) * | 2010-11-17 | 2012-05-25 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조 방법 |
| JP5849478B2 (ja) * | 2011-07-11 | 2016-01-27 | 富士通セミコンダクター株式会社 | 半導体装置および試験方法 |
| US9082633B2 (en) | 2011-10-13 | 2015-07-14 | Xilinx, Inc. | Multi-die integrated circuit structure with heat sink |
| US9368479B2 (en) * | 2014-03-07 | 2016-06-14 | Invensas Corporation | Thermal vias disposed in a substrate proximate to a well thereof |
| US10164681B2 (en) | 2016-06-06 | 2018-12-25 | Skyworks Solutions, Inc. | Isolating noise sources and coupling fields in RF chips |
| KR20180069636A (ko) * | 2016-12-15 | 2018-06-25 | 삼성전자주식회사 | 반도체 메모리 소자 및 이를 구비하는 칩 적층 패키지 |
-
2018
- 2018-06-29 US US16/024,670 patent/US10629512B2/en active Active
-
2019
- 2019-06-28 CN CN201980043828.6A patent/CN112352311A/zh active Pending
- 2019-06-28 EP EP19745380.6A patent/EP3815135B1/en active Active
- 2019-06-28 KR KR1020217002674A patent/KR102683078B1/ko active Active
- 2019-06-28 WO PCT/US2019/039894 patent/WO2020006459A1/en not_active Ceased
- 2019-06-28 JP JP2020572708A patent/JP7665338B2/ja active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040021198A1 (en) | 2002-08-01 | 2004-02-05 | Ting-Wah Wong | Isolating temperature sensitive components from heat sources in integrated circuits |
| JP2006245311A (ja) * | 2005-03-03 | 2006-09-14 | Oki Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2014099470A (ja) * | 2012-11-13 | 2014-05-29 | Fujitsu Ltd | 半導体装置および半導体集積回路装置、電子装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2021530103A (ja) | 2021-11-04 |
| WO2020006459A1 (en) | 2020-01-02 |
| EP3815135A1 (en) | 2021-05-05 |
| EP3815135B1 (en) | 2025-10-29 |
| US10629512B2 (en) | 2020-04-21 |
| US20200006186A1 (en) | 2020-01-02 |
| CN112352311A (zh) | 2021-02-09 |
| KR20210024129A (ko) | 2021-03-04 |
| JP7665338B2 (ja) | 2025-04-21 |
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