JP2021034557A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2021034557A
JP2021034557A JP2019153085A JP2019153085A JP2021034557A JP 2021034557 A JP2021034557 A JP 2021034557A JP 2019153085 A JP2019153085 A JP 2019153085A JP 2019153085 A JP2019153085 A JP 2019153085A JP 2021034557 A JP2021034557 A JP 2021034557A
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Prior art keywords
electrode
semiconductor device
lower electrode
semiconductor substrate
protrusion
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JP2019153085A
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JP7226186B2 (ja
Inventor
真也 曽根田
Shinya Soneda
真也 曽根田
新田　哲也
Tetsuya Nitta
哲也 新田
原田　健司
Kenji Harada
健司 原田
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Priority to JP2019153085A priority Critical patent/JP7226186B2/ja
Priority to US16/783,115 priority patent/US11239329B2/en
Priority to DE102020120481.7A priority patent/DE102020120481A1/de
Priority to CN202010830288.0A priority patent/CN112420819A/zh
Publication of JP2021034557A publication Critical patent/JP2021034557A/ja
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Publication of JP7226186B2 publication Critical patent/JP7226186B2/ja
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Abstract

【課題】本発明は半導体装置に関し、めっきによる半導体基板へのダメージを抑制しながら高信頼性を実現できる半導体装置を得ることを目的とする。【解決手段】本発明に係る半導体装置は、半導体基板と、該半導体基板の上に設けられた下部電極と、該半導体基板の上に設けられ、該下部電極を囲む絶縁膜と、該下部電極の上に設けられ、上面に凸部を有するめっき電極と、を備え、該凸部は、該半導体基板の上面と平行な第１方向に延びる第１部分と、該半導体基板の該上面と平行であり該第１方向と交差する第２方向に延びる第２部分と、を有し、該めっき電極は該絶縁膜よりも薄い。【選択図】図１

Description

本発明は、半導体装置に関する。
特許文献１には、半導体素子が形成された半導体基板と、半導体基板上に設けられ、半導体素子と電気的に接続する第１電極層とを備えた半導体装置が開示されている。この半導体装置は、さらに第１電極層の上面の一部に積層された保護絶縁膜と、第１電極層と保護絶縁膜の両者に亘って積層された第２電極層とを備える。第２電極層を構成する材料は、第１電極層を構成する材料よりも機械的強度が高い。第１電極層の上面には、溝部が設けられる。また、第２電極層の下面には、溝部内に突出する突出部が設けられている。
特開２０１７−０５０３５８号公報
特許文献１に示されるような構造において、第２電極層をめっきにより形成することが考えられる。このとき、溝部において、めっき処理液が半導体基板へ到達し、半導体基板がダメージを受ける可能性がある。
本発明は、上述の課題を解決するためになされたもので、めっきによる半導体基板へのダメージを抑制しながら高信頼性を実現できる半導体装置を得ることを目的とする。
本発明に係る半導体装置は、半導体基板と、該半導体基板の上に設けられた下部電極と、該半導体基板の上に設けられ、該下部電極を囲む絶縁膜と、該下部電極の上に設けられ、上面に凸部を有するめっき電極と、を備え、該凸部は、該半導体基板の上面と平行な第１方向に延びる第１部分と、該半導体基板の該上面と平行であり該第１方向と交差する第２方向に延びる第２部分と、を有し、該めっき電極は該絶縁膜よりも薄い。
本発明に係る半導体装置は、半導体基板と、該半導体基板の上に設けられた下部電極と、該半導体基板の上に設けられ、該下部電極を囲み、チップの外縁を形成する絶縁膜と、該下部電極の上に設けられ、上面に凸部を有するめっき電極と、を備え、該凸部は、該チップの外周部で該半導体基板の上面と平行な第１方向に延びる第１部分と、該チップの外周部で該半導体基板の該上面と平行であり該第１方向と交差する第２方向に延びる第２部分と、を有する。
本発明に係る半導体装置は、半導体基板と、該半導体基板の上に設けられた下部電極と、該半導体基板の上に設けられ、該下部電極を囲む絶縁膜と、該下部電極の上に設けられ、上面に十字型の凸部を有するめっき電極と、を備える。
本発明に係る半導体装置では、下部電極に溝部がないため、めっきによる半導体基板へのダメージを抑制できる。また、凸部によって半導体装置の機械的強度が向上するため、半導体装置の高信頼性を実現できる。
実施の形態１に係る半導体装置の断面図である。 実施の形態１に係る半導体装置の平面図である。 実施の形態１に係る半導体装置にはんだが設けられた状態を示す断面図である。 実施の形態１の第１の変形例に係る半導体装置の断面図である。 実施の形態１の第２の変形例に係る半導体装置の平面図である。 実施の形態１の第３の変形例に係る半導体装置の平面図である。 実施の形態２に係る半導体装置の断面図である。 実施の形態３に係る半導体装置の断面図である。
本発明の実施の形態に係る半導体装置について図面を参照して説明する。同じ又は対応する構成要素には同じ符号を付し、説明の繰り返しを省略する場合がある。
実施の形態１．
図１は、実施の形態１に係る半導体装置１００の断面図である。半導体装置１００は、半導体基板１０、下部電極１２、絶縁膜１４、めっき電極１６、裏面電極１８を備える。半導体装置１００は例えば電力半導体装置である。電力半導体装置は、例えばＭＯＳＦＥＴ（Ｍｅｔａｌ−Ｏｘｉｄｅ−Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｆｉｅｌｄ−Ｅｆｆｅｃｔ Ｔｒａｎｓｉｓｔｏｒ）である。電力半導体装置は、ＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ Ｇａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎｓｉｓｔｏｒ）またはダイオードであっても良い。
下部電極１２は半導体基板１０の上に設けられる。下部電極１２は、半導体基板１０の上面に、パターンとして設けられる。下部電極１２は、半導体装置１００に主電流を流すための電極である。下部電極１２は、例えばＭＯＳＦＥＴのソース電極、ＩＧＢＴのエミッタ電極またはダイオードのアノード電極である。下部電極１２は、例えばＡｌ、Ｓｉ、Ｃｕなどを含むＡｌ合金である。下部電極１２の厚さは、例えば０．１μｍ〜６μｍである。
下部電極１２の上面には、突起部１３が設けられる。突起部１３は下部電極１２の一部である。突起部１３は、下部電極１２と同じ材料から形成される。突起部１３は、下部電極１２の一部が他の部分よりも厚く形成されることで設けられる。突起部１３の高さＴ１は例えば０．５μｍ〜１０μｍであり、幅Ｗ１は例えば０．５μｍ〜１００μｍである。
絶縁膜１４は半導体基板１０の上に設けられる。絶縁膜１４は半導体基板１０の外周部を覆う。絶縁膜１４は下部電極１２を囲む。絶縁膜１４の一部は、下部電極１２の上に乗り上げる。絶縁膜１４は、下部電極１２の端部を覆う。絶縁膜１４は、下部電極１２および半導体基板１０を保護する保護絶縁膜である。絶縁膜１４は、例えばポリイミドから形成される。
絶縁膜１４は、中央部に開口部を有する。開口部にはめっき技術によりめっき電極１６が設けられる。めっき電極１６は下部電極１２の上に設けられる。めっき電極１６は、全体が絶縁膜１４よりも内側に設けられる。めっき電極１６は、はんだ接合用の金属膜であり、例えば無電解めっきで成長させたＮｉ−Ｐ膜である。Ｎｉ−Ｐ膜は、Ｐを数％含有した金属膜である。めっき電極１６は、下部電極１２よりも機械的強度が高い材料から形成されても良い。
一般に、金属膜とはんだとが接合された状態では、金属膜とはんだとの合金化が進む。これにより、金属膜の厚さが減少することがある。このため、めっき電極１６は、半導体装置１００の使用条件下において、合金化によって消失しないように設計される。これにより、はんだ接合部の信頼性を確保できる。特に、厳しい熱ストレス環境下で半導体装置１００を使用する場合には、めっき電極１６が消失しない程度に、めっき電極１６を厚く設計すると良い。この場合、スパッタリング技術よりもめっき技術でめっき電極１６を形成することが好ましい。めっき電極１６の厚さＴ３は、例えば０．１μｍ〜１０μｍである。また、めっき電極１６は絶縁膜１４上には形成されず、絶縁膜１４より薄い。
めっき電極１６は、上面に凸部１７を有する。めっき電極１６は、下部電極１２の突起部１３を覆う。これにより、突起部１３の形状がめっき電極１６の表面に反映され、めっき電極１６に凸部１７が形成される。従って、凸部１７は平面視で突起部１３と重なる位置に設けられる。凸部１７は突起部１３に沿って断面視でＵ字状に形成される。凸部１７の高さＴ２は例えば０．５μｍ〜１０μｍである。凸部１７の幅Ｗ２は突起部１３の幅Ｗ１よりも例えば１μｍ〜２０μｍ広い。
凸部１７におけるめっき電極１６の厚さＴ２＋Ｔ３は、めっき電極１６のうち凸部１７以外の平面部の厚さＴ３よりも厚くなる。このため、凸部１７は平面部よりも垂直方向の機械的剛性が高い。また、めっき電極１６は絶縁膜１４よりも薄い。特に、めっき電極１６のうち凸部１７以外の平面部は、絶縁膜１４の下部電極１２の上に設けられた部分よりも薄い。つまり、Ｔ３＜Ｔ４である。Ｔ３＞Ｔ４となると、めっき電極１６が絶縁膜１４上にも薄く形成されるおそれがある。この場合、めっき電極１６のうち絶縁膜１４上の部分はＴ３とＴ４の差分に等しい厚みを有する。このとき、めっき電極１６に部分的に剛性の低い箇所ができる。本実施の形態では、Ｔ３＜Ｔ４とすることでめっき電極１６に剛性の低い箇所が形成されることを抑制できる。
裏面電極１８は、半導体基板１０の上面と対向する面である裏面に設けられる。裏面電極１８は、半導体装置１００に主電流を流すための電極である。裏面電極１８は、例えばＭＯＳＦＥＴのドレイン電極、ＩＧＢＴのコレクタ電極、ダイオードのカソード電極である。裏面電極１８は、例えば、Ａｌ、Ｔｉ、Ｎｉ、Ａｕ、Ｃｕなどを含む積層膜である。裏面電極１８の厚さは、例えば０．１μｍ〜１０μｍである。
図２は、実施の形態１に係る半導体装置１００の平面図である。なお、図１は、図２に示されるＡ−Ｂ直線で半導体装置１００を切断することで得られる。半導体装置１００は平面視で四角形である。絶縁膜１４は、チップの外縁を形成する。めっき電極１６は絶縁膜１４の開口部を埋める。めっき電極１６は平面視で四角形である。凸部１７は、めっき電極１６の外周部に設けられる。凸部１７は、めっき電極１６の四辺に沿って延びる。
凸部１７は、チップの外周部で第１方向に延びる第１部分１７ａと、チップの外周部で第２方向に延びる第２部分１７ｂとを有する。第１方向は、半導体基板１０の上面と平行方向である。第１方向は、図２におけるＸ方向である。第２方向は、半導体基板１０の上面と平行かつ第１方向と交差する方向である。第２方向は、図２におけるＹ方向である。
図３は、実施の形態１に係る半導体装置１００にはんだ２０が設けられた状態を示す断面図である。はんだ２０はめっき電極１６の上に設けられる。はんだ２０は、凸部１７を含めて、めっき電極１６を覆う。はんだ２０は、めっき電極１６全体を覆っても良い。また、はんだ２０は絶縁膜１４よりも内側に設けられ、絶縁膜１４上には形成されない。はんだ２０の端部とめっき電極１６の端部は揃う。
本実施の形態では、外部電極と半導体装置１００の電極とを、はんだ２０によって直接接合する。これにより、電気抵抗を下げつつ大電流の通電が可能になる。
次に、本実施の形態の効果を説明する。一般に、下部電極の上にめっき電極が設けられた構造において、下部電極に溝部が形成される場合がある。このとき、下部電極がない箇所、または薄い箇所が形成されることとなる。このような構造において、めっき技術によってめっき電極を形成すると、溝部においてめっき処理液が半導体基板へ到達するおそれがある。これにより、半導体基板がダメージを受け、半導体装置の信頼性を損ねる可能性がある。これに対し、本実施の形態の下部電極１２には溝部がないため、めっき処理による半導体基板１０へのダメージを抑制する効果がある。
また、めっき電極１６に凸部１７を設けることで、めっき電極１６の垂直方向における機械的強度を向上できる。特に、凸部１７を第１方向および第２方向に延ばすことで、凸部１７が梁として機能する。このため、めっき電極１６の剛性を高めることができる。これによって、めっき電極１６を薄くしても、垂直方向の応力に対してめっき電極１６の強度を確保できる。また、凸部１７によって、半導体装置１００の機械的強度が向上することで、半導体装置１００の信頼性を向上できる。
図４は実施の形態１の第１の変形例に係る半導体装置２００の断面図である。下部電極１２およびめっき電極１６は、複数の部分に分割されていても良い。図４において、下部電極１２およびめっき電極１６は、それぞれ絶縁膜１４で分割されている。
図５は、実施の形態１の第２の変形例に係る半導体装置３００の平面図である。半導体装置３００では凸部１７の形状が半導体装置１００と異なる。半導体装置３００において、凸部１７の第１部分１７ａと第２部分１７ｂとは離れている。この場合にも半導体装置１００と同様の効果を得ることができる。
図６は、実施の形態１の第３の変形例に係る半導体装置４００の平面図である。半導体装置１００では、凸部１７は絶縁膜１４に沿ってめっき電極１６の外周部に設けられた。凸部１７の配置はこれに限らない。図６に示されるように、凸部１７は十字型であっても良い。半導体装置４００において、第１部分１７ａと第２部分１７ｂは、チップの中央部で交差する。
半導体装置４００では、チップの中央部を補強できる。なお、半導体装置１００、３００のように、めっき電極１６の端部に近い箇所に凸部１７が配置される方が、垂直方向の応力に対するめっき電極１６の機械的強度は高い傾向にある。
このように、凸部１７は、少なくとも第１方向に延びる第１部分１７ａと、第１方向と交差する第２方向に延びる第２部分１７ｂとを有すれば良い。また、第１方向と第２方向は、チップの辺に対して傾いていても良い。例えば、第１部分１７ａと第２部分１７ｂはチップの対角線に沿って延びても良い。
また、チップ、絶縁膜１４およびめっき電極１６の形状は、図２に示されるものに限らず、例えば正方形、長方形、多角形等でも良い。
また、機械的強度の向上のため、凸部１７の高さＴ２は規定値よりも大きいことが好ましい。凸部１７の高さＴ２は、例えば１μｍ以上であることが好ましい。
また、本実施の形態では、突起部１３の凹凸を利用してめっき電極１６に凸部１７を形成した。これに限らず、めっき電極１６に凸部１７が形成できれば、突起部１３は設けなくても良い。この場合も本実施の形態と同様の効果を得ることができる。この場合、半導体基板１０の上面に、平坦な下部電極１２を形成する。次に、下部電極１２の上面に、めっき電極１６となる平坦な金属膜をめっき等により設ける。この後、追加の加工工程により、凸部１７を形成しても良い。
また、本実施の形態では、めっき電極１６は外部電極とはんだ２０によって直接接合される金属膜であるものとした。これに限らず、めっき電極１６をワイヤー接合またはＡｇ接合用の電極として用いても良い。この場合も本実施の形態と同様の効果を得ることができる。
本実施の形態の別の変形例として、半導体基板１０はワイドバンドギャップ半導体によって形成されても良い。ワイドバンドギャップ半導体は、例えば炭化珪素、窒化ガリウム系材料またはダイヤモンドである。半導体基板１０は珪素から形成されても良い。
これらの変形は、以下の実施の形態に係る半導体装置について適宜応用することができる。なお、以下の実施の形態に係る半導体装置については実施の形態１との共通点が多いので、実施の形態１との相違点を中心に説明する。
実施の形態２．
図７は、実施の形態２に係る半導体装置５００の断面図である。本実施の形態では、突起部５１３は、下部電極１２とは異なる材料から形成される。突起部５１３により形成される段差によって、めっき電極１６に凸部１７が形成される。突起部５１３は絶縁膜でも非絶縁膜であっても良い。絶縁膜は、例えば酸化膜、シリコン窒化膜、ポリイミドである。非絶縁膜は、例えばＴｉＮｉ、Ｃｕである。このような場合も、実施の形態１と同じ効果が得られる。
また、突起部５１３の幅Ｗ１は、めっき電極１６の厚さＴ３と突起部５１３の厚さＴ５との差分の２倍以下である。一般に、めっきは特定の材料上に成長する。めっきであるめっき電極１６は、下部電極１２の上に成長する。また、下部電極１２と異なる材料から形成される突起部５１３上では、めっきは成長しない。
ここで、めっきは一般に等方的に成長する。このため、下部電極１２と突起部５１３との境界から一定範囲だけ、突起部５１３の表面上にもめっきを形成できる。具体的には、下部電極１２と突起部５１３との境界からめっき電極１６の厚さＴ３だけ、突起部５１３の表面上にもめっきを形成できる。
従って、突起部５１３の幅Ｗ１を、めっき電極１６の厚さＴ３と突起部５１３の厚さＴ５との差分の２倍以下とすれば、突起部５１３の上面の全体にめっきを形成できる。従って、突起部５１３が下部電極１２と異なる材料から形成される場合にも、めっき電極１６で突起部５１３を覆うことができる。
実施の形態３．
図８は、実施の形態３に係る半導体装置６００の断面図である。突起部６１３は、第１突起部６１３ａと第２突起部６１３ｂとを有する。第１突起部６１３ａは、下部電極１２の一部であり、下部電極１２と同じ材料から形成される。第２突起部６１３ｂは、第１突起部６１３ａの上に設けられ、下部電極１２とは異なる材料から形成される。
次に、突起部６１３の製造方法を説明する。まず、半導体基板１０の上面に下部電極１２となる金属膜を形成する。次に、金属膜の上面に第２突起部６１３ｂとなるマスク層を形成する。次に、マスク層をパターン化して第２突起部６１３ｂを形成する。次に、第２突起部６１３ｂに沿って金属膜をエッチングし、下部電極１２および第１突起部６１３ａを形成する。
一般に凸部１７が高い程、めっき電極１６の垂直方向の機械的強度を向上できる。本実施の形態では、第１突起部６１３ａを形成するためのマスクを残したまま、めっき電極１６を形成する。第１突起部６１３ａと第２突起部６１３ｂを組み合わせることで、突起部６１３が高く形成できる。これにより、凸部１７を高く形成できる。従って、実施の形態１の効果を得ながら、垂直方向の応力に対するめっき電極１６の機械的強度を向上できる。
また、第１突起部６１３ａを形成するためのマスクを第２突起部６１３ｂとして有効に利用できる。なお、実施の形態１では、下部電極１２となる金属膜をエッチングした後、第２突起部６１３ｂを除去することで、突起部１３を形成しても良い。
また、実施の形態２と同様に、第２突起部６１３ｂの幅Ｗ１は、めっき電極１６の厚さＴ３と第２突起部６１３ｂの高さＴ５との差分の２倍以下であっても良い。これにより、第２突起部６１３ｂが下部電極１２と異なる材料から形成される場合にも、めっき電極１６で第２突起部６１３ｂを覆うことができる。
また、各実施の形態で説明した技術的特徴は適宜に組み合わせて用いても良い。
１０ 半導体基板、１２ 下部電極、１３ 突起部、１４ 絶縁膜、１６ めっき電極、１７ 凸部、１７ａ 第１部分、１７ｂ 第２部分、１８ 裏面電極、１００、２００、３００、４００、５００、６００ 半導体装置、５１３ 突起部、６１３ 突起部、６１３ａ 第１突起部、６１３ｂ 第２突起部

Claims (17)

  1. 半導体基板と、
    前記半導体基板の上に設けられた下部電極と、
    前記半導体基板の上に設けられ、前記下部電極を囲む絶縁膜と、
    前記下部電極の上に設けられ、上面に凸部を有するめっき電極と、
    を備え、
    前記凸部は、前記半導体基板の上面と平行な第１方向に延びる第１部分と、前記半導体基板の前記上面と平行であり前記第１方向と交差する第２方向に延びる第２部分と、を有し、
    前記めっき電極は前記絶縁膜よりも薄いことを特徴とする半導体装置。
  2. 前記凸部は、前記絶縁膜に沿って前記めっき電極の外周部に設けられることを特徴とする請求項１に記載の半導体装置。
  3. 半導体基板と、
    前記半導体基板の上に設けられた下部電極と、
    前記半導体基板の上に設けられ、前記下部電極を囲み、チップの外縁を形成する絶縁膜と、
    前記下部電極の上に設けられ、上面に凸部を有するめっき電極と、
    を備え、
    前記凸部は、前記チップの外周部で前記半導体基板の上面と平行な第１方向に延びる第１部分と、前記チップの外周部で前記半導体基板の前記上面と平行であり前記第１方向と交差する第２方向に延びる第２部分と、を有することを特徴とする半導体装置。
  4. 半導体基板と、
    前記半導体基板の上に設けられた下部電極と、
    前記半導体基板の上に設けられ、前記下部電極を囲む絶縁膜と、
    前記下部電極の上に設けられ、上面に十字型の凸部を有するめっき電極と、
    を備えることを特徴とする半導体装置。
  5. 前記めっき電極は前記絶縁膜よりも薄いことを特徴とする請求項３または４に記載の半導体装置。
  6. 前記めっき電極は平面視で四角形であり、
    前記凸部は、前記めっき電極の四辺に沿って延びることを特徴とする請求項１から３の何れか１項に記載の半導体装置。
  7. 前記凸部は十字型であることを特徴とする請求項１に記載の半導体装置。
  8. 前記絶縁膜は、前記下部電極の上に設けられた部分を有し、
    前記めっき電極は、前記絶縁膜の前記下部電極の上に設けられた部分よりも薄いことを特徴とする請求項１から７の何れか１項に記載の半導体装置。
  9. 前記めっき電極は、全体が前記絶縁膜よりも内側に設けられることを特徴とする請求項１から８の何れか１項に記載の半導体装置。
  10. 前記下部電極の上面には、平面視で前記凸部と重なる位置に突起部が設けられることを特徴とする請求項１から９の何れか１項に記載の半導体装置。
  11. 前記突起部は、前記下部電極の一部であることを特徴とする請求項１０に記載の半導体装置。
  12. 前記突起部は、前記下部電極とは異なる材料から形成されることを特徴とする請求項１０に記載の半導体装置。
  13. 前記突起部の幅は、前記めっき電極の厚さと前記突起部の高さとの差分の２倍以下であることを特徴とする請求項１２に記載の半導体装置。
  14. 前記突起部は、前記下部電極の一部である第１突起部と、前記第１突起部の上に設けられ、前記下部電極とは異なる材料から形成された第２突起部と、を有することを特徴とする請求項１０に記載の半導体装置。
  15. 前記第２突起部の幅は、前記めっき電極の厚さと前記第２突起部の高さとの差分の２倍以下であることを特徴とする請求項１４に記載の半導体装置。
  16. 前記半導体基板はワイドバンドギャップ半導体によって形成されていることを特徴とする請求項１から１５の何れか１項に記載の半導体装置。
  17. 前記ワイドバンドギャップ半導体は、炭化珪素、窒化ガリウム系材料またはダイヤモンドであることを特徴とする請求項１６に記載の半導体装置。
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