JP2015050347A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP2015050347A JP2015050347A JP2013181409A JP2013181409A JP2015050347A JP 2015050347 A JP2015050347 A JP 2015050347A JP 2013181409 A JP2013181409 A JP 2013181409A JP 2013181409 A JP2013181409 A JP 2013181409A JP 2015050347 A JP2015050347 A JP 2015050347A
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Abstract
Description
次に、半導体装置10の製造方法について、図11から図15を参照して説明する。半導体装置10の製造方法では、半導体基板準備工程、電極形成工程、投入工程、炉内昇温工程、降温工程、上部リードフレーム接合工程、樹脂層形成工程を実施することによって、半導体装置10を製造する。
まず、図11に示すように、半導体基板12を準備する。半導体基板12には半導体素子構造が形成されている。半導体素子構造の形成方法は従来公知の方法であるため説明を省略する。次に、スパッタ法などで半導体基板12の裏面12aに裏面電極14を形成し、表面12bに表面電極16を形成する。続いて、表面電極16の外周部をエッチングし、半導体基板12の表面12b及び表面電極16の表面に公知の方法によって絶縁層22を形成する。次いで、絶縁層22を、外周部を残してエッチングし、表面電極16を露出させ、その表面にマスクスパッタ法を用いて表面電極18を形成する。表面電極16と表面電極18により金属電極20が形成される。これにより、半導体チップ24が形成される。裏面電極14の厚みt1は金属電極20の厚みt2よりも大きくされている。より詳細には、半導体チップ24をはんだ26の溶融温度まで昇温したときに裏面電極14が熱膨張して半導体基板裏面12aに作用する引張力が、金属電極20が熱膨張して半導体基板表面12bに作用する引張力よりも大きくなるようにt1とt2の値を設定している。なお、t1のt2に対する比率は、各電極14,20を構成する材料の種類や厚みを考慮して決定される。なお、半導体装置10の製造方法では、表面電極18をマスクスパッタ法により形成したが、これに限られず、例えば無電解めっき法を用いて表面電極を形成してもよい。
次に、図12に示すように、リードフレーム30の表面30aにはんだ箔(以下、はんだ26と称する)を置き、その表面に半導体チップ24の裏面電極14が接するように半導体チップ24を配置する。即ち、裏面電極14は、はんだ26を介してリードフレーム30の表面30aに対向している。半導体チップ24を配置したリードフレーム30をリフロー炉に投入する。なお、この時点ではリフロー炉内は常温となっている。
続いて、半導体チップ24を配置したリードフレーム30が投入されたリフロー炉を、はんだ26の溶融温度まで徐々に昇温する。リフロー炉を昇温していくと、半導体基板12と裏面電極14と金属電極20はそれぞれ熱膨張し、これらの線膨張係数の差によって、半導体基板12の裏面12aと表面12bに引張力が作用する。裏面電極14の厚みt1と金属電極20の厚みt2は、はんだ溶融温度において半導体基板裏面12aに作用する引張力の方が、半導体基板表面12bに作用する引張力よりも大きくなるように設定されている。このため、図13に示すように、リフロー炉を昇温していくと、半導体チップ24がリードフレーム30に対して凸となるように反っていき、半導体チップ24は凸状の部分ではんだ26と接触する。炉内がはんだ26の溶融温度まで昇温すると、図14に示すように、はんだ26は溶融を開始し、半導体チップ24との接触部分から濡れ広がる。
次いで、リフロー炉を常温まで徐々に降温する。リフロー炉を降温していくと、図15に示すように、半導体チップ24は常温時の形状に戻っていくとともに、はんだ26が固化していく。これにより、半導体チップ24の裏面電極14にリードフレーム30の表面30aがはんだ接合される。
次に、金属電極20にリードフレーム32(即ち、上部リードフレーム)をはんだ接合する。方法は裏面電極14にリードフレーム30をはんだ接合する方法と同様であるため、説明は省略する。
次に、熱硬化性樹脂を射出成形して、半導体チップ24を樹脂で封止する。射出成形の方法は従来公知であるため、説明は省略する。熱硬化性樹脂には、例えばエポキシ樹脂が用いられるが、これに限定されない。射出成形により形成された樹脂層は、半導体チップ24の露出面全体、及びリードフレーム30,32の一部を覆うように形成される。その後、リードフレーム30,32が半導体チップ24に接している面とは反対側の面に形成されている樹脂層が、CMP法などを用いて除去される。なお、研磨方法はCMP法に限られない。
12:半導体基板
14:裏面電極
16:表面電極
18:めっき層
20:金属電極
22:絶縁層
24:半導体チップ
26、28:はんだ
30、32:リードフレーム
Claims (8)
- 半導体チップと、被接合部材と、を備えており、
半導体チップは、半導体基板と、第1電極と、第2電極と、を有しており、
第1電極は半導体基板の一方の面に配置され、第2電極は半導体基板の他方の面に配置されており、
第1電極及び第2電極は、半導体基板よりも大きな線膨張係数を有しており、
第1電極は、接合材を介して被接合部材に接合されており、
接合材の溶融温度において、第1電極の熱膨張により第1電極から半導体基板の一方の面に作用する面内方向の引張力は、前記溶融温度において、第2電極の熱膨張により第2電極から半導体基板の他方の面に作用する面内方向の引張力以上であることを特徴とする、半導体装置。 - 半導体チップの積層方向における第1電極の厚みが、第2電極の厚み以上であることを特徴とする、請求項1に記載の半導体装置。
- 第1電極の線膨張係数は、第2電極の線膨張係数以上であることを特徴とする、請求項1または2に記載の半導体装置。
- 第1電極の面内方向における表面積が、第2電極の面内方向における表面積以上であることを特徴とする、請求項1〜3のいずれか一項に記載の半導体装置。
- 第1電極と第2電極の少なくとも一方は、単層又は複数の層により構成されていることを特徴とする、請求項1〜4のいずれか一項に記載の半導体装置。
- 第2電極は、第1層と、第2層と、を有しており、
第1層は、半導体基板の他方の面に分離して配置された複数の部分を有しており、
隣接する前記部分の間には絶縁層が配置されており、
第2層は、第1層の各部分及び絶縁層の露出面の少なくとも一部を覆うとともに、第1層の各部分及び絶縁層に跨って配置されており、
第2層の線膨張係数は、第1層の線膨張係数及び絶縁層の線膨張係数以下であることを特徴とする、請求項1〜5のいずれか一項に記載の半導体装置。 - 請求項1に記載の半導体装置を製造する方法であって、
半導体素子構造が形成された半導体基板を準備する半導体基板準備工程と、
半導体基板の一方の面に第1電極を形成し、他方の面に第2電極を形成して半導体チップとする電極形成工程と、
半導体チップの第1電極が接合材を介して被接合部材の一方の面に対向する状態で半導体チップが配置された被接合部材を炉に投入する投入工程と、
炉内を少なくとも接合材の溶融温度まで昇温して、接合材を溶融する炉内昇温工程と、
半導体チップが配置された被接合部材を降温して接合材が固化することで、半導体チップの第1電極を被接合部材の一方の面に接合する降温工程と、を備えており、
炉内昇温工程では、接合材の溶融温度において、第1電極の熱膨張により第1電極から半導体基板の一方の面に作用する引張力が、第2電極の熱膨張により第2電極から半導体基板の他方の面に作用する引張力以上であることを特徴とする、半導体装置の製造方法。 - 電極形成工程では、半導体基板の他方の面に、第2電極として第1層と第2層が形成されるとともに、絶縁層が形成され、
第1層は、半導体基板の他方の面に分離して形成された複数の部分を有しており、
絶縁層は、隣接する部分の間に形成され、
第2層は、第1層及び絶縁層を構成する材料の線膨張係数以下の材料により構成されており、第1層及び絶縁層の露出面の少なくとも一部を覆うように、マスクスパッタ法を用いて形成されることを特徴とする、請求項7に記載の半導体装置の製造方法。
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