JP2019102519A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2019102519A JP2019102519A JP2017228992A JP2017228992A JP2019102519A JP 2019102519 A JP2019102519 A JP 2019102519A JP 2017228992 A JP2017228992 A JP 2017228992A JP 2017228992 A JP2017228992 A JP 2017228992A JP 2019102519 A JP2019102519 A JP 2019102519A
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- insulating substrate
- conductor layer
- external connection
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- inner conductor
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Abstract
Description
12:半導体素子
14:封止体
20:上側絶縁基板
22:上側絶縁基板20の絶縁層
24:上側絶縁基板20の内側導体層
26:上側絶縁基板20の外側導体層
30:下側絶縁基板
32:下側絶縁基板30の絶縁層
34:下側絶縁基板30の内側導体層
36:下側絶縁基板30の外側導体層
40:外部接続端子(第1主端子)
42:外部接続端子40(第1主端子)の薄肉区間
44:外部接続端子40(第1主端子)の厚肉区間
50:外部接続端子(第2主端子)
52:外部接続端子50(第2主端子)の薄肉区間
54:外部接続端子50(第2主端子)の厚肉区間
60:外部接続端子(信号端子)
62:外部接続端子60(信号端子)の薄肉区間
64:外部接続端子60(信号端子)の厚肉区間
Ha:下側絶縁基板30に平行な平面
Hb:上側絶縁基板20に平行な平面
Va:下側絶縁基板30に垂直な方向
Vb:上側絶縁基板20に垂直な方向
Claims (12)
- 半導体素子と、
前記半導体素子が配置された絶縁基板と、
前記絶縁基板を介して前記半導体素子へ電気的に接続された外部接続端子と、
を備え、
前記絶縁基板は、絶縁層と、前記絶縁層の一方側に位置するととともに前記半導体素子へ電気的に接続された内側導体層と、前記絶縁層の他方側に位置する外側導体層とを有し、
前記外部接続端子は、その長手方向に沿って、薄肉区間と、前記薄肉区間よりも厚みの大きい厚肉区間とを有し、前記薄肉区間において前記絶縁基板の前記内側導体層に接合されている、
半導体装置。 - 前記外部接続端子の前記厚肉区間の少なくとも一部と、前記絶縁基板の前記内側導体層の少なくとも一部とは、前記絶縁基板と平行な同一の平面内に位置する、請求項1に記載の半導体装置。
- 前記外部接続端子の前記厚肉区間の一部と、前記絶縁基板の前記絶縁層の少なくとも一部とは、前記絶縁基板と平行な同一の平面内に位置する、請求項2に記載の半導体装置。
- 前記薄肉区間の厚みは、前記絶縁基板の前記内側導体層の厚みよりも小さい、請求項1から3のいずれか一項に記載の半導体装置。
- 前記半導体素子を封止する封止体をさらに備え、
前記外部接続端子の前記薄肉区間は、前記封止体の内部に位置しており、前記外部接続端子の前記厚肉区間は、前記薄肉区間から前記封止体の外部へと延びている、請求項1から4のいずれか一項に記載の半導体装置。 - 前記絶縁基板の前記外側導体層は、前記封止体の表面に露出している、請求項5に記載の半導体装置。
- 前記半導体素子を挟んで前記絶縁基板と対向する第2絶縁基板をさらに備え、
前記第2絶縁基板は、第2絶縁層と、前記第2絶縁層の一方側に位置するととともに前記半導体素子へ電気的に接続された第2内側導体層と、前記第2絶縁層の他方側に位置する第2外側導体層とを有し、
前記第2絶縁基板の前記第2外側導体層は、前記封止体の表面に露出している、請求項6に記載の半導体装置。 - 前記第2絶縁基板を介して前記半導体素子へ電気的に接続された第2外部接続端子をさらに備え、
前記第2外部接続端子は、その長手方向において、薄肉区間と、前記薄肉区間よりも厚みの大きい厚肉区間とを有し、前記薄肉区間において前記第2絶縁基板の前記第2内側導体層に接合されている、
請求項7に記載の半導体装置。 - 前記第2外部接続端子の前記厚肉区間の少なくとも一部と、前記第2絶縁基板の前記第2内側導体層の少なくとも一部とは、前記第2絶縁基板と平行な同一の平面内に位置する、請求項8に記載の半導体装置。
- 前記第2外部接続端子の前記厚肉区間の一部と、前記第2絶縁基板の前記第2絶縁層の少なくとも一部とは、前記第2絶縁基板と平行な同一の平面内に位置する、請求項9に記載の半導体装置。
- 前記薄肉区間における厚みは、前記第2絶縁基板の前記第2内側導体層の厚みよりも小さい、請求項8から10のいずれか一項に記載の半導体装置。
- 前記第2外部接続端子の前記薄肉区間は、前記封止体の内部に位置しており、前記第2外部接続端子の前記厚肉区間は、前記薄肉区間から前記封止体の外部へと延びている、請求項8から11のいずれか一項に記載の半導体装置。
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US16/201,307 US10566295B2 (en) | 2017-11-29 | 2018-11-27 | Semiconductor device |
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JP2007335632A (ja) * | 2006-06-15 | 2007-12-27 | Toyota Industries Corp | 半導体装置 |
WO2009125779A1 (ja) * | 2008-04-09 | 2009-10-15 | 富士電機デバイステクノロジー株式会社 | 半導体装置及び半導体装置の製造方法 |
WO2013005474A1 (ja) * | 2011-07-04 | 2013-01-10 | 本田技研工業株式会社 | 半導体装置 |
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