JP2017520912A - メモリセルおよびソース線を酸化させずにマスキング層のドライエッチングを行う方法 - Google Patents
メモリセルおよびソース線を酸化させずにマスキング層のドライエッチングを行う方法 Download PDFInfo
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- JP2017520912A JP2017520912A JP2016567870A JP2016567870A JP2017520912A JP 2017520912 A JP2017520912 A JP 2017520912A JP 2016567870 A JP2016567870 A JP 2016567870A JP 2016567870 A JP2016567870 A JP 2016567870A JP 2017520912 A JP2017520912 A JP 2017520912A
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- 238000000034 method Methods 0.000 title claims abstract description 66
- 230000000873 masking effect Effects 0.000 title claims abstract description 21
- 230000001590 oxidative effect Effects 0.000 title description 5
- 238000001312 dry etching Methods 0.000 title 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 33
- 239000010949 copper Substances 0.000 claims abstract description 33
- 229910052802 copper Inorganic materials 0.000 claims abstract description 32
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims abstract description 24
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 24
- 239000011737 fluorine Substances 0.000 claims abstract description 24
- 239000002184 metal Substances 0.000 claims abstract description 21
- 229910052751 metal Inorganic materials 0.000 claims abstract description 21
- 230000001681 protective effect Effects 0.000 claims abstract description 19
- 238000002161 passivation Methods 0.000 claims abstract description 10
- 230000003647 oxidation Effects 0.000 claims abstract description 9
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 9
- 230000008569 process Effects 0.000 claims description 38
- 150000001875 compounds Chemical class 0.000 claims description 17
- 230000004888 barrier function Effects 0.000 claims description 16
- 238000005553 drilling Methods 0.000 claims description 14
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 12
- 229910052799 carbon Inorganic materials 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 11
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- 238000011065 in-situ storage Methods 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 230000003993 interaction Effects 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims 1
- 238000009412 basement excavation Methods 0.000 description 24
- 239000000463 material Substances 0.000 description 7
- 229910021594 Copper(II) fluoride Inorganic materials 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- GWFAVIIMQDUCRA-UHFFFAOYSA-L copper(ii) fluoride Chemical compound [F-].[F-].[Cu+2] GWFAVIIMQDUCRA-UHFFFAOYSA-L 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- -1 copper fluoride compound Chemical group 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Patterning of the switching material
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
- C23C8/04—Treatment of selected surface areas, e.g. using masks
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
- C23C8/06—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases
- C23C8/08—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases only one element being applied
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
- H01L21/02074—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a planarization of conductive layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
- H01L21/31122—Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
- H10N70/245—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/823—Device geometry adapted for essentially horizontal current flow, e.g. bridge type devices
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
Abstract
Description
本出願は、2014年5月21日に出願されたアメリカ合衆国優先権出願US14/283893の利益を主張し、その全ての内容を参照によって援用する。
Claims (20)
- マスキング層を掘削する前に、セル構造およびソース線にパッシベーション工程を行い、前記セル構造および前記ソース線の酸化を防ぐ
メモリセルの製造方法。 - 前記パッシベーション工程は、
前記セル構造および前記ソース線の金属層をパッシベートする化合物を用いて、前記セル構造上および前記ソース線上に保護膜を形成し、
前記マスキング層を掘削することを含み、
前記保護膜は、前記化合物と前記金属層との反応から形成される
請求項1に記載の方法。 - 前記化合物はフッ素系(fluorine-based)化合物である
請求項2に記載の方法。 - 前記金属層は銅(copper)である
請求項3に記載の方法。 - 前記フッ素系化合物は、CF4,SF6,NF3,CHF3およびCH2F2のうちのいずれか1つである
請求項4に記載の方法。 - 前記マスキング層は、カーボン層(carbon layer)またはUL(under layer)のうちの1つである
請求項1に記載の方法。 - 更に、
HARC(high aspect ratio contact etching)エッチングでの前記パッシベーション工程として、前記マスキング層、酸化/窒化層およびバリア誘電層をエッチングし、前記金属層を露出させ、
前記マスキング層を掘削することを含み、
前記エッチングは、前記化合物と前記金属層との反応から保護膜を形成することにより、前記金属層をパッシベートする化合物を用いて行われる
請求項1に記載の方法。 - 前記化合物はフッ素系(fluorine-based)化合物である
請求項7に記載の方法。 - 前記金属層は銅(copper)である
請求項8に記載の方法。 - 前記フッ素系化合物は、CF4,SF6,NF3,CHF3およびCH2F2のうちのいずれか1つである
請求項9に記載の方法。 - マスキング層の存在下で、複数の層を同時にエッチングすることにより、コンタクトCD(critical dimension)の変動が抑えられる
請求項7に記載の方法。
- 前記酸化膜はBLOK(Barrier Low-k)膜であり、前記マスキング層はカーボン膜(carbon film)またはULのうちの1つである
請求項7に記載の方法。 - 前記マスキング層は、酸素系プラズマを用いて掘削される
請求項12に記載の方法。 - 前記BLOK膜は、前記金属層上に置かれた膜であり、前記金属層より薄い
請求項13に記載の方法。 - 更に、前記セル構造から前記保護膜を除去し、前記化合物の後の工程での相互作用を防止することを含む
請求項2に記載の方法。 - 前記セル構造からの前記保護膜の除去は、スパッタ除去よってなされる
請求項15に記載の方法。 - 前記スパッタ除去は、インサイチュ(in-situ)でのH2またはH2−Arプラズマを用いてなされる
請求項16に記載の方法。 - 更に、前記セル構造から前記保護膜を除去し、前記化合物の後の工程での相互作用を防止することを含む
請求項7に記載の方法。 - 前記セル構造からの前記保護膜の除去は、スパッタ除去よってなされる
請求項18に記載の方法。 - 前記スパッタ除去は、インサイチュ(in-situ)でのH2またはH2−Arプラズマを用いてなされる
請求項19に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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US14/283,893 | 2014-05-21 | ||
US14/283,893 US20150340611A1 (en) | 2014-05-21 | 2014-05-21 | Method for a dry exhumation without oxidation of a cell and source line |
PCT/JP2015/002282 WO2015177972A1 (en) | 2014-05-21 | 2015-04-28 | Method for dry etching of masking layers without oxidation of a memory cell and source line |
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JP2017520912A true JP2017520912A (ja) | 2017-07-27 |
JP6679501B2 JP6679501B2 (ja) | 2020-04-15 |
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JP2016567870A Expired - Fee Related JP6679501B2 (ja) | 2014-05-21 | 2015-04-28 | メモリセルおよびソース線を酸化させずにマスキング層のドライエッチングを行う方法 |
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US (1) | US20150340611A1 (ja) |
JP (1) | JP6679501B2 (ja) |
KR (1) | KR20170012220A (ja) |
CN (1) | CN106463345B (ja) |
TW (1) | TWI705492B (ja) |
WO (1) | WO2015177972A1 (ja) |
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KR20210098825A (ko) * | 2020-01-31 | 2021-08-11 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | 낮은 접촉 저항을 가지는 상부 전극 비아 |
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CN108550626A (zh) * | 2018-04-18 | 2018-09-18 | 深圳市华星光电技术有限公司 | 薄膜晶体管器件的制作方法和薄膜晶体管器件 |
US10886467B2 (en) | 2019-05-02 | 2021-01-05 | International Business Machines Corporation | CBRAM by subtractive etching of metals |
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Cited By (3)
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KR20210098825A (ko) * | 2020-01-31 | 2021-08-11 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | 낮은 접촉 저항을 가지는 상부 전극 비아 |
TWI770662B (zh) * | 2020-01-31 | 2022-07-11 | 台灣積體電路製造股份有限公司 | 積體晶片、記憶體元件及其形成方法 |
KR102436169B1 (ko) * | 2020-01-31 | 2022-08-24 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | 낮은 접촉 저항을 가지는 상부 전극 비아 |
Also Published As
Publication number | Publication date |
---|---|
CN106463345A (zh) | 2017-02-22 |
WO2015177972A1 (en) | 2015-11-26 |
US20150340611A1 (en) | 2015-11-26 |
JP6679501B2 (ja) | 2020-04-15 |
CN106463345B (zh) | 2020-01-14 |
KR20170012220A (ko) | 2017-02-02 |
TWI705492B (zh) | 2020-09-21 |
TW201546894A (zh) | 2015-12-16 |
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