TWI705492B - 用於不須氧化一單元及源極線之乾剝蝕之方法 - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 61
- 230000003647 oxidation Effects 0.000 title abstract description 12
- 238000007254 oxidation reaction Methods 0.000 title abstract description 12
- 238000002161 passivation Methods 0.000 claims abstract description 15
- 238000002679 ablation Methods 0.000 claims description 37
- 230000008569 process Effects 0.000 claims description 35
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 33
- 239000010949 copper Substances 0.000 claims description 33
- 229910052802 copper Inorganic materials 0.000 claims description 32
- 230000004888 barrier function Effects 0.000 claims description 27
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims description 22
- 229910052731 fluorine Inorganic materials 0.000 claims description 22
- 239000011737 fluorine Substances 0.000 claims description 22
- 239000002184 metal Substances 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 20
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- 150000001875 compounds Chemical class 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 13
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 12
- 229910052799 carbon Inorganic materials 0.000 claims description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 8
- 229910052760 oxygen Inorganic materials 0.000 claims description 8
- 238000004140 cleaning Methods 0.000 claims description 6
- 150000004767 nitrides Chemical class 0.000 claims description 6
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- 239000000463 material Substances 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- 239000000758 substrate Substances 0.000 description 5
- 229910021594 Copper(II) fluoride Inorganic materials 0.000 description 3
- GWFAVIIMQDUCRA-UHFFFAOYSA-L copper(ii) fluoride Chemical compound [F-].[F-].[Cu+2] GWFAVIIMQDUCRA-UHFFFAOYSA-L 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
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- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 1
- 239000005751 Copper oxide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000006117 anti-reflective coating Substances 0.000 description 1
- CFQGDIWRTHFZMQ-UHFFFAOYSA-N argon helium Chemical compound [He].[Ar] CFQGDIWRTHFZMQ-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910000431 copper oxide Inorganic materials 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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Abstract
本發明之各種實施例係針對一種製造一記憶體單元之方法，其包括：在剝蝕一遮罩層之前對一單元結構及單元源極線執行一鈍化步驟以防止氧化該單元結構及該等源極線。
Description
本申請案主張2014年5月21申請之美國優先專利申請案US14/283893之權利，各申請案之全部內容以引用的方式併入本文中。
本發明之某些實施例係關於一種用於不須氧化單元及源極線之一乾剝蝕之方法。
隨著替代記憶體技術發展，吾人正積極尋求多金屬膜。使用消減程序流程及鑲嵌程序流程兩者來發展含銅CBRAM(導電橋式隨機存取記憶體)單元。CBRAM鑲嵌流程利用碳之圖案化、CBRAM單元及銅源極線之沈積，接著進行一化學機械平坦化(CMP)程序及碳剝蝕。在習知碳剝蝕程序期間，使單元及源極線中之銅表面暴露於氧電漿，且因此使銅表面嚴重氧化以損壞銅線之結構。在一些例項中，藉由使用一覆蓋材料或替代金屬源極線而防止氧化。然而，此增大源極線之電阻率且需要一更複雜更昂貴之結構及程序整合方案。類似地，位於銅膜上之高縱橫比接觸件在一遮罩剝離之後需要一毯覆式低k障壁(BLOK)介電質穿孔以在一習知O2剝離期間保護銅免受氧化。此BLOK穿孔顯著增大頂部臨界尺寸(CD)，且若接觸件CD非常小，則此BLOK穿孔係阻止縮放之一關鍵。
因此，此項技術中需要根據本發明之例示性實施例之用於在不須氧化銅源極線或銅單元之情況下且在不會增大源極線之電阻率之情況下執行一乾剝蝕之一方法。
本發明提供一種用於實質上不須氧化銅之一乾剝蝕之方法，如圖式之至少一者中所展示及/或如結合圖式之至少一者所描述，如申請專利範圍中所更完整闡述。
可自檢視本發明之以下詳細描述及附圖瞭解本發明之此等及其他特徵及優點，在附圖中，相同元件符號係指所有圖式中之相同部件。
100:裝置
102:光阻層
104:遮罩層
105:開口
106:介電層
108:基板
110:金屬接觸件
200:溝渠
300:單元
301:障壁襯層/障壁層
302:障壁金屬層
310:源極線
400:保護膜
700:裝置
702:銅膜
704:障壁介電膜
706:介電層
708:遮罩層
710:遮罩層
712:圖案化光阻層
800:通孔
900:保護膜
圖1繪示根據本發明之例示性實施例之剝蝕程序中之一第一步驟。
圖2繪示根據本發明之例示性實施例之剝蝕程序中之一第二步驟。
圖3繪示根據本發明之例示性實施例之剝蝕程序中之一第三步驟。
圖4繪示根據本發明之例示性實施例之剝蝕程序中之一第四步驟。
圖5繪示根據本發明之例示性實施例之剝蝕程序中之一第五步驟。
圖6繪示根據本發明之例示性實施例之剝蝕程序中之一第六步驟。
圖7繪示根據本發明之例示性實施例之剝蝕程序中之一第一步驟。
圖8繪示根據本發明之例示性實施例之剝蝕程序中之一第二步
驟。
圖9繪示根據本發明之例示性實施例之剝蝕程序中之一第三步驟。
圖10繪示根據本發明之例示性實施例之剝蝕程序中之一第四步驟。
圖11繪示根據本發明之例示性實施例之蝕刻程序中之一第五步驟。
本發明之例示性實施例係關於一種用於不須氧化一單元及源極線之乾剝蝕之方法。根據一實施例，使用施加於乾剝蝕程序中之氟基電漿步驟來改進一典型鑲嵌流程。氟與該單元及源極線(例如銅單元及銅源極線)材料反應以形成一薄銅氟化物(CuFx)膜。該銅氟化物膜保護該銅單元及銅源極線材料在基於氧電漿之碳剝蝕程序期間免受氧化。
在一典型鑲嵌處理技術中，將介電層(其通常為氧化物，一般指稱一金屬間介電質(IMD))沈積於半導體表面上。該氧化物層經拋光以獲得一平坦上表面。接著，一系列熟知程序步驟經執行以形成各種金屬層之間之互連件。鑲嵌程序允許形成小的緊密間隔互連件及接觸件。
圖1至圖6描繪用於一鑲嵌流程中之不須氧化單元及源極線之碳剝蝕之一程序。
圖1繪示根據本發明之例示性實施例之剝蝕程序中之一第一步驟。圖中展示一裝置100，其包括具有使用標準程序來內建於裝置100中之金屬接觸件110之一基板108。一碳或底層(UL)介電層106沈積於基板108之頂部上。一遮罩層104沈積於介電層106上，且一光阻層102沈積於遮罩層104上且光阻層102經圖樣化以形成開口105。一般技術
者將認識到，層106可為除碳之外之某物，其可經剝蝕且不與氟反應。
圖2繪示根據本發明之例示性實施例之剝蝕程序中之一第二步驟。使用圖案化光阻層102來蝕刻遮罩層104以在介電層106中形成一溝渠200。溝渠200暴露金屬接觸件110及基板108。
圖3繪示根據本發明之例示性實施例之剝蝕程序中之一第三步驟。一障壁襯層301沈積於溝渠200中。在一些實施例中，障壁層301可包括(但不限於)CVD/ALD(化學氣相沈積/原子層沈積)氧化物及氮化物。包括氧化物及氮化物之障壁層301可為一低k障壁(BLOK)膜。亦即，氧化物層/氮化物層301可係一低k障壁(BLOK)膜。隨後，在一些實施例中，銅(Cu)單元材料沈積至溝渠200中以形成單元300，且另一導電障壁金屬(例如電遷移障壁金屬)層302沈積於單元300上，接著進行銅之另一沈積以形成源極線310。障壁層301及障壁層302、單元300及源極線310覆蓋於介電層106之平面上方。
圖4繪示根據本發明之例示性實施例之剝蝕程序中之一第四步驟。使用一化學機械平坦化(CMP)程序來平坦化覆蓋層以使單元300之銅表面及源極線310暴露。
圖5繪示根據本發明之例示性實施例之剝蝕程序中之一第五步驟。在CMP之後，在一鈍化步驟中使暴露之單元300及源極線310與氟基蝕刻劑反應。可在剝蝕或剝離處理之前在反應性濺鍍類型之一基於電漿之處理腔室中執行原位氟反應。根據一些實施例，該氟基蝕刻劑可為使銅鈍化之CF4、SF6、NF3、CHF3、CH2F2或任何氟基化合物。在此實施例中，在依40mTorr之150sccm之一總流量中，使該鈍化氣體與氬氣(氦氣)依1：2之一流量比稀釋。在一13.56MHz感應耦合乾蝕刻腔室中使用500W之RF功率來產生該電漿。根據此實施例，使銅單元300及源極線310暴露於該氟基電漿達25秒，但一般技術者應認識到，可適當使用不同蝕刻劑及計時。使銅暴露於氟導致形成單元300及源極線310之一保護膜400，保護膜400由(例如)CuFx構成。保護膜
400充當保護單元300及源極線310免受氧化之一障壁。介電層106亦暴露於氟，但氟不與介電層106之材料(例如碳或UL)反應。
圖6繪示根據本發明之例示性實施例之剝蝕程序中之一第六步驟。執行一乾剝蝕，其中使用氧基電漿來剝蝕介電層106，同時保護膜400保護單元300及源極線310免受氧化。通常，該基於氧電漿之剝蝕將引起單元300及源極線310氧化。然而，保護膜400使氧氣無法滲透，藉此保護單元300及源極線310免受氧化。在剝蝕期間，障壁層301保護單元300之側免受氧電漿侵蝕。
在剝蝕之後，根據一實施例，使用一原位H2、H2-Ar電漿來濺鍍清潔單元材料400著陸表面上之保護膜400。由於擔心氟與施加至裝置100之物質相互作用，所以在剝蝕步驟之後視情況執行此步驟。
圖7至圖11描繪根據本發明之例示性實施例之用於在高縱橫比接觸件蝕刻中蝕刻不超過接觸件臨界尺寸(CD)之一通孔之一程序。
圖7繪示根據本發明之例示性實施例之蝕刻程序中之一第一步驟。初始鑲嵌程序產生一裝置700，其包括一銅膜702、一障壁介電膜704、一介電層706、遮罩層708及710、以及一圖案化光阻層712。根據一實施例，膜704係一低k障壁(BLOK)膜(例如碳化矽/氮化矽)且介電層706係氧化膜或氮化膜。在此實施例中，遮罩層708係碳遮罩(諸如碳聚合物)或底層(UL)介電遮罩，且遮罩層710可為由標準氮氧化矽組成之硬遮罩(HM)或介電抗反射塗層(DARC)。
圖8繪示根據本發明之例示性實施例之蝕刻程序中之一第二步驟。使通孔800蝕刻至遮罩層708、介電層706及障壁介電膜704中以暴露銅膜702。
圖9繪示蝕刻程序中之一第三步驟。藉由將氟基電漿施加至暴露銅膜702之部分而執行銅鈍化。如圖1至圖6中所描述，該氟基化合物與銅膜702反應以產生由銅氟化物(CuFx)形成之一保護膜900，保護膜
900充當銅膜702之一鈍化層。該氟基蝕刻劑可為使銅鈍化之CF4、SF6、NF3、CHF3、CH2F2或任何氟基化合物。在剝蝕或剝離處理之前在一處理腔室中執行該氟鈍化反應。在一些實施例中，組合BLOK蝕刻及鈍化步驟，其中使用氟基蝕刻來執行之BLOK蝕刻使銅膜702鈍化。
圖10繪示根據本發明之例示性實施例之蝕刻程序中之一第四步驟。使用一基於氧電漿之剝蝕程序來剝蝕遮罩層708以移除遮罩層708且終止於介電層706處。保護膜900防止銅膜702在遮罩層708之剝蝕期間氧化。由於此程序允許在存在選擇性遮罩時蝕刻障壁層(BLOK)，所以接觸件頂部CD之完整性被維持。相比而言，既有技術要求在存在障壁層時剝蝕遮罩以防止銅氧化，接著進行一毯覆式(無遮罩)BLOK穿孔以暴露銅層，其導致接觸件頂部CD被超過。
圖11繪示根據本發明之例示性實施例之蝕刻程序中之一第五步驟。在剝蝕遮罩層708之後，使用一基於原位H2、H2-Ar電漿之濺鍍清潔來視情況移除保護膜900以防止氟與其他化合物之間之未來相互作用。
雖然已參考某些實施例來描述本發明，但熟習技術者應瞭解，可在不背離本發明之範疇之情況下進行各種改變且進行等效物取代。此外，可在不背離本發明之範疇之情況下進行諸多修改以使一特定情形或材料適應於本發明之教示。因此，意欲本發明不受限於所揭示之特定實施例，且本發明將包含落於隨附申請專利範圍之範疇內之所有實施例。
100‧‧‧裝置
102‧‧‧光阻層
104‧‧‧遮罩層
105‧‧‧開口
106‧‧‧介電層
108‧‧‧基板
110‧‧‧金屬接觸件
Claims (13)
- 一種製造一記憶體單元之方法，該方法包括：對一單元結構及在一介電層上方之一源極線執行一鈍化，其中該鈍化形成與該記憶體單元中之該單元結構及該源極線之各者直接接觸之一保護膜，其中該鈍化包括使用一化合物，該化合物使該單元結構及該源極線之一金屬層鈍化，其中通過該化合物與該金屬層之反應來形成該保護膜；執行剝蝕該介電層以形成該記憶體單元；及自該單元結構移除該保護膜以防止該化合物與後續施加程序互相作用，其中藉由濺鍍清潔而執行自該單元結構移除該保護膜，其中使用原位H2或H2-Ar電漿來執行該濺鍍清潔。
- 如請求項1之方法，其中該化合物係氟基化合物。
- 如請求項2之方法，其中在該剝蝕之後，該單元結構及該源極線在一剖面視圖(a cross-section view)中被包圍(enclosed)在一障壁層及該保護膜內。
- 如請求項2之方法，其中該金屬層係銅。
- 如請求項1之方法，其中該剝蝕使用一氧基電漿來剝蝕一炭層或一底層(UL)之一者。
- 如請求項1之方法，其進一步包括：在該鈍化之前，執行一遮罩層之一蝕刻及執行一氧化物/氮化物層、一源極線及一障壁金屬層之一移除，以暴露該障壁金屬層。
- 如請求項6之方法，其中該源極線係銅。
- 如請求項4之方法，其中該氟基化合物係CF4、SF6、NF3、CHF3及CH2F2之一者。
- 如請求項6之方法，其中藉由在存在一遮罩層時同時執行多個層之該蝕刻而防止超過一接觸件臨界尺寸。
- 如請求項6之方法，其中該氧化物/氮化物層係一氧化物膜，該氧化物膜係一低k障壁(BLOK)膜且該遮罩層係一碳層或一底層介電層之一者。
- 如請求項10之方法，其中該剝蝕使用一氧基電漿。
- 如請求項11之方法，其中該BLOK膜係沈積於該單元結構之一金屬層上之一膜，且該BLOK膜薄於該金屬層。
- 一種製造一記憶體單元之方法，該方法包括：在一介電層中之一溝渠內形成一單元結構；在該單元結構中之一溝渠內形成一源極線，該源極線及該單元結構藉由一障壁層而分離；對該單元結構及該源極線執行一鈍化，其中該鈍化形成與該單元結構、該障壁層及該源極線之各者直接接觸之一遮罩層，且其中該鈍化將該單元結構中之一金屬層暴露於一氟基化合物，其中該鈍化包括使用一化合物，該化合物使該單元結構及該源極線之一金屬層鈍化，其中通過該化合物與該金屬層之反應來形成該遮罩層；及自該單元結構移除該遮罩層以防止該化合物與後續施加程序互相作用，其中藉由濺鍍清潔而執行自該單元結構移除該遮罩層，其中使用原位H2或H2-Ar電漿來執行該濺鍍清潔。
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| US10886467B2 (en) | 2019-05-02 | 2021-01-05 | International Business Machines Corporation | CBRAM by subtractive etching of metals |
| US11527713B2 (en) * | 2020-01-31 | 2022-12-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Top electrode via with low contact resistance |
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| JP2017520912A (ja) | 2017-07-27 |
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| JP6679501B2 (ja) | 2020-04-15 |
| KR20170012220A (ko) | 2017-02-02 |
| US20150340611A1 (en) | 2015-11-26 |
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