JP2016164906A - 半導体装置およびその製造方法ならびに電力変換装置 - Google Patents
半導体装置およびその製造方法ならびに電力変換装置 Download PDFInfo
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- JP2016164906A JP2016164906A JP2015044212A JP2015044212A JP2016164906A JP 2016164906 A JP2016164906 A JP 2016164906A JP 2015044212 A JP2015044212 A JP 2015044212A JP 2015044212 A JP2015044212 A JP 2015044212A JP 2016164906 A JP2016164906 A JP 2016164906A
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Abstract
【解決手段】半導体装置は、第1の半導体層と;第2の半導体層と;第3の半導体層と;側面と底面とを有する溝部と;第1の絶縁材料から主に成り、側面から底面にわたって形成された膜であり、側面膜部と底面膜部とを有する第1の絶縁体と;第1の絶縁材料より高い比誘電率を有する第2の絶縁材料から主に成り、少なくとも、側面膜部と底面膜部とに囲まれた領域の角部に、形成された第2の絶縁体と;第1の絶縁体および第2の絶縁体を介して溝部の内側に形成された電極とを備え、第2の絶縁体の部位のうち角部に位置する部位における底面膜部の表面を基準とする厚さTh1は、第2の絶縁体の部位のうち第2の半導体層との間に側面膜部を挟む部位における側面膜部の表面を基準とする厚さTh2より大きい。
【選択図】図3
Description
A−1.電力変換装置の構成
図1は、電力変換装置10の構成を示す説明図である。電力変換装置10は、交流電源Eから負荷Rに供給される電力を変換する装置である。電力変換装置10は、交流電源Eの力率を改善する力率改善回路の構成部品として、半導体装置100と、制御回路200と、4つのダイオードD1と、コイルLと、ダイオードD2と、キャパシタCとを備える。
図2は、第1実施形態における半導体装置100の構成を模式的に示す断面図である。図2には、相互に直交するXYZ軸が図示されている。図2のXYZ軸のうち、X軸は、図2の紙面左から紙面右に向かう軸である。+X軸方向は、紙面右に向かう方向であり、−X軸方向は、紙面左に向かう方向である。図2のXYZ軸のうち、Y軸は、図2の紙面手前から紙面奥に向かう軸である。+Y軸方向は、紙面奥に向かう方向であり、−Y軸方向は、紙面手前に向かう方向である。図2のXYZ軸のうち、Z軸は、図2の紙面下から紙面上に向かう軸である。+Z軸方向は、紙面上に向かう方向であり、−Z軸方向は、紙面下に向かう方向である。図2のXYZ軸は、他の図のXYZ軸に対応する。
図4は、第1実施形態における半導体装置100の製造方法を示す工程図である。まず、製造者は、基板110の上に半導体層111,112,113を結晶成長によって形成する(工程P110)。本実施形態では、製造者は、有機金属気相成長法(MOCVD:Metal Organic Chemical Vapor Deposition)を用いて半導体層111,112,113を形成する。
図5は、耐電圧に関する評価試験の結果示すグラフである。図5の評価試験では、試験者は、2つの半導体装置を試料1,2として用意し、各試料に耐電圧を評価した。
・トレンチ122の側面122sにおける絶縁膜130の膜厚
絶縁膜131(二酸化ケイ素(SiO2))の膜厚Th4:50nm
絶縁膜132(酸窒化ジルコニウム(ZrON))の膜厚Th2:30nm
・トレンチ122の底面122bにおける絶縁膜130の膜厚
絶縁膜131(二酸化ケイ素(SiO2))の膜厚Th3:50nm
絶縁膜132(酸窒化ジルコニウム(ZrON))の膜厚Th1:100nm
以上説明した第1実施形態によれば、絶縁膜131の上に形成された絶縁膜132の厚さTh1が厚さTh2より大きいため、ゲート電極142の界面に発生する電界集中を、角部122cに位置する絶縁膜132によって効果的に抑制できる。したがって、トレンチ122に形成されたトレンチMIS構造における電界集中を効果的に緩和できる。
図6は、第2実施形態における半導体装置100Bの構成を模式的に示す断面図である。半導体装置100Bは、ゲート電極142に代えてゲート電極142Bを備える点を除き、第1実施形態の半導体装置100と同様である。半導体装置100Bのゲート電極142Bは、トレンチ122の側面122sおよび底面122bに沿って形成されている点を除き、第1実施形態のゲート電極142と同様である。
図7は、第3実施形態における半導体装置100Cの構成を模式的に示す断面図である。半導体装置100Cは、第1実施形態のトレンチ122より深いトレンチ122Cが形成されている点、絶縁膜130に代えて絶縁膜130Cを備える点、並びに、ゲート電極142に代えてゲート電極142Cを備える点を除き、第1実施形態の半導体装置100と同様である。
図8は、第4実施形態における半導体装置100Dの構成を模式的に示す断面図である。半導体装置100Dは、第1実施形態のトレンチ122より深いトレンチ122Dが形成されている点、絶縁膜130に代えて絶縁膜130Dを備える点、並びに、ゲート電極142に代えてゲート電極142Dを備える点を除き、第1実施形態の半導体装置100と同様である。
図9は、第5実施形態における半導体装置100Eの構成を模式的に示す断面図である。半導体装置100Eは、第1実施形態のトレンチ122より深いトレンチ122Eが形成されている点、絶縁膜130に代えて絶縁膜130Eを備える点、並びに、ゲート電極142に代えてゲート電極142Eを備える点を除き、第1実施形態の半導体装置100と同様である。
図10は、第6実施形態における半導体装置100Fの構成を模式的に示す断面図である。半導体装置100Fは、第1実施形態のトレンチ122より深いトレンチ122Fが形成されている点、絶縁膜130に代えて絶縁膜130Fを備える点、並びに、ゲート電極142に代えてゲート電極142Fを備える点を除き、第1実施形態の半導体装置100と同様である。
本発明は、上述の実施形態や実施例、変形例に限られるものではなく、その趣旨を逸脱しない範囲において種々の構成で実現することができる。例えば、発明の概要の欄に記載した各形態中の技術的特徴に対応する実施形態、実施例、変形例中の技術的特徴は、上述の課題の一部または全部を解決するために、あるいは、上述の効果の一部または全部を達成するために、適宜、差し替えや、組み合わせを行うことが可能である。また、その技術的特徴が本明細書中に必須なものとして説明されていなければ、適宜、削除することが可能である。
(第1の絶縁材料)/(第2の絶縁材料)
二酸化ケイ素(SiO2)/酸化アルミニウム(Al2O3)
二酸化ケイ素(SiO2)/酸化ガリウム(Ga2O3)
二酸化ケイ素(SiO2)/酸化ハフニウム(HfO2)
二酸化ケイ素(SiO2)/酸窒化ケイ素ハフニウム(HfSiON)
二酸化ケイ素(SiO2)/酸化ジルコニウム(ZrO2)
二酸化ケイ素(SiO2)/酸窒化ジルコニウム(ZrON)
酸化ガリウム(Ga2O3)/酸化ハフニウム(HfO2)
酸化ガリウム(Ga2O3)/酸窒化ケイ素ハフニウム(HfSiON)
酸化ガリウム(Ga2O3)/酸化ジルコニウム(ZrO2)
酸化ガリウム(Ga2O3)/酸窒化ジルコニウム(ZrON)
酸化アルミニウム(Al2O3)/酸化ハフニウム(HfO2)
酸化アルミニウム(Al2O3)/酸窒化ケイ素ハフニウム(HfSiON)
酸化アルミニウム(Al2O3)/酸化ジルコニウム(ZrO2)
酸化アルミニウム(Al2O3)/酸窒化ジルコニウム(ZrON)
110…基板
111…半導体層
111f…pn接合界面
112…半導体層
113…半導体層
114…半導体層
122,122C,122D,122E,122F…トレンチ
122b…底面
122c…角部
122s…側面
124…リセス
126…段差部
129…終端部
130,130C,130D,130E,130F…絶縁膜
131,131C,131D,131E,131F…絶縁膜
131b…底面膜部
131s…側面膜部
131t…上面膜部
132,132C,132D,132E…絶縁膜
132F…絶縁体
132b…底面膜部
132s…側面膜部
132t…上面膜部
142,142B,142C,142D,142E,142F…ゲート電極
142f…界面
144…ボディ電極
146…ソース電極
148…ドレイン電極
150…絶縁膜
160…配線電極
200…制御回路
C…キャパシタ
D1,D2…ダイオード
DB…ダイオードブリッジ
E…交流電源
L…コイル
R…負荷
Tn…負極出力端
Tp…正極出力端
Claims (18)
- 半導体装置であって、
n型およびp型のうち一方の特性を有する第1の半導体層と、
n型およびp型のうち前記一方の特性とは異なる他方の特性を有し、前記第1の半導体層に積層された第2の半導体層と、
前記一方の特性を有し、前記第2の半導体層に積層された第3の半導体層と、
前記第3の半導体層から前記第2の半導体層を貫通し前記第1の半導体層にまで落ち込み、側面と底面とを有する溝部と、
第1の絶縁材料から主に成り、前記側面から前記底面にわたって形成された膜であり、前記側面に形成された側面膜部と、前記底面に形成された底面膜部とを有する第1の絶縁体と、
前記第1の絶縁材料より高い比誘電率を有する第2の絶縁材料から主に成り、少なくとも、前記側面膜部と前記底面膜部とに囲まれた領域の角部に、形成された第2の絶縁体と、
前記第1の絶縁体および前記第2の絶縁体を介して前記溝部の内側に形成された電極と
を備え、
前記第2の絶縁体の部位のうち前記角部に位置する部位における前記底面膜部の表面を基準とする厚さTh1は、前記第2の絶縁体の部位のうち前記第2の半導体層との間に前記側面膜部を挟む部位における前記側面膜部の表面を基準とする厚さTh2より大きい、半導体装置。 - 前記厚さTh1は、前記第1の絶縁体の厚さより大きい、請求項1に記載の半導体装置。
- 前記底面膜部の厚さは、前記側面膜部の厚さ以上である、請求項1または請求項2に記載の半導体装置。
- 前記厚さTh1は、前記底面膜部の厚さの2倍以上である、請求項1から請求項3までのいずれか一項に記載の半導体装置。
- 前記第2の絶縁体と前記電極との界面は、前記第1の半導体層と前記第2の半導体層との界面より前記第3の半導体層側に位置する、請求項1から請求項4までのいずれか一項に記載の半導体装置。
- 前記第2の絶縁体は、前記側面膜部から前記底面膜部にわたって形成された膜である、請求項1から請求項5までのいずれか一項に記載の半導体装置。
- 請求項1から請求項6までのいずれか一項に記載の半導体装置であって、
前記第2の絶縁体は、
前記側面膜部の上に形成され、前記厚さTh2を有する膜部と、
前記底面膜部の上に形成され、前記厚さTh1を有する膜部と
を有する、半導体装置。 - 前記第2の絶縁体は、前記角部において部分的に厚い、請求項1から請求項6までのいずれか一項に記載の半導体装置。
- 前記第2の絶縁体は、前記角部において部分的に形成された、請求項1から請求項5までのいずれか一項に記載の半導体装置。
- 前記第1の絶縁材料は、二酸化ケイ素(SiO2)、酸窒化ケイ素(SiON)、酸化アルミニウム(Al2O3)、酸窒化アルミニウム(AlON)および酸化ガリウム(Ga2O3)の少なくとも1つを含む、請求項1から請求項9までのいずれか一項に記載の半導体装置。
- 前記第2の絶縁材料は、アルミニウム(Al)、ハフニウム(Hf)、チタン(Ti)、ジルコニウム(Zr)、タンタル(Ta)およびランタン(La)の少なくとも1つの元素を含有する酸化物および酸窒化物の少なくとも一方を含む、請求項1から請求項10までのいずれか一項に記載の半導体装置。
- 前記第1の半導体層、前記第2の半導体層および前記第3の半導体層のうち少なくとも1つの半導体層は、ケイ素(Si)より大きいバンドギャップを有する半導体から主に成る、請求項1から請求項11までのいずれか一項に記載の半導体装置。
- 前記第1の半導体層、前記第2の半導体層および前記第3の半導体層のうち少なくとも1つの半導体層は、炭化ケイ素(SiC)、窒化物半導体、ダイヤモンド、酸化ガリウム(Ga2O3)の少なくとも1つから主に成る、請求項1から請求項12までのいずれか一項に記載の半導体装置。
- 請求項1から請求項13までのいずれか一項に記載の半導体装置を備える電力変換装置。
- 半導体装置の製造方法であって、
n型およびp型のうち一方の特性を有する第1の半導体層を基板に形成し、
n型およびp型のうち前記一方の特性とは異なる他方の特性を有する第2の半導体層を、前記第1の半導体層に積層し、
前記一方の特性を有する第3の半導体層を、前記第2の半導体層に積層し、
前記第3の半導体層から前記第2の半導体層を貫通し前記第1の半導体層にまでエッチングを行うことによって、側面と底面とを有する溝部を形成し、
第1の絶縁材料を用いて、前記側面から前記底面にわたって形成された膜として、前記側面に形成された側面膜部と、前記底面に形成された底面膜部とを有する第1の絶縁体を形成し、
前記第1の絶縁材料より高い比誘電率を有する第2の絶縁材料を用いて、少なくとも、前記側面膜部と前記底面膜部とに囲まれた領域の角部に、第2の絶縁体を形成し、
前記第1の絶縁体および前記第2の絶縁体が形成された前記溝部の内側に、電極を形成し、
前記第2の絶縁体を形成する際、前記第2の絶縁体の部位のうち前記角部に位置する部位における前記底面膜部の表面を基準とする厚さTh1を、前記第2の絶縁体の部位のうち前記第2の半導体層との間に前記側面膜部を挟む部位における前記側面膜部の表面を基準とする厚さTh2より大きくする、半導体装置の製造方法。 - スパッタ法によって前記第2の絶縁体を形成する、請求項15に記載の半導体装置の製造方法。
- 前記スパッタ法は、電子サイクロトロン共鳴スパッタ法である、請求項16に記載の半導体装置の製造方法。
- ターゲット粒子の放射方向と前記基板との角度を制御することによって、前記第2の絶縁体の厚さを調整する、請求項17に記載の半導体装置の製造方法。
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JP7127279B2 (ja) * | 2017-12-14 | 2022-08-30 | 富士電機株式会社 | 炭化シリコン半導体装置及びその製造方法 |
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