JP2016032097A - 配線基板 - Google Patents
配線基板 Download PDFInfo
- Publication number
- JP2016032097A JP2016032097A JP2015085732A JP2015085732A JP2016032097A JP 2016032097 A JP2016032097 A JP 2016032097A JP 2015085732 A JP2015085732 A JP 2015085732A JP 2015085732 A JP2015085732 A JP 2015085732A JP 2016032097 A JP2016032097 A JP 2016032097A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- semiconductor element
- wiring board
- island
- cap
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09227—Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10969—Metallic case or integral heatsink of component electrically connected to a pad on PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10984—Component carrying a connection agent, e.g. solder, adhesive
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
Description
4・・・・・・・・・・・導体層
8・・・・・・・・・・・半導体素子接続パッド
9・・・・・・・・・・・キャップ接続パッド
9a・・・・・・・・・・島状パターン
10・・・・・・・・・・・帯状パターン
20,20’’,20’’’・・・配線基板
Claims (2)
- 絶縁層と導体層とが交互に複数層積層されて成り、最上層の絶縁層の上面に、前記導体層から成る複数の半導体素子接続パッドが形成されているとともに該半導体素子接続パッドが形成された領域を取り囲むようにして前記導体層から成るキャップ接続パターンが形成されており、かつ前記半導体素子接続パッドから前記キャップ接続パターンの前記領域側の端部よりも外側の領域に延在する前記導体層から成る帯状パターンを有する配線基板において、前記キャップ接続パターンは、互いに間隔をあけて配置された複数の島状パターンにより形成されており、前記帯状パターンは、前記最上層の絶縁層の上面を、前記島状パターン同士の間に端部を有するか、あるいは前記島状パターン同士の間を通るように延在していることを特徴とする配線基板。
- 前記帯状パターンは、前記島状パターンの間およびその近傍部分が幅広に形成されていることを特徴とする請求項1記載の配線基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015085732A JP6470095B2 (ja) | 2014-07-25 | 2015-04-20 | 配線基板 |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014151299 | 2014-07-25 | ||
JP2014151299 | 2014-07-25 | ||
JP2015085732A JP6470095B2 (ja) | 2014-07-25 | 2015-04-20 | 配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016032097A true JP2016032097A (ja) | 2016-03-07 |
JP6470095B2 JP6470095B2 (ja) | 2019-02-13 |
Family
ID=55167320
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015085732A Expired - Fee Related JP6470095B2 (ja) | 2014-07-25 | 2015-04-20 | 配線基板 |
Country Status (2)
Country | Link |
---|---|
US (1) | US9412688B2 (ja) |
JP (1) | JP6470095B2 (ja) |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6390865U (ja) * | 1986-12-04 | 1988-06-13 | ||
JPH04372205A (ja) * | 1991-06-21 | 1992-12-25 | Toshiba Corp | 回路基板装置 |
DE19522455A1 (de) * | 1995-06-21 | 1997-01-02 | Telefunken Microelectron | EMV-Abschirmung bei elektronischen Bauelementen |
JPH1065034A (ja) * | 1996-08-21 | 1998-03-06 | Ngk Spark Plug Co Ltd | 電子部品用配線基板及び電子部品パッケージ |
JPH10112517A (ja) * | 1996-10-03 | 1998-04-28 | Ngk Spark Plug Co Ltd | 電子部品収納用パッケージ |
JP2000031312A (ja) * | 1998-07-08 | 2000-01-28 | Kyocera Corp | 半導体素子の実装構造 |
JP2005310936A (ja) * | 2004-04-20 | 2005-11-04 | Sanyo Electric Co Ltd | 素子形成基板及びその製造方法 |
US20070200748A1 (en) * | 2006-02-15 | 2007-08-30 | Infineon Technologies Ag | Semiconductor Device for an Ultra Wideband Standard for Ultra-High-Frequency Communication, and Method for Producing the Same |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4403977B2 (ja) | 2005-01-26 | 2010-01-27 | ソニー株式会社 | 機能素子体及びその製造方法並びに回路モジュール |
JP2009117767A (ja) * | 2007-11-09 | 2009-05-28 | Shinko Electric Ind Co Ltd | 半導体装置の製造方法及びそれにより製造した半導体装置 |
-
2015
- 2015-04-20 JP JP2015085732A patent/JP6470095B2/ja not_active Expired - Fee Related
- 2015-07-23 US US14/806,803 patent/US9412688B2/en active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6390865U (ja) * | 1986-12-04 | 1988-06-13 | ||
JPH04372205A (ja) * | 1991-06-21 | 1992-12-25 | Toshiba Corp | 回路基板装置 |
DE19522455A1 (de) * | 1995-06-21 | 1997-01-02 | Telefunken Microelectron | EMV-Abschirmung bei elektronischen Bauelementen |
JPH1065034A (ja) * | 1996-08-21 | 1998-03-06 | Ngk Spark Plug Co Ltd | 電子部品用配線基板及び電子部品パッケージ |
JPH10112517A (ja) * | 1996-10-03 | 1998-04-28 | Ngk Spark Plug Co Ltd | 電子部品収納用パッケージ |
JP2000031312A (ja) * | 1998-07-08 | 2000-01-28 | Kyocera Corp | 半導体素子の実装構造 |
JP2005310936A (ja) * | 2004-04-20 | 2005-11-04 | Sanyo Electric Co Ltd | 素子形成基板及びその製造方法 |
US20070200748A1 (en) * | 2006-02-15 | 2007-08-30 | Infineon Technologies Ag | Semiconductor Device for an Ultra Wideband Standard for Ultra-High-Frequency Communication, and Method for Producing the Same |
Also Published As
Publication number | Publication date |
---|---|
US20160027724A1 (en) | 2016-01-28 |
US9412688B2 (en) | 2016-08-09 |
JP6470095B2 (ja) | 2019-02-13 |
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