JP2015057827A5 - - Google Patents

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Publication number
JP2015057827A5
JP2015057827A5 JP2014187826A JP2014187826A JP2015057827A5 JP 2015057827 A5 JP2015057827 A5 JP 2015057827A5 JP 2014187826 A JP2014187826 A JP 2014187826A JP 2014187826 A JP2014187826 A JP 2014187826A JP 2015057827 A5 JP2015057827 A5 JP 2015057827A5
Authority
JP
Japan
Prior art keywords
semiconductor package
package according
metal
solder
seed pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2014187826A
Other languages
English (en)
Japanese (ja)
Other versions
JP6419500B2 (ja
JP2015057827A (ja
Filing date
Publication date
Priority claimed from KR1020130110974A external-priority patent/KR102109042B1/ko
Priority claimed from KR1020130115332A external-priority patent/KR102093927B1/ko
Priority claimed from KR1020130115333A external-priority patent/KR102091619B1/ko
Application filed filed Critical
Publication of JP2015057827A publication Critical patent/JP2015057827A/ja
Publication of JP2015057827A5 publication Critical patent/JP2015057827A5/ja
Application granted granted Critical
Publication of JP6419500B2 publication Critical patent/JP6419500B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2014187826A 2013-09-16 2014-09-16 半導体パッケージ Active JP6419500B2 (ja)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
KR1020130110974A KR102109042B1 (ko) 2013-09-16 2013-09-16 반도체 패키지
KR10-2013-0110974 2013-09-16
KR10-2013-0115333 2013-09-27
KR10-2013-0115332 2013-09-27
KR1020130115332A KR102093927B1 (ko) 2013-09-27 2013-09-27 반도체 패키지
KR1020130115333A KR102091619B1 (ko) 2013-09-27 2013-09-27 반도체 패키지

Publications (3)

Publication Number Publication Date
JP2015057827A JP2015057827A (ja) 2015-03-26
JP2015057827A5 true JP2015057827A5 (enExample) 2017-10-26
JP6419500B2 JP6419500B2 (ja) 2018-11-07

Family

ID=51518709

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014187826A Active JP6419500B2 (ja) 2013-09-16 2014-09-16 半導体パッケージ

Country Status (5)

Country Link
US (1) US9252112B2 (enExample)
EP (1) EP2849226B1 (enExample)
JP (1) JP6419500B2 (enExample)
CN (1) CN104465580B (enExample)
TW (1) TWI646639B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI517269B (zh) * 2013-09-27 2016-01-11 矽品精密工業股份有限公司 層疊式封裝結構及其製法
KR102152865B1 (ko) * 2014-02-06 2020-09-07 엘지이노텍 주식회사 인쇄회로기판, 이를 포함하는 패키지 기판 및 이의 제조 방법
JP2016171190A (ja) * 2015-03-12 2016-09-23 イビデン株式会社 パッケージ−オン−パッケージ用プリント配線板
KR102446861B1 (ko) 2017-09-21 2022-09-23 삼성전자주식회사 적층 패키지 및 그의 제조 방법

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11145327A (ja) * 1997-11-07 1999-05-28 Shinko Electric Ind Co Ltd 半導体装置および該半導体装置の実装構造
US6818545B2 (en) * 2001-03-05 2004-11-16 Megic Corporation Low fabrication cost, fine pitch and high reliability solder bump
JP2007194436A (ja) * 2006-01-19 2007-08-02 Elpida Memory Inc 半導体パッケージ、導電性ポスト付き基板、積層型半導体装置、半導体パッケージの製造方法及び積層型半導体装置の製造方法
JP4917874B2 (ja) * 2006-12-13 2012-04-18 新光電気工業株式会社 積層型パッケージ及びその製造方法
JP5003260B2 (ja) * 2007-04-13 2012-08-15 日本電気株式会社 半導体装置およびその製造方法
JP5217043B2 (ja) * 2007-07-11 2013-06-19 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP5056718B2 (ja) * 2008-10-16 2012-10-24 株式会社デンソー 電子装置の製造方法
JP5193898B2 (ja) * 2009-02-12 2013-05-08 新光電気工業株式会社 半導体装置及び電子装置
KR20100121231A (ko) * 2009-05-08 2010-11-17 삼성전자주식회사 회로패턴 들뜸 현상을 억제하는 패키지 온 패키지 및 그 제조방법
US20110024899A1 (en) * 2009-07-28 2011-02-03 Kenji Masumoto Substrate structure for cavity package
US8482111B2 (en) * 2010-07-19 2013-07-09 Tessera, Inc. Stackable molded microelectronic packages
JP5599276B2 (ja) * 2010-09-24 2014-10-01 新光電気工業株式会社 半導体素子、半導体素子実装体及び半導体素子の製造方法
JP5462777B2 (ja) * 2010-12-09 2014-04-02 日本特殊陶業株式会社 多層配線基板の製造方法
US8531021B2 (en) * 2011-01-27 2013-09-10 Unimicron Technology Corporation Package stack device and fabrication method thereof
KR101167805B1 (ko) * 2011-04-25 2012-07-25 삼성전기주식회사 패키지 기판 및 이의 제조방법
JP5906812B2 (ja) * 2012-02-29 2016-04-20 富士通株式会社 配線構造、半導体装置及び配線構造の製造方法
US9368438B2 (en) * 2012-12-28 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Package on package (PoP) bonding structures

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