JP2015050358A - 半導体装置の製造方法 - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 238000000034 method Methods 0.000 claims abstract description 65
- 238000005530 etching Methods 0.000 claims abstract description 59
- 230000008569 process Effects 0.000 claims abstract description 48
- 238000012545 processing Methods 0.000 claims abstract description 43
- 238000000151 deposition Methods 0.000 claims abstract description 25
- 239000007789 gas Substances 0.000 claims description 34
- 238000009832 plasma treatment Methods 0.000 claims description 20
- 229910052760 oxygen Inorganic materials 0.000 claims description 14
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 8
- 229910052799 carbon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 239000001301 oxygen Substances 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 claims description 3
- 239000011162 core material Substances 0.000 description 28
- 230000006870 function Effects 0.000 description 16
- 230000008021 deposition Effects 0.000 description 13
- 229910052581 Si3N4 Inorganic materials 0.000 description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 12
- 238000001459 lithography Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 238000012546 transfer Methods 0.000 description 6
- 238000001039 wet etching Methods 0.000 description 5
- 238000011161 development Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- -1 O 2 Inorganic materials 0.000 description 2
- 229910003902 SiCl 4 Inorganic materials 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 229910052794 bromium Inorganic materials 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000004904 shortening Methods 0.000 description 2
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 230000036211 photosensitivity Effects 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 description 1
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Abstract
【解決手段】実施形態によれば、半導体装置の製造方法は、下地11上に第1の膜21のラインパターンを形成する工程と、第1の膜のラインパターンの側壁および上面にコンフォーマルに第2の膜31を堆積させる工程と、第2の膜をエッチバックして第1の膜のラインパターンの上面上の第2の膜を除去する工程と、第1の膜のラインパターンをエッチングして除去し、下地上に第2の膜のラインパターンを残す工程と、を備えている。第2の膜を堆積させる工程、第2の膜をエッチバックする工程、および第1の膜のラインパターンをエッチングする工程を、同じプラズマ処理装置内で続けて行う。
【選択図】図1
Description
図1(a)〜図2(d)は、第1実施形態の半導体装置の製造方法を示す模式断面図である。
図3(a)〜図4(e)は、第2実施形態の半導体装置の製造方法を示す模式断面図である。
図5(a)〜図6(d)は、第3実施形態の半導体装置の製造方法を示す模式断面図である。
Claims (5)
- 下地上に、第1の膜のラインパターンを形成する工程と、
前記第1の膜のラインパターンの側壁および上面に、コンフォーマルに第2の膜を堆積させる工程と、
前記第2の膜をエッチバックして、前記第1の膜のラインパターンの上面上の前記第2の膜を除去し、前記第1の膜のラインパターンの側壁に前記第2の膜を残す工程と、
前記第1の膜のラインパターンをエッチングして除去し、前記下地上に前記第2の膜のラインパターンを残す工程と、
を備え、
前記第2の膜を堆積させる工程、前記第2の膜をエッチバックする工程、および前記第1の膜のラインパターンをエッチングする工程を、同じプラズマ処理装置内で続けて行う半導体装置の製造方法。 - 前記第2の膜のラインパターンの側壁および上面に、コンフォーマルに第3の膜を堆積させる工程と、
前記第3の膜をエッチバックして、前記第2の膜のラインパターンの上面上の前記第3の膜を除去し、前記第2の膜のラインパターンの側壁に前記第3の膜を残す工程と、
前記第2の膜のラインパターンをエッチングして除去し、前記下地上に前記第3の膜のラインパターンを残す工程と、
をさらに備え、
前記第3の膜を堆積させる工程、前記第3の膜をエッチバックする工程、および前記第2の膜のラインパターンをエッチングする工程を、同じプラズマ処理装置内で続けて行う請求項1記載の半導体装置の製造方法。 - 前記下地は、第1の下地膜と、前記第1の下地膜の上に形成された第2の下地膜とを有し、
前記第2の膜のラインパターンをマスクにしたエッチングにより、前記第2の下地膜をラインパターンに加工する工程と、
前記第2の膜のラインパターンをエッチングして除去し、前記第1の下地膜上に前記第2の下地膜のラインパターンを残す工程と、
前記第2の下地膜のラインパターンの側壁および上面に、コンフォーマルに第3の膜を堆積させる工程と、
前記第3の膜をエッチバックして、前記第2の下地膜のラインパターンの上面上の前記第3の膜を除去し、前記第2の下地膜のラインパターンの側壁に前記第3の膜を残す工程と、
前記第2の下地膜のラインパターンをエッチングして除去し、前記第1の下地膜上に前記第3の膜のラインパターンを残す工程と、
をさらに備え、
前記第2の下地膜を加工する工程、前記第2の膜のラインパターンをエッチングする工程、前記第3の膜を堆積させる工程、前記第3の膜をエッチバックする工程、および前記第2の下地膜のラインパターンをエッチングする工程を、同じプラズマ処理装置内で続けて行う請求項1記載の半導体装置の製造方法。 - 炭素を含むガスを用いたプラズマ処理で、炭素を含む前記第3の膜を堆積させる請求項2または3に記載の半導体装置の製造方法。
- 炭素を含む前記第1の膜に対して、シリコン及び酸素を含むガスを用いたプラズマ処理で、シリコン及び酸素を含む前記第2の膜を堆積させ、
フッ化炭素を含むガスを用いたプラズマ処理で、前記第2の膜をエッチバックする請求項1〜4のいずれか1つに記載の半導体装置の製造方法。
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2018026495A (ja) * | 2016-08-12 | 2018-02-15 | 東京エレクトロン株式会社 | 被処理体を処理する方法 |
CN107799458A (zh) * | 2016-08-31 | 2018-03-13 | 东京毅力科创株式会社 | 自对准多重图案化的原位间隔件整形的方法和系统 |
WO2020033405A1 (en) * | 2018-08-08 | 2020-02-13 | Tokyo Electron Limited | Method utilizing using post etch pattern encapsulation |
JP2020145309A (ja) * | 2019-03-06 | 2020-09-10 | 株式会社東芝 | パターン形成方法及びパターン構造 |
Families Citing this family (3)
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US9711368B2 (en) * | 2013-04-15 | 2017-07-18 | United Microelectronics Corp. | Sidewall image transfer process |
JP2015198135A (ja) * | 2014-03-31 | 2015-11-09 | 株式会社東芝 | 半導体装置の製造方法 |
JP2021047342A (ja) * | 2019-09-20 | 2021-03-25 | キオクシア株式会社 | パターン形成方法及び半導体装置の製造方法 |
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