JP2014523189A5 - - Google Patents

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JP2014523189A5
JP2014523189A5 JP2014518870A JP2014518870A JP2014523189A5 JP 2014523189 A5 JP2014523189 A5 JP 2014523189A5 JP 2014518870 A JP2014518870 A JP 2014518870A JP 2014518870 A JP2014518870 A JP 2014518870A JP 2014523189 A5 JP2014523189 A5 JP 2014523189A5
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driver circuit
circuit
circuits
receiver
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JP6109163B2 (ja
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JP2014518870A 2011-06-30 2012-06-22 構成可能な多次元ドライバ及び受信器 Active JP6109163B2 (ja)

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Application Number Priority Date Filing Date Title
US13/174,616 2011-06-30
US13/174,616 US8760188B2 (en) 2011-06-30 2011-06-30 Configurable multi-dimensional driver and receiver
PCT/US2012/043767 WO2013003230A2 (en) 2011-06-30 2012-06-22 Configurable multi-dimensional driver and receiver

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JP2014523189A JP2014523189A (ja) 2014-09-08
JP2014523189A5 true JP2014523189A5 (https=) 2017-02-23
JP6109163B2 JP6109163B2 (ja) 2017-04-05

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US (2) US8760188B2 (https=)
EP (1) EP2726951A4 (https=)
JP (1) JP6109163B2 (https=)
KR (1) KR101954769B1 (https=)
CN (1) CN103547978B (https=)
TW (1) TWI533644B (https=)
WO (1) WO2013003230A2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11392163B1 (en) * 2021-09-23 2022-07-19 Apple Inc. On-chip supply ripple tolerant clock distribution

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130045144A (ko) * 2011-10-24 2013-05-03 삼성전자주식회사 출력 드라이버와 이를 포함하는 장치들, 및 접지 터미네이션
CN103066987A (zh) * 2011-10-24 2013-04-24 三星电子株式会社 输出驱动器、集成电路及系统
KR102032854B1 (ko) * 2012-12-20 2019-10-16 에스케이하이닉스 주식회사 신호 전달 회로
JP2014187162A (ja) * 2013-03-22 2014-10-02 Toshiba Corp 半導体装置とそのトリミング方法
JP6266286B2 (ja) * 2013-09-27 2018-01-24 Hoya株式会社 マスクブランク用基板の製造方法、マスクブランクの製造方法、転写用マスクの製造方法、及び半導体デバイスの製造方法
US9306729B2 (en) * 2014-01-14 2016-04-05 International Business Machines Corporation Phase interpolator calibration
JP6371111B2 (ja) * 2014-05-16 2018-08-08 ザインエレクトロニクス株式会社 受信装置
US9231631B1 (en) * 2014-06-20 2016-01-05 Altera Corporation Circuits and methods for adjusting the voltage swing of a signal
US9317052B1 (en) * 2014-11-24 2016-04-19 SK Hynix Inc. Semiconductor apparatus with calibration circuit and system including the same
DE102016102696A1 (de) * 2016-02-16 2017-08-17 Infineon Technologies Ag Vorrichtung und Verfahren zur internen Resetsignalerzeugung
CN106505978B (zh) * 2016-09-23 2019-06-18 华为技术有限公司 一种相位内插器及相位内插器的控制器
US9942030B1 (en) 2017-02-02 2018-04-10 International Business Machines Corporation Serial transmitter with feed forward equalizer
US9942028B1 (en) 2017-02-02 2018-04-10 International Business Machines Corporation Serial transmitter with feed forward equalizer and timing calibration
KR101959825B1 (ko) * 2017-10-17 2019-03-19 금오공과대학교 산학협력단 3레벨 전압모드 송신기
KR102598741B1 (ko) * 2018-07-17 2023-11-07 에스케이하이닉스 주식회사 데이터 출력 버퍼
US11276443B2 (en) 2018-10-16 2022-03-15 Micron Technology, Inc. Offset cancellation
TWI741227B (zh) * 2018-11-13 2021-10-01 瑞鼎科技股份有限公司 接收器之輸入偵測電路及其運作方法
US11283436B2 (en) 2019-04-25 2022-03-22 Teradyne, Inc. Parallel path delay line
US10942220B2 (en) 2019-04-25 2021-03-09 Teradyne, Inc. Voltage driver with supply current stabilization
US10761130B1 (en) * 2019-04-25 2020-09-01 Teradyne, Inc. Voltage driver circuit calibration
US11119155B2 (en) 2019-04-25 2021-09-14 Teradyne, Inc. Voltage driver circuit
US11500901B2 (en) 2019-06-28 2022-11-15 Nxp B.V. Apparatuses and methods involving synchronization using data in the data/address field of a communications protocol
US10996950B2 (en) 2019-06-28 2021-05-04 Nxp B.V. Apparatuses and methods involving selective disablement of side effects caused by accessing register sets
US10985759B2 (en) * 2019-06-28 2021-04-20 Nxp B.V. Apparatuses and methods involving a segmented source-series terminated line driver
US10999097B2 (en) 2019-06-28 2021-05-04 Nxp B.V. Apparatuses and methods involving first type of transaction registers mapped to second type of transaction addresses
US11010323B2 (en) 2019-06-28 2021-05-18 Nxp B.V. Apparatuses and methods involving disabling address pointers
US20210408786A1 (en) * 2020-06-30 2021-12-30 Qualcomm Incorporated Circuit techniques for enhanced electrostatic discharge (esd) robustness
US11349481B1 (en) 2021-02-19 2022-05-31 Skyechip Sdn Bhd I/O transmitter circuitry for supporting multi-modes serialization
KR102915284B1 (ko) * 2021-03-12 2026-01-22 에스케이하이닉스 주식회사 데이터 저장 장치 및 이를 위한 인터페이스 회로
US11750188B2 (en) * 2021-08-30 2023-09-05 Micron Technology, Inc. Output driver with strength matched power gating

Family Cites Families (130)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5982210A (en) 1994-09-02 1999-11-09 Sun Microsystems, Inc. PLL system clock generator with instantaneous clock frequency shifting
KR0138327B1 (ko) 1994-12-19 1998-06-15 김광호 데이타 전송장치
JP3712476B2 (ja) 1996-10-02 2005-11-02 富士通株式会社 信号伝送システム及び半導体装置
US6870419B1 (en) 1997-08-29 2005-03-22 Rambus Inc. Memory system including a memory device having a controlled output driver characteristic
US6560290B2 (en) * 1998-01-20 2003-05-06 Silicon Image, Inc. CMOS driver and on-chip termination for gigabaud speed data communication
US6397042B1 (en) * 1998-03-06 2002-05-28 Texas Instruments Incorporated Self test of an electronic device
US6377575B1 (en) 1998-08-05 2002-04-23 Vitesse Semiconductor Corporation High speed cross point switch routing circuit with word-synchronous serial back plane
US6288563B1 (en) * 1998-12-31 2001-09-11 Intel Corporation Slew rate control
US6826390B1 (en) * 1999-07-14 2004-11-30 Fujitsu Limited Receiver, transceiver circuit, signal transmission method, and signal transmission system
US7209178B1 (en) * 1999-09-21 2007-04-24 Samsung Electronics, Co., Ltd. Optical transfer system having a transmitter and a receiver
US6646953B1 (en) * 2000-07-06 2003-11-11 Rambus Inc. Single-clock, strobeless signaling system
US6321282B1 (en) * 1999-10-19 2001-11-20 Rambus Inc. Apparatus and method for topography dependent signaling
US6901126B1 (en) * 2000-06-30 2005-05-31 Texas Instruments Incorporated Time division multiplex data recovery system using close loop phase and delay locked loop
US6718473B1 (en) 2000-09-26 2004-04-06 Sun Microsystems, Inc. Method and apparatus for reducing power consumption
DE10064928A1 (de) * 2000-12-23 2002-07-04 Alcatel Sa Verfahren, Taktgebermodul und Empfängermodul zur Synchronisierung eines Empfängermoduls
US6748469B1 (en) 2001-01-31 2004-06-08 Lsi Logic Corporation Parallel/serial SCSI with legacy support
US6792494B2 (en) 2001-03-30 2004-09-14 Intel Corporation Apparatus and method for parallel and serial PCI hot plug signals
US6859107B1 (en) * 2001-09-05 2005-02-22 Silicon Image, Inc. Frequency comparator with hysteresis between locked and unlocked conditions
US6920183B2 (en) * 2001-09-26 2005-07-19 Intel Corporation Crosstalk equalization for input-output driver circuits
US6845420B2 (en) 2001-10-11 2005-01-18 International Business Machines Corporation System for supporting both serial and parallel storage devices on a connector
KR100744109B1 (ko) * 2001-10-23 2007-08-01 삼성전자주식회사 공정, 전압 및 온도의 변화에 따라 단자들의 상태를최적으로 변화시킬 수 있는 메모리 장치
US7069464B2 (en) 2001-11-21 2006-06-27 Interdigital Technology Corporation Hybrid parallel/serial bus interface
JP3667690B2 (ja) * 2001-12-19 2005-07-06 エルピーダメモリ株式会社 出力バッファ回路及び半導体集積回路装置
US7036032B2 (en) 2002-01-04 2006-04-25 Ati Technologies, Inc. System for reduced power consumption by phase locked loop and method thereof
US6952123B2 (en) * 2002-03-22 2005-10-04 Rambus Inc. System with dual rail regulated locked loop
US7191371B2 (en) * 2002-04-09 2007-03-13 Internatioanl Business Machines Corporation System and method for sequential testing of high speed serial link core
KR100422451B1 (ko) * 2002-05-24 2004-03-11 삼성전자주식회사 온-다이 터미네이션 제어방법 및 그에 따른 제어회로
JP2004013979A (ja) * 2002-06-05 2004-01-15 Elpida Memory Inc 半導体装置
US8861667B1 (en) * 2002-07-12 2014-10-14 Rambus Inc. Clock data recovery circuit with equalizer clock calibration
DE60334866D1 (de) * 2002-07-17 2010-12-16 Chronologic Pty Ltd Synchronisierter Multikanal-USB
US7155617B2 (en) 2002-08-01 2006-12-26 Texas Instruments Incorporated Methods and systems for performing dynamic power management via frequency and voltage scaling
JP4159415B2 (ja) * 2002-08-23 2008-10-01 エルピーダメモリ株式会社 メモリモジュール及びメモリシステム
US8230114B2 (en) * 2002-08-07 2012-07-24 Broadcom Corporation System and method for implementing a single chip having a multiple sub-layer PHY
US20040098545A1 (en) 2002-11-15 2004-05-20 Pline Steven L. Transferring data in selectable transfer modes
US6677793B1 (en) * 2003-02-03 2004-01-13 Lsi Logic Corporation Automatic delay matching circuit for data serializer
KR100917009B1 (ko) 2003-02-10 2009-09-10 삼성전자주식회사 트랜지스터의 구동 방법과 쉬프트 레지스터의 구동 방법및 이를 수행하기 위한 쉬프트 레지스터
KR100614638B1 (ko) 2003-02-26 2006-08-23 삼성전자주식회사 고속의 무선 통신에 적합한 하이브리드형 직렬 주변 장치 인터페이스 회로 및 그 방법
US7126378B2 (en) * 2003-12-17 2006-10-24 Rambus, Inc. High speed signaling system with adaptive transmit pre-emphasis
US7447278B2 (en) * 2003-05-21 2008-11-04 International Business Machines Corporation Apparatus for transmitting and receiving data
US7970003B2 (en) 2003-05-30 2011-06-28 General Dynamics Advanced Information Systems Inc. Low power telemetry system and method
US7133648B1 (en) * 2003-06-03 2006-11-07 Xilinx, Inc. Bidirectional multi-gigabit transceiver
US6930507B2 (en) * 2003-07-10 2005-08-16 International Business Machines Corporation Thevenins receiver
US6924660B2 (en) 2003-09-08 2005-08-02 Rambus Inc. Calibration methods and circuits for optimized on-die termination
KR100767739B1 (ko) * 2003-09-09 2007-10-17 가부시키가이샤 아드반테스트 비교 회로, 캘리브레이션 장치, 시험 장치 및 캘리브레이션 방법
US7224951B1 (en) * 2003-09-11 2007-05-29 Xilinx, Inc. PMA RX in coarse loop for high speed sampling
US7406118B2 (en) * 2003-09-11 2008-07-29 Xilinx, Inc. Programmable logic device including programmable multi-gigabit transceivers
US7089444B1 (en) 2003-09-24 2006-08-08 Altera Corporation Clock and data recovery circuits
JP4086757B2 (ja) * 2003-10-23 2008-05-14 Necエレクトロニクス株式会社 半導体集積回路の入出力インターフェース回路
US7308058B2 (en) * 2003-10-27 2007-12-11 Rambus Inc. Transparent multi-mode PAM interface
US6996749B1 (en) 2003-11-13 2006-02-07 Intel Coporation Method and apparatus for providing debug functionality in a buffered memory channel
US7555048B1 (en) * 2003-11-24 2009-06-30 Neascape, Inc. High-speed single-ended interface
US7233164B2 (en) * 2003-12-17 2007-06-19 Rambus Inc. Offset cancellation in a multi-level signaling system
JP2005223829A (ja) 2004-02-09 2005-08-18 Nec Electronics Corp 分数分周回路及びこれを用いたデータ伝送装置
US7042258B2 (en) 2004-04-29 2006-05-09 Agere Systems Inc. Signal generator with selectable mode control
US7496774B2 (en) 2004-06-04 2009-02-24 Broadcom Corporation Method and system for generating clocks for standby mode operation in a mobile communication device
US7529329B2 (en) * 2004-08-10 2009-05-05 Applied Micro Circuits Corporation Circuit for adaptive sampling edge position control and a method therefor
KR100643605B1 (ko) * 2004-08-16 2006-11-10 삼성전자주식회사 적응형 프리 엠퍼시스 장치, 데이터 통신용 송신기,데이터 통신용 송수신 장치 및 적응형 프리 엠퍼시스 방법
US7254797B2 (en) * 2004-09-30 2007-08-07 Rambus Inc. Input/output cells with localized clock routing
EP1856869B1 (en) * 2005-01-20 2017-09-13 Rambus Inc. High-speed signaling systems with adaptable pre-emphasis and equalization
US7130226B2 (en) 2005-02-09 2006-10-31 Micron Technology, Inc. Clock generating circuit with multiple modes of operation
US7102446B1 (en) * 2005-02-11 2006-09-05 Silicon Image, Inc. Phase lock loop with coarse control loop having frequency lock detector and device including same
JP2006238309A (ja) 2005-02-28 2006-09-07 Kawasaki Microelectronics Kk 半導体集積回路
JP4428272B2 (ja) 2005-03-28 2010-03-10 セイコーエプソン株式会社 表示ドライバ及び電子機器
ATE490472T1 (de) * 2005-04-12 2010-12-15 Analog Devices Inc Selbstprüfungsschaltung für integrierte schaltungen von multimediaschnittstellen mit hoher auflösung
US7505512B1 (en) * 2005-05-05 2009-03-17 Xilinx , Inc. Method and apparatus for combining statistical eye channel compliance methods with linear continuous-time equalization
JP4832020B2 (ja) * 2005-07-28 2011-12-07 ルネサスエレクトロニクス株式会社 プリエンファシス回路
JP2007036869A (ja) * 2005-07-28 2007-02-08 Nec Electronics Corp シリアルパラレル変換、パラレルシリアル変換、fifo一体回路
KR100795724B1 (ko) * 2005-08-24 2008-01-17 삼성전자주식회사 아이 사이즈 측정 회로, 데이터 통신 시스템의 수신기 및아이 사이즈 측정 방법
US7307447B2 (en) * 2005-10-27 2007-12-11 International Business Machines Corporation Self series terminated serial link transmitter having segmentation for amplitude, pre-emphasis, and slew rate control and voltage regulation for amplitude accuracy and high voltage protection
TWI323080B (en) 2005-11-10 2010-04-01 Via Tech Inc Dual-function driver
US7450535B2 (en) * 2005-12-01 2008-11-11 Rambus Inc. Pulsed signaling multiplexer
JP2007155587A (ja) * 2005-12-07 2007-06-21 Nec Electronics Corp 通信装置
US8570881B2 (en) 2006-03-28 2013-10-29 Advanced Micro Devices, Inc. Transmitter voltage and receiver time margining
US7501851B2 (en) * 2006-05-26 2009-03-10 Pmc Sierra Inc. Configurable voltage mode transmitted architecture with common-mode adjustment and novel pre-emphasis
US7643849B2 (en) 2006-05-30 2010-01-05 Pixart Imaging Inc. Cellular phone data communication system wherein a parallel interfaced baseband module and a serial interfaced multimedia module are coupled to one another using a parallel/serial conversion module
JP2008092285A (ja) 2006-10-02 2008-04-17 Nec Corp 移動通信端末及びその制御方法
US20080123792A1 (en) * 2006-11-27 2008-05-29 Edoardo Prete Apparatus and method for transmitting signals over a signal line
US8208815B1 (en) * 2006-11-30 2012-06-26 Marvell International Ltd. Bit accurate upstream burst transmission phase method for reducing burst data arrival variation
US7949041B2 (en) 2006-12-05 2011-05-24 Rambus Inc. Methods and circuits for asymmetric distribution of channel equalization between devices
US7898288B2 (en) * 2006-12-07 2011-03-01 Integrated Device Technology, Inc. Input termination for delay locked loop feedback with impedance matching
WO2008076700A2 (en) 2006-12-13 2008-06-26 Rambus Inc. Interface with variable data rate
US7624297B2 (en) * 2006-12-13 2009-11-24 International Business Machines Corporation Architecture for a physical interface of a high speed front side bus
KR101300659B1 (ko) * 2007-01-19 2013-08-30 삼성전자주식회사 등화기를 갖는 수신기 및 그것의 등화방법
ATE510225T1 (de) * 2007-03-20 2011-06-15 Rambus Inc Integrierte schaltung mit empfängerjittertoleranzmessung
US7692447B2 (en) 2007-05-18 2010-04-06 International Business Machines Corporation Driver circuit
US8553752B2 (en) 2007-05-24 2013-10-08 Rambus Inc. Method and apparatus for determining a calibration signal
JP2008301337A (ja) * 2007-06-01 2008-12-11 Nec Electronics Corp 入出力回路
US8275027B2 (en) 2007-06-12 2012-09-25 The Board Of Trustees Of The Leland Stanford Junior University Multi-mode transmitter
US7890788B2 (en) * 2007-07-09 2011-02-15 John Yin Clock data recovery and synchronization in interconnected devices
KR100853480B1 (ko) * 2007-07-12 2008-08-21 주식회사 하이닉스반도체 온 다이 터미네이션 회로를 포함하는 반도체메모리소자
US8279976B2 (en) * 2007-10-30 2012-10-02 Rambus Inc. Signaling with superimposed differential-mode and common-mode signals
DE102007054307A1 (de) 2007-11-08 2009-05-20 Siemens Ag Verfahren und Vorrichtung zum Durchführen einer Frequenzanalyse eines Wechselspannungssignals, insbesondere an einer Versorgungsnetzleitung
US7619448B2 (en) 2007-12-17 2009-11-17 Omnivision Technologies, Inc. Replica bias circuit for high speed low voltage common mode driver
KR100936445B1 (ko) 2008-01-11 2010-01-13 한국과학기술원 고속 직렬-병렬 변환시스템 및 방법
JP4434289B2 (ja) 2008-03-19 2010-03-17 セイコーエプソン株式会社 集積回路装置、電気光学装置及び電子機器
KR100897302B1 (ko) 2008-04-10 2009-05-14 주식회사 하이닉스반도체 데이터 라인 터미네이션 회로
US8880928B2 (en) 2008-04-11 2014-11-04 Thinklogical, Llc Multirate transmission system and method for parallel input data
US20090289668A1 (en) 2008-05-23 2009-11-26 Arm Limited Output driver circuit for an integrated circuit
US7961532B2 (en) 2008-06-27 2011-06-14 Rambus Inc. Bimodal memory controller
US8135100B2 (en) * 2008-08-20 2012-03-13 International Business Machines Corporation Adaptive clock and equalization control systems and methods for data receivers in communications systems
JP4683093B2 (ja) * 2008-08-29 2011-05-11 ソニー株式会社 情報処理装置、信号伝送方法、及び復号方法
KR100937951B1 (ko) * 2008-09-05 2010-01-21 주식회사 하이닉스반도체 캘리브래이션 회로, 온 다이 터미네이션 장치 및 반도체 메모리 장치
KR20100043971A (ko) 2008-10-21 2010-04-29 삼성전자주식회사 출력신호의 전압 스윙을 조절할 수 있는 출력 회로, 이를 포함하는 반도체 장치, 및 반도체 장치들을 포함하는 통신 시스템
US8051228B2 (en) * 2008-11-13 2011-11-01 International Business Machines Corporation Physical interface macros (PHYS) supporting heterogeneous electrical properties
US7782113B2 (en) 2008-11-24 2010-08-24 United Microelectronics Corp. Level shifter adaptive for use in a power-saving operation mode
US20100157644A1 (en) 2008-12-19 2010-06-24 Unity Semiconductor Corporation Configurable memory interface to provide serial and parallel access to memories
US7919984B2 (en) 2008-12-31 2011-04-05 Intel Corporation System and apparatus of reconfigurable transceiver design for multi-mode signaling
EP2351037A4 (en) * 2009-01-12 2011-12-28 Rambus Inc MESOCHRONIC SIGNALING SYSTEM WITH CORE ACTIVE SYNCHRONIZATION
US8395446B1 (en) * 2009-01-31 2013-03-12 Xilinx, Inc. Dual-mode amplifier
US8102784B1 (en) * 2009-02-18 2012-01-24 Dust Networks, Inc. Localization in a network
US8878792B2 (en) * 2009-08-13 2014-11-04 Samsung Electronics Co., Ltd. Clock and data recovery circuit of a source driver and a display device
US8253440B2 (en) 2009-08-31 2012-08-28 Intel Corporation Methods and systems to calibrate push-pull drivers
US8222925B2 (en) 2009-09-29 2012-07-17 Ralink Technology Corp. Multimode Ethernet line driver
US8510487B2 (en) 2010-02-11 2013-08-13 Silicon Image, Inc. Hybrid interface for serial and parallel communication
US8626474B2 (en) * 2010-04-19 2014-01-07 Altera Corporation Simulation tool for high-speed communications links
CA2752316C (en) * 2010-09-13 2015-10-27 Afshin Rezayee Decision feedback equalizer and transceiver
CN102064927B (zh) * 2010-09-21 2013-11-13 四川和芯微电子股份有限公司 时序纠错系统及方法
US8446173B1 (en) * 2010-11-03 2013-05-21 Pmc-Sierra, Inc. Scalable high-swing transmitter with rise and/or fall time mismatch compensation
US8578222B2 (en) * 2011-02-17 2013-11-05 Qualcomm Incorporated SerDes power throttling as a function of detected error rate
US8593885B2 (en) * 2011-03-18 2013-11-26 Rambus Inc. Staggered mode transitions in a segmented interface
US8930647B1 (en) * 2011-04-06 2015-01-06 P4tents1, LLC Multiple class memory systems
US8416001B2 (en) * 2011-04-08 2013-04-09 Altera Corporation Techniques for reducing duty cycle distortion in periodic signals
US8565047B2 (en) * 2011-04-28 2013-10-22 Lsi Corporation Systems and methods for data write loopback based timing control
JP5930025B2 (ja) * 2011-05-25 2016-06-08 ザ シラナ グループ プロプライエタリー リミテッドThe Silanna Group Pty Ltd Usb2.0高速モードを有するusbアイソレータ集積回路および自動速度検出
US8415980B2 (en) * 2011-06-28 2013-04-09 Microsoft Corporation Serializing transmitter
US8832487B2 (en) * 2011-06-28 2014-09-09 Microsoft Corporation High-speed I/O data system
US9417687B2 (en) * 2011-07-12 2016-08-16 Rambus Inc. Dynamically changing data access bandwidth by selectively enabling and disabling data links
US8705605B1 (en) * 2011-11-03 2014-04-22 Altera Corporation Technique for providing loopback testing with single stage equalizer
US8520348B2 (en) * 2011-12-22 2013-08-27 Lsi Corporation High-swing differential driver using low-voltage transistors
US8779819B1 (en) * 2012-04-30 2014-07-15 Pmc-Sierra Us, Inc. Transmitter output impedance calibration for output rise and fall time equalization and edge rate control

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11392163B1 (en) * 2021-09-23 2022-07-19 Apple Inc. On-chip supply ripple tolerant clock distribution
US11586240B1 (en) 2021-09-23 2023-02-21 Apple Inc. On-chip supply ripple tolerant clock distribution

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