JP2014501045A - 集積回路の水素パッシベーション - Google Patents

集積回路の水素パッシベーション Download PDF

Info

Publication number
JP2014501045A
JP2014501045A JP2013543143A JP2013543143A JP2014501045A JP 2014501045 A JP2014501045 A JP 2014501045A JP 2013543143 A JP2013543143 A JP 2013543143A JP 2013543143 A JP2013543143 A JP 2013543143A JP 2014501045 A JP2014501045 A JP 2014501045A
Authority
JP
Japan
Prior art keywords
integrated circuit
layer
hydrogen
passivation
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2013543143A
Other languages
English (en)
Japanese (ja)
Other versions
JP2014501045A5 (https=
Inventor
バハル バシム グル
アール サマーフェルト スコット
エス モイーズ テッド
Original Assignee
日本テキサス・インスツルメンツ株式会社
テキサス インスツルメンツ インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本テキサス・インスツルメンツ株式会社, テキサス インスツルメンツ インコーポレイテッド filed Critical 日本テキサス・インスツルメンツ株式会社
Publication of JP2014501045A publication Critical patent/JP2014501045A/ja
Publication of JP2014501045A5 publication Critical patent/JP2014501045A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/075—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers of multilayered thin functional dielectric layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01338—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
JP2013543143A 2010-12-09 2010-12-09 集積回路の水素パッシベーション Pending JP2014501045A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2010/059722 WO2012078163A1 (en) 2010-12-09 2010-12-09 Hydrogen passivation of integrated circuits

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2016196116A Division JP6351079B2 (ja) 2016-10-04 2016-10-04 集積回路の水素パッシベーション

Publications (2)

Publication Number Publication Date
JP2014501045A true JP2014501045A (ja) 2014-01-16
JP2014501045A5 JP2014501045A5 (https=) 2014-02-27

Family

ID=46207422

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013543143A Pending JP2014501045A (ja) 2010-12-09 2010-12-09 集積回路の水素パッシベーション

Country Status (3)

Country Link
JP (1) JP2014501045A (https=)
CN (1) CN103262223A (https=)
WO (1) WO2012078163A1 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102013218494B4 (de) * 2013-09-16 2021-06-02 Infineon Technologies Ag Halbleiterbauelement mit einer Passivierungsschicht und Herstellungsverfahren
TWI548000B (zh) * 2014-12-22 2016-09-01 力晶科技股份有限公司 半導體元件及其製作方法
JP6468886B2 (ja) * 2015-03-02 2019-02-13 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
KR101914039B1 (ko) * 2017-02-03 2018-11-01 주식회사 에이치피에스피 반도체 열처리방법
US11508584B2 (en) * 2019-06-17 2022-11-22 Applied Materials, Inc. Deuterium-containing films

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0845926A (ja) * 1994-07-26 1996-02-16 Sony Corp 半導体装置およびその製造方法
JP2002016249A (ja) * 2000-06-30 2002-01-18 Toshiba Corp 半導体装置及びその製造方法
JP2003224206A (ja) * 2002-01-29 2003-08-08 Fujitsu Ltd 半導体装置及びその製造方法
JP2008210869A (ja) * 2007-02-23 2008-09-11 Canon Inc 光電変換装置の製造方法
JP2009289919A (ja) * 2008-05-28 2009-12-10 Fujitsu Microelectronics Ltd 半導体装置とその製造方法
US20100022961A1 (en) * 2006-06-23 2010-01-28 Jentec , Inc. Superthin wound dressing having folded release sheet
JP2010093064A (ja) * 2008-10-08 2010-04-22 Panasonic Corp 半導体装置及びその製造方法
US20100224961A1 (en) * 2009-03-06 2010-09-09 Texas Instruments Incorporated Passivation of integrated circuits containing ferroelectric capacitors and hydrogen barriers

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6781184B2 (en) * 2001-11-29 2004-08-24 Symetrix Corporation Barrier layers for protecting metal oxides from hydrogen degradation
JP2007150025A (ja) * 2005-11-29 2007-06-14 Seiko Epson Corp 強誘電体メモリの製造方法
US7985603B2 (en) * 2008-02-04 2011-07-26 Texas Instruments Incorporated Ferroelectric capacitor manufacturing process

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0845926A (ja) * 1994-07-26 1996-02-16 Sony Corp 半導体装置およびその製造方法
JP2002016249A (ja) * 2000-06-30 2002-01-18 Toshiba Corp 半導体装置及びその製造方法
JP2003224206A (ja) * 2002-01-29 2003-08-08 Fujitsu Ltd 半導体装置及びその製造方法
US20100022961A1 (en) * 2006-06-23 2010-01-28 Jentec , Inc. Superthin wound dressing having folded release sheet
JP2008210869A (ja) * 2007-02-23 2008-09-11 Canon Inc 光電変換装置の製造方法
JP2009289919A (ja) * 2008-05-28 2009-12-10 Fujitsu Microelectronics Ltd 半導体装置とその製造方法
JP2010093064A (ja) * 2008-10-08 2010-04-22 Panasonic Corp 半導体装置及びその製造方法
US20100224961A1 (en) * 2009-03-06 2010-09-09 Texas Instruments Incorporated Passivation of integrated circuits containing ferroelectric capacitors and hydrogen barriers

Also Published As

Publication number Publication date
WO2012078163A1 (en) 2012-06-14
CN103262223A (zh) 2013-08-21

Similar Documents

Publication Publication Date Title
US9218981B2 (en) Hydrogen passivation of integrated circuits
KR100563748B1 (ko) 반도체소자의제조방법
US6444592B1 (en) Interfacial oxidation process for high-k gate dielectric process integration
TWI744690B (zh) 電晶體結構及形成半導體結構的方法
CN100416859C (zh) 形成具有高迁移率的金属/高k值栅叠层的方法
US20080296704A1 (en) Semiconductor device and manufacturing method thereof
US11164957B2 (en) Semiconductor device with adhesion layer and method of making
CN106356331A (zh) 钴互连件技术
US12400861B2 (en) Semiconductor device and method of manufacturing
JP2014501045A (ja) 集積回路の水素パッシベーション
JP2006518106A (ja) 互いに重ねて堆積させた金属層の積層体中に形成されたゲート電極を含むｍｏｓトランジスタを備える半導体デバイスの製造方法
US7476916B2 (en) Semiconductor device having a mis-type fet, and methods for manufacturing the same and forming a metal oxide film
JP2014502783A (ja) 水素障壁で封止された強誘電性キャパシタ
KR20210102465A (ko) 막의 유효 산화물 두께를 수정하기 위한 수소화 및 질화 프로세스들
US20100001353A1 (en) SANOS Memory Cell Structure
JP6351079B2 (ja) 集積回路の水素パッシベーション
Hussain et al. Metal wet etch issues and effects in dual metal gate stack integration
US20090039441A1 (en) Mosfet with metal gate electrode
US10453797B2 (en) Interconnection structures and fabrication methods thereof
US9412861B2 (en) Semiconductor device having structure capable of suppressing oxygen diffusion and method of manufacturing the same
US20070267706A1 (en) Formation of low leakage thermally assisted radical nitrided dielectrics
JP3833956B2 (ja) 半導体装置の製造方法及び半導体装置
JP2006073704A (ja) 半導体装置の製造方法
Yoon et al. Hydrogen-induced damage during the plasma etching process
JPH11176959A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20131204

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20131204

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20150331

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20150525

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20150730

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20150827

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20160405

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20160705

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20160905

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20161005

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20161206

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20170413