JP2013527550A5 - - Google Patents

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Publication number
JP2013527550A5
JP2013527550A5 JP2013506425A JP2013506425A JP2013527550A5 JP 2013527550 A5 JP2013527550 A5 JP 2013527550A5 JP 2013506425 A JP2013506425 A JP 2013506425A JP 2013506425 A JP2013506425 A JP 2013506425A JP 2013527550 A5 JP2013527550 A5 JP 2013527550A5
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JP
Japan
Prior art keywords
cells
block
pcm
memory
adjacent
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JP2013506425A
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English (en)
Japanese (ja)
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JP2013527550A (ja
JP5602941B2 (ja
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Priority claimed from PCT/CA2011/050136 external-priority patent/WO2011134079A1/en
Publication of JP2013527550A publication Critical patent/JP2013527550A/ja
Publication of JP2013527550A5 publication Critical patent/JP2013527550A5/ja
Application granted granted Critical
Publication of JP5602941B2 publication Critical patent/JP5602941B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2013506425A 2010-04-27 2011-03-10 １つおきの選択を伴う相変化メモリアレイブロック Expired - Fee Related JP5602941B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US32842110P 2010-04-27 2010-04-27
US61/328,421 2010-04-27
PCT/CA2011/050136 WO2011134079A1 (en) 2010-04-27 2011-03-10 Phase change memory array blocks with alternate selection

Publications (3)

Publication Number Publication Date
JP2013527550A JP2013527550A (ja) 2013-06-27
JP2013527550A5 true JP2013527550A5 (enExample) 2014-02-13
JP5602941B2 JP5602941B2 (ja) 2014-10-08

Family

ID=44815698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013506425A Expired - Fee Related JP5602941B2 (ja) 2010-04-27 2011-03-10 １つおきの選択を伴う相変化メモリアレイブロック

Country Status (8)

Country Link
US (1) US20110261613A1 (enExample)
EP (1) EP2564391A4 (enExample)
JP (1) JP5602941B2 (enExample)
KR (1) KR20130107199A (enExample)
CN (1) CN102859603A (enExample)
CA (1) CA2793927A1 (enExample)
TW (1) TW201203250A (enExample)
WO (1) WO2011134079A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014039329A1 (en) 2012-09-07 2014-03-13 Being Advanced Memory Corporation Systems, methods, and devices with write optimization in phase change memory
US8913425B2 (en) 2013-03-12 2014-12-16 Intel Corporation Phase change memory mask
KR102218531B1 (ko) * 2015-01-29 2021-02-23 삼성디스플레이 주식회사 데이터 보상기 및 이를 포함하는 표시 장치
KR102493814B1 (ko) * 2016-06-29 2023-02-02 에스케이하이닉스 주식회사 메모리 장치
KR20180047835A (ko) * 2016-11-01 2018-05-10 에스케이하이닉스 주식회사 저항성 메모리 장치
KR102771664B1 (ko) * 2016-11-23 2025-02-25 에스케이하이닉스 주식회사 피크 커런트 분산이 가능한 상변화 메모리 장치
US10580491B2 (en) * 2018-03-23 2020-03-03 Silicon Storage Technology, Inc. System and method for managing peak power demand and noise in non-volatile memory array
US10867661B2 (en) 2019-04-30 2020-12-15 Micron Technology, Inc. Main word line driver circuit
US10910049B2 (en) * 2019-04-30 2021-02-02 Micron Technology, Inc. Sub-word line driver circuit
US11183236B2 (en) 2019-07-31 2021-11-23 Taiwan Semiconductor Manufacturing Company, Ltd. Memory cell with built-in amplifying function, memory device and method using the same
US12456510B2 (en) * 2021-12-20 2025-10-28 Micron Technology, Inc. Memory device control schemes, and associated methods, devices, and systems

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6163495A (en) * 1999-09-17 2000-12-19 Cypress Semiconductor Corp. Architecture, method(s) and circuitry for low power memories
JP4540352B2 (ja) * 2003-09-12 2010-09-08 ルネサスエレクトロニクス株式会社 記憶装置
KR100597636B1 (ko) * 2004-06-08 2006-07-05 삼성전자주식회사 상 변화 반도체 메모리 장치
KR100630744B1 (ko) * 2005-03-21 2006-10-02 삼성전자주식회사 워드라인 구동회로의 레이아웃 면적을 감소시킨 반도체메모리 장치
KR100699848B1 (ko) * 2005-06-21 2007-03-27 삼성전자주식회사 코어 구조가 개선된 상 변화 메모리 장치
KR100735525B1 (ko) * 2006-01-04 2007-07-04 삼성전자주식회사 상변화 메모리 장치
JP2007201081A (ja) * 2006-01-25 2007-08-09 Elpida Memory Inc 半導体記憶装置
KR100719383B1 (ko) * 2006-04-12 2007-05-18 삼성전자주식회사 멀티 프로그램 방법을 사용하는 상 변화 메모리 장치
US7525866B2 (en) * 2006-04-19 2009-04-28 Freescale Semiconductor, Inc. Memory circuit
US7450414B2 (en) * 2006-07-31 2008-11-11 Sandisk 3D Llc Method for using a mixed-use memory array
US8009476B2 (en) * 2006-09-19 2011-08-30 Samsung Electronics Co., Ltd. Semiconductor memory device using variable resistor
KR101258983B1 (ko) * 2006-09-19 2013-04-29 삼성전자주식회사 가변저항 소자를 이용한 반도체 메모리 장치 및 그 동작방법
KR100909627B1 (ko) * 2007-10-10 2009-07-27 주식회사 하이닉스반도체 플래시 메모리소자
KR101317754B1 (ko) * 2007-10-12 2013-10-11 삼성전자주식회사 상 변화 메모리 장치
JP5222619B2 (ja) * 2008-05-02 2013-06-26 株式会社日立製作所 半導体装置
KR20090117189A (ko) * 2008-05-09 2009-11-12 삼성전자주식회사 멀티 라이트를 위한 효율적인 코아 구조를 갖는 반도체메모리 장치
JP2010044827A (ja) * 2008-08-13 2010-02-25 Toshiba Corp 不揮発性半導体記憶装置

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