JP2006155710A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2006155710A5 JP2006155710A5 JP2004341880A JP2004341880A JP2006155710A5 JP 2006155710 A5 JP2006155710 A5 JP 2006155710A5 JP 2004341880 A JP2004341880 A JP 2004341880A JP 2004341880 A JP2004341880 A JP 2004341880A JP 2006155710 A5 JP2006155710 A5 JP 2006155710A5
- Authority
- JP
- Japan
- Prior art keywords
- data storage
- data
- memory device
- semiconductor memory
- selection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000013500 data storage Methods 0.000 claims 25
- 210000000352 storage cell Anatomy 0.000 claims 25
- 239000004065 semiconductor Substances 0.000 claims 21
- 210000004027 cell Anatomy 0.000 claims 12
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004341880A JP4646608B2 (ja) | 2004-11-26 | 2004-11-26 | 半導体記憶装置 |
| US11/272,818 US7200025B2 (en) | 2004-11-26 | 2005-11-15 | Semiconductor memory device |
| CNB2005101236898A CN100570740C (zh) | 2004-11-26 | 2005-11-18 | 半导体存储装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004341880A JP4646608B2 (ja) | 2004-11-26 | 2004-11-26 | 半導体記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006155710A JP2006155710A (ja) | 2006-06-15 |
| JP2006155710A5 true JP2006155710A5 (enExample) | 2007-12-27 |
| JP4646608B2 JP4646608B2 (ja) | 2011-03-09 |
Family
ID=36567208
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004341880A Expired - Fee Related JP4646608B2 (ja) | 2004-11-26 | 2004-11-26 | 半導体記憶装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7200025B2 (enExample) |
| JP (1) | JP4646608B2 (enExample) |
| CN (1) | CN100570740C (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4679521B2 (ja) * | 2004-07-21 | 2011-04-27 | パナソニック株式会社 | 半導体記憶装置、書き換え処理方法およびプログラム |
| JP5028967B2 (ja) * | 2006-11-15 | 2012-09-19 | 富士通セミコンダクター株式会社 | 半導体記憶装置および半導体記憶装置の制御方法 |
| US7515498B2 (en) * | 2007-02-13 | 2009-04-07 | International Business Machines Corporation | Electronic fuse apparatus and methodology including addressable virtual electronic fuses |
| JP2009087453A (ja) * | 2007-09-28 | 2009-04-23 | Sanyo Electric Co Ltd | 情報記憶回路 |
| US8275927B2 (en) * | 2007-12-31 | 2012-09-25 | Sandisk 3D Llc | Storage sub-system for a computer comprising write-once memory devices and write-many memory devices and related method |
| JP2010146636A (ja) * | 2008-12-18 | 2010-07-01 | Toshiba Corp | 半導体集積回路装置及びメモリシステム |
| KR20100079185A (ko) * | 2008-12-30 | 2010-07-08 | 주식회사 동부하이텍 | 퓨즈 회로 및 그의 레이아웃 방법 |
| KR101185549B1 (ko) * | 2009-12-29 | 2012-09-24 | 에스케이하이닉스 주식회사 | 결함 단위셀의 구제를 위한 리던던시 회로를 포함한 반도체 메모리 장치 |
| US8331126B2 (en) * | 2010-06-28 | 2012-12-11 | Qualcomm Incorporated | Non-volatile memory with split write and read bitlines |
| US10579290B2 (en) | 2016-03-23 | 2020-03-03 | Winbond Electronics Corp. | Option code providing circuit and providing method thereof |
| JP7185573B2 (ja) * | 2019-03-22 | 2022-12-07 | タワー パートナーズ セミコンダクター株式会社 | 半導体装置 |
| US11164610B1 (en) | 2020-06-05 | 2021-11-02 | Qualcomm Incorporated | Memory device with built-in flexible double redundancy |
| US11177010B1 (en) | 2020-07-13 | 2021-11-16 | Qualcomm Incorporated | Bitcell for data redundancy |
| WO2022059176A1 (ja) | 2020-09-18 | 2022-03-24 | タワー パートナーズ セミコンダクター株式会社 | 半導体装置 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63187498A (ja) * | 1987-01-28 | 1988-08-03 | Nec Corp | 複数回プログラム可能読出し専用メモリ装置 |
| JP2654215B2 (ja) * | 1990-01-19 | 1997-09-17 | 株式会社東芝 | 半導体メモリシステム |
| US5966339A (en) * | 1998-06-02 | 1999-10-12 | International Business Machines Corporation | Programmable/reprogrammable fuse |
| US6384664B1 (en) * | 2000-10-05 | 2002-05-07 | Texas Instruments Incorporated | Differential voltage sense circuit to detect the state of a CMOS process compatible fuses at low power supply voltages |
| US6594181B1 (en) * | 2002-05-10 | 2003-07-15 | Fujitsu Limited | System for reading a double-bit memory cell |
| US7002829B2 (en) * | 2003-09-30 | 2006-02-21 | Agere Systems Inc. | Apparatus and method for programming a one-time programmable memory device |
| US7180102B2 (en) * | 2003-09-30 | 2007-02-20 | Agere Systems Inc. | Method and apparatus for using cobalt silicided polycrystalline silicon for a one time programmable non-volatile semiconductor memory |
| US7477570B2 (en) * | 2004-08-20 | 2009-01-13 | Micron Technology, Inc. | Sequential access memory with system and method |
| JP4675082B2 (ja) * | 2004-10-21 | 2011-04-20 | 富士通セミコンダクター株式会社 | 半導体記憶装置および半導体記憶装置の制御方法 |
-
2004
- 2004-11-26 JP JP2004341880A patent/JP4646608B2/ja not_active Expired - Fee Related
-
2005
- 2005-11-15 US US11/272,818 patent/US7200025B2/en not_active Expired - Lifetime
- 2005-11-18 CN CNB2005101236898A patent/CN100570740C/zh not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11621037B2 (en) | Memory with symmetric read current profile | |
| TW200710662A (en) | Micro-tile memory interfaces | |
| ATE373307T1 (de) | Simultaner mehrbank für flash-speicher | |
| JP2005044456A5 (enExample) | ||
| JP2006155710A5 (enExample) | ||
| JP2007272938A5 (enExample) | ||
| TW200710661A (en) | Memory controller interface for micro-tiled memory access | |
| KR900005441A (ko) | 반도체 메모리 회로 | |
| TW200721190A (en) | Semiconductor device | |
| WO2007117969A3 (en) | Fast rasterizer | |
| CN110265073A (zh) | 半导体器件 | |
| US10714161B2 (en) | Semiconductor device | |
| US9576630B2 (en) | Memory devices and methods having multiple address accesses in same cycle | |
| JP2008536250A (ja) | Y−mux分割方法 | |
| JP2010186525A5 (enExample) | ||
| JP2008541333A5 (enExample) | ||
| US9460767B2 (en) | Semiconductor memory device | |
| JP2008084453A5 (enExample) | ||
| TW200636721A (en) | Memory device with pre-fetch circuit and pre-fetch method | |
| US12243586B2 (en) | Method for reading memory | |
| WO2006127117A3 (en) | Storage circuit and method therefor | |
| US20150269980A1 (en) | Semiconductor memory device | |
| JP2004362756A5 (enExample) | ||
| CN111554333A (zh) | 用于存储器架构的解码器结构 | |
| JP2002093175A5 (enExample) |