JP2002093175A5 - - Google Patents
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- Publication number
- JP2002093175A5 JP2002093175A5 JP2000273596A JP2000273596A JP2002093175A5 JP 2002093175 A5 JP2002093175 A5 JP 2002093175A5 JP 2000273596 A JP2000273596 A JP 2000273596A JP 2000273596 A JP2000273596 A JP 2000273596A JP 2002093175 A5 JP2002093175 A5 JP 2002093175A5
- Authority
- JP
- Japan
- Prior art keywords
- echo signal
- memory cell
- cell array
- data
- read
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000273596A JP2002093175A (ja) | 2000-09-08 | 2000-09-08 | 半導体メモリ装置 |
| US09/946,189 US6515938B2 (en) | 2000-09-08 | 2001-09-04 | Semiconductor memory device having an echo signal generating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000273596A JP2002093175A (ja) | 2000-09-08 | 2000-09-08 | 半導体メモリ装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2002093175A JP2002093175A (ja) | 2002-03-29 |
| JP2002093175A5 true JP2002093175A5 (enExample) | 2005-05-19 |
Family
ID=18759507
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000273596A Pending JP2002093175A (ja) | 2000-09-08 | 2000-09-08 | 半導体メモリ装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6515938B2 (enExample) |
| JP (1) | JP2002093175A (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6842395B2 (en) * | 2001-11-05 | 2005-01-11 | Matsushira Electric Industrial Co., Ltd. | Semiconductor memory card, method of controlling the same and interface apparatus for semiconductor memory card |
| KR100915811B1 (ko) * | 2006-12-07 | 2009-09-07 | 주식회사 하이닉스반도체 | 반도체 메모리 장치의 데이터 입출력 제어 신호 생성 회로 |
| JP5562329B2 (ja) * | 2008-07-01 | 2014-07-30 | エルエスアイ コーポレーション | フラッシュ・メモリ・コントローラとフラッシュ・メモリ・アレイの間でインタフェースをとるための方法および装置 |
| JP5266589B2 (ja) * | 2009-05-14 | 2013-08-21 | ルネサスエレクトロニクス株式会社 | 不揮発性半導体記憶装置 |
| US9281024B2 (en) | 2014-04-17 | 2016-03-08 | International Business Machines Corporation | Write/read priority blocking scheme using parallel static address decode path |
| CN112542193B (zh) * | 2020-12-30 | 2023-07-25 | 芯天下技术股份有限公司 | 一种高速读取数据的spi接口的flash存储器 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0214490A (ja) * | 1988-06-30 | 1990-01-18 | Ricoh Co Ltd | 半導体メモリ装置 |
| US5724288A (en) | 1995-08-30 | 1998-03-03 | Micron Technology, Inc. | Data communication for memory |
| KR20010031212A (ko) * | 1997-10-20 | 2001-04-16 | 우에하라 아끼라 | 2-페녹시아닐린 유도체 |
| US5920511A (en) | 1997-12-22 | 1999-07-06 | Samsung Electronics Co., Ltd. | High-speed data input circuit for a synchronous memory device |
| KR100306966B1 (ko) * | 1998-08-04 | 2001-11-30 | 윤종용 | 동기형버스트반도체메모리장치 |
| JP2000228084A (ja) * | 1999-02-05 | 2000-08-15 | Mitsubishi Electric Corp | 電圧発生回路 |
-
2000
- 2000-09-08 JP JP2000273596A patent/JP2002093175A/ja active Pending
-
2001
- 2001-09-04 US US09/946,189 patent/US6515938B2/en not_active Expired - Fee Related
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