JP2013232495A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2013232495A
JP2013232495A JP2012103244A JP2012103244A JP2013232495A JP 2013232495 A JP2013232495 A JP 2013232495A JP 2012103244 A JP2012103244 A JP 2012103244A JP 2012103244 A JP2012103244 A JP 2012103244A JP 2013232495 A JP2013232495 A JP 2013232495A
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Japan
Prior art keywords
heat spreader
heat
semiconductor device
heat spreaders
semiconductor
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Pending
Application number
JP2012103244A
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English (en)
Inventor
Daisuke Murata
大輔 村田
Masao Kikuchi
正雄 菊池
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2012103244A priority Critical patent/JP2013232495A/ja
Priority to US13/742,079 priority patent/US9059128B2/en
Priority to DE102013201056A priority patent/DE102013201056A1/de
Priority to CN201310093077.3A priority patent/CN103378025B/zh
Publication of JP2013232495A publication Critical patent/JP2013232495A/ja
Pending legal-status Critical Current

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Abstract

【課題】熱応力による反りを抑え、信頼性を向上させることができる半導体装置を得る。
【解決手段】ヒートスプレッダ3a〜3fは互いに離間して配置されている。トランジスタ素子1a〜1cがヒートスプレッダ3a〜3c上に実装され、その下面がヒートスプレッダ3a〜3cに接合されている。トランジスタ素子1d〜1fがヒートスプレッダ3d〜3f上に実装され、その下面がヒートスプレッダ3d〜3fに接合されている。モールド樹脂8がヒートスプレッダ3a〜3f及びトランジスタ素子1a〜1fを覆っている。モールド樹脂8よりも高い剛性を有する補強部材9が、モールド樹脂8内においてヒートスプレッダ3a〜3fの間の領域を横切って設けられている。
【選択図】図4

Description

本発明は、自動車や電車等のモータを制御するインバータや発電・回生用コンバータに用いる半導体装置に関する。
ヒートスプレッダ上に半導体素子を実装し、ヒートスプレッダ及び半導体素子を樹脂で封止した半導体装置が用いられている(例えば、特許文献1参照)。
特開2004−165281号公報
互いに離間した2つのヒートスプレッダ上にそれぞれ半導体素子を実装した半導体装置では、2つのヒートスプレッダの間の領域に樹脂が存在している。樹脂とヒートスプレッダの線膨張係数の違いにより、使用時に熱が発生して温度変化がおこると熱応力が発生する。そのため、過剰に冷熱サイクルが加えられた場合には、2つのヒートスプレッダの間の領域から反りが発生する。さらに、樹脂とヒートスプレッダやリードフレームなどの内蔵部材との間で剥離が進行して、信頼性に影響を与えるという問題があった。
本発明は、上述のような課題を解決するためになされたもので、その目的は熱応力による反りを抑え、信頼性を向上させることができる半導体装置を得るものである。
本発明に係る半導体装置は、第1のヒートスプレッダと、前記第1のヒートスプレッダとは離間して配置された第2のヒートスプレッダと、前記第1のヒートスプレッダ上に実装され、下面が前記第1のヒートスプレッダに接合された第1の半導体素子と、前記第2のヒートスプレッダ上に実装され、下面が前記第2のヒートスプレッダに接合された第2の半導体素子と、前記第1及び第2のヒートスプレッダ、及び前記第1及び第2の半導体素子を覆う樹脂と、前記樹脂内において前記第1のヒートスプレッダと前記第2のヒートスプレッダの間の領域を横切って設けられ、前記樹脂よりも高い剛性を有する補強部材とを備えることを特徴とする。
本発明により、熱応力による反りを抑え、信頼性を向上させることができる。
本発明の実施の形態1に係る半導体装置を示す回路図である。 本発明の実施の形態1に係る半導体装置の内部を示す透視上面図である。 本発明の実施の形態1に係る半導体装置の内部(補強部材は省略)を示す透視上面図である。 図2のI−IIに沿った断面図である。 図3のIII−IVに沿った断面図である。 本発明の実施の形態1に係る半導体装置の変形例の内部(補強部材は省略)を示す透視上面図である。 本発明の実施の形態2に係る半導体装置を示す断面図である。 本発明の実施の形態3に係る半導体装置の内部を示す透視上面図である。
本発明の実施の形態に係る半導体装置について図面を参照して説明する。同じ又は対応する構成要素には同じ符号を付し、説明の繰り返しを省略する場合がある。
実施の形態1.
図1は、本発明の実施の形態1に係る半導体装置を示す回路図である。トランジスタ素子1a〜1fとダイオード2a〜2fの6つのペアが3相ハーフブリッジ回路を構成する。U、V、W端子を介して電源からの電力を負荷に供給する。トランジスタ素子1a〜1fは、電源から供給される電流を必要な時間だけ導通する絶縁ゲート型バイポーラトランジスタ(IGBT: Insulated Gate Bipolar Transistor)である。ダイオード2a〜2fは、トランジスタ素子1a〜1fが導通状態から遮断状態になる際に、電流を還流させる。
図2は、本発明の実施の形態1に係る半導体装置の内部を示す透視上面図である。図3は本発明の実施の形態1に係る半導体装置の内部(補強部材は省略)を示す透視上面図である。図4は図2のI−IIに沿った断面図である。
ヒートスプレッダ3a〜3cとヒートスプレッダ3d〜3fが左右に離間して配置されている。ヒートスプレッダ3a〜3fは互いに分離している。トランジスタ素子1a〜1c及びダイオード2a〜2cがヒートスプレッダ3a〜3c上にそれぞれ実装され、それらの下面はヒートスプレッダ3a〜3cにはんだ4で個別に接合されている。トランジスタ素子1d〜1f及びダイオード2d〜2fがヒートスプレッダ3d〜3f上にそれぞれ実装され、それらの下面はヒートスプレッダ3d〜3fにそれぞれはんだ4で個別に接合されている。
互いに分離した配線部材5a〜5cがトランジスタ素子1a〜1c及びダイオード2a〜2cの上面にそれぞれはんだ4で個別に接合されている。配線部材5dがトランジスタ素子1d〜1f及びダイオード2d〜2fの上面にはんだ4で共通に接合されている。なお、はんだ4の代わりに導電性接着剤などを用いてもよい。配線部材5a〜5cはヒートスプレッダ3d〜3fの上面の周縁部にそれぞれ接合されている。互いに分離した配線部材5e〜5gはヒートスプレッダ3a〜3cの上面の周縁部にそれぞれ接合されている。
信号配線6a〜6cはトランジスタ素子1a〜1cの制御端子にそれぞれワイヤ接続されている。信号配線6d〜6fはトランジスタ素子1d〜1fの制御端子にそれぞれワイヤ接続されている。外部との絶縁のために絶縁層7がヒートスプレッダ3d〜3fの下面に設けられている。これらのヒートスプレッダ3a〜3f、トランジスタ素子1a〜1f、ダイオード2a〜2f、配線部材5a〜5gの一部、信号配線6a〜6fの一部、及び絶縁層7の上面及び側面はモールド樹脂8により覆われている。
配線部材5a〜5gは装置外部との電力の授受を担っている。配線部材5a〜5g及び信号配線6a〜6fは、例えばリードフレームのように同一の金属板を打ち抜き又はエッチングして外枠で一体的に連結した状態で形成される。その一部をモールド樹脂8で覆って機械的に保持してから外枠を除去して配線部材5a〜5g及び信号配線6a〜6fを分割する。これにより、数の多い配線部材5a〜5g及び信号配線6a〜6fを一括で組み付けすることができるので、生産性が良く、かつ工業上の価値が高くなる。
本実施の形態では、モールド樹脂8よりも高い剛性を有する補強部材9が、モールド樹脂8内においてヒートスプレッダ3a〜3fの間の領域を横切って設けられている。補強部材9は、トランジスタ素子1a〜1fやダイオード2a〜2fと接することなく、トランジスタ素子1a〜1fやダイオード2a〜2fよりも上方に設けられている。
補強部材9は例えば金属製のプレート部材である。補強部材9が金属部材であれば、モールド樹脂8に対して十分にヤング率が高いため、補強効果を向上できる。また、補強部材9が繊維強化プラスティックのように強化された有機材料、セラミック材料などであれば、軽量化にも好適である。また、補強部材9はプレート形状のみならず、反り上がる際に屈曲を抑制するようなL字、コの字型形状でもよい。
この補強部材9によりヒートスプレッダ3a〜3fの間の領域を補強することにより、当該領域において熱応力により生ずる反りを抑えることができる。この結果、破損を防いで信頼性を向上させることができる。
また、トランジスタ素子1a〜1f、ダイオード2a〜2f、ヒートスプレッダ3a〜3f、配線部材5a〜5g、及び信号配線6a〜6fは、モータなどの負荷を制御するインバータ回路に必要な3相ハーフブリッジ回路を構成する。このように3相ハーフブリッジ回路を1つの半導体装置で構成する場合にはパッケージサイズが大きくなり、反りの問題が顕著になる。しかし、本実施の形態の構成により反り抑えることができるため、信頼性を向上させることができる。
また、配線部材5a〜5cは、ヒートスプレッダ3a〜3cとヒートスプレッダ3d〜3fの間の領域を横切って、トランジスタ素子1a〜1cの上面とヒートスプレッダ3d〜3fをそれぞれ接続する。この配線部材5a〜5cは、電気回路として機能すると共に、当該領域を補強することもできる。従って、部品点数を増やすことなく、熱応力による反りを抑えることができる。この結果、生産性を損なうことなく、信頼性を向上させることができる。
図5は、図3のIII−IVに沿った断面図である。配線部材5a〜5cは平坦な構造でも金属の剛性により補強効果は得られるが、配線部材5a〜5cの一部に上面から下面方向にコの字状の窪み10を設けることで厚み方向の剛性を向上させることができる。窪み10の深さが配線部材5a〜5cの厚みの1.5倍程度であれば加工が可能で十分な補強効果が得られる。なお、配線部材5a〜5cの下面から上面方向に窪み10を設けてもよく、窪み10はコの字状でなくても三角状や半円状でもよい。
図6は、本発明の実施の形態1に係る半導体装置の変形例の内部(補強部材は省略)を示す透視上面図である。トランジスタ素子1a〜1c及びダイオード2a〜2cが1つのヒートスプレッダ3g上に並んで実装され、それらの下面はヒートスプレッダ3aにはんだ4で共通に接合されている。これにより、装置の左側は剛性の高いヒートスプレッダ3gにより支持されている。配線部材5hはヒートスプレッダ3gの上面の周縁部に接合されている。
このように同電位のヒートスプレッダ3a〜3cを1つのヒートスプレッダ3gにまとめることでヒートスプレッダ3gの長手方向のパッケージの反りを低減することができる。また、部品点数を低減することもでき、アセンブリを簡略化することができる。なお、ヒートスプレッダ3gの長手方向は、パッケージの端子取り出し面に平行であれば配線が容易であるため好ましいが、端子取り出し面に垂直方向でもよい。
実施の形態2.
図7は、本発明の実施の形態2に係る半導体装置を示す断面図である。絶縁層7の下方では各素子間の絶縁が確保できているため、絶縁層7の下に複数のヒートスプレッダ3a〜3fにわたって1枚の銅箔11を設ける。この銅箔11は、絶縁層7よりも厚く、ヒートスプレッダ3a〜3fの間の領域を横切っている。厚くした銅箔11でヒートスプレッダ3a〜3fの間の領域を補強することにより、当該領域において熱応力により生ずる反りを抑えることができる。この結果、破損を防いで信頼性を向上させることができる。また、銅箔11はパッケージと冷却器の接着に利用することもできる。
実施の形態3.
図8は、本発明の実施の形態3に係る半導体装置の内部を示す透視上面図である。ヒートスプレッダ3gは、ヒートスプレッダ3d〜3fと対向する凹部12を有する。ヒートスプレッダ3d〜3fは、凹部12に入り込む延設部13を有する。これにより、ヒートスプレッダ3gとヒートスプレッダ3d〜3fの間の領域を補強することにより、当該領域において熱応力により生ずる反りを抑えることができる。この結果、破損を防いで信頼性を向上させることができる。なお、延設部13は半導体素子の形状に沿った長方形が好ましいが、Sラインのような曲線状や三角形状でもよい。
1a〜1c トランジスタ素子(第1の半導体素子)
1d〜1f トランジスタ素子(第2の半導体素子)
2a〜2c ダイオード(第1の半導体素子)
2d〜2f ダイオード(第2の半導体素子)
3a〜3c ヒートスプレッダ(第1のヒートスプレッダ)
3d〜3f ヒートスプレッダ(第2のヒートスプレッダ)
5a〜5h 配線部材
7 絶縁層
8 モールド樹脂(樹脂)
9 補強部材
10 窪み
11 銅箔(金属層)
12 凹部
13 延設部

Claims (7)

  1. 第1のヒートスプレッダと、
    前記第1のヒートスプレッダとは離間して配置された第2のヒートスプレッダと、
    前記第1のヒートスプレッダ上に実装され、下面が前記第1のヒートスプレッダに接合された第1の半導体素子と、
    前記第2のヒートスプレッダ上に実装され、下面が前記第2のヒートスプレッダに接合された第2の半導体素子と、
    前記第1及び第2のヒートスプレッダ、及び前記第1及び第2の半導体素子を覆う樹脂と、
    前記樹脂内において前記第1のヒートスプレッダと前記第2のヒートスプレッダの間の領域を横切って設けられ、前記樹脂よりも高い剛性を有する補強部材とを備えることを特徴とする半導体装置。
  2. 前記補強部材は、前記第1及び第2の半導体素子と接することなく前記第1及び第2の半導体素子よりも上方に設けられていることを特徴とする請求項1に記載の半導体装置。
  3. 前記第1及び第2のヒートスプレッダの下面に設けられた絶縁層を更に備え、
    前記補強部材は、前記絶縁層の下に設けられ前記絶縁層よりも厚い金属層であることを特徴とする請求項1に記載の半導体装置。
  4. 第1のヒートスプレッダと、
    前記第1のヒートスプレッダとは離間して配置された第2のヒートスプレッダと、
    前記第1のヒートスプレッダ上に実装され、下面が前記第1のヒートスプレッダに接合された第1の半導体素子と、
    前記第2のヒートスプレッダ上に実装され、下面が前記第2のヒートスプレッダに接合された第2の半導体素子と、
    前記第1及び第2のヒートスプレッダ、及び前記第1及び第2の半導体素子を覆う樹脂とを備え、
    前記第1のヒートスプレッダは、前記第2のヒートスプレッダと対向する凹部を有し、
    前記第2のヒートスプレッダは、前記凹部に入り込む延設部を有することを特徴とする半導体装置。
  5. 前記第1の半導体素子の上面と前記第2のヒートスプレッダを接続し、窪みを有する配線部材を更に備えることを特徴とする請求項1〜4の何れか1項に記載の半導体装置。
  6. 前記第1の半導体素子は複数の半導体素子を有し、
    前記複数の半導体素子の下面は1つの前記第1のヒートスプレッダに共通に接合されていることを特徴とする請求項1〜5の何れか1項に記載の半導体装置。
  7. 前記第1及び第2のヒートスプレッダ及び前記第1及び第2の半導体素子は3相ハーフブリッジ回路を構成することを特徴とする請求項1〜6の何れか1項に記載の半導体装置。
JP2012103244A 2012-04-27 2012-04-27 半導体装置 Pending JP2013232495A (ja)

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Application Number Priority Date Filing Date Title
JP2012103244A JP2013232495A (ja) 2012-04-27 2012-04-27 半導体装置
US13/742,079 US9059128B2 (en) 2012-04-27 2013-01-15 Semiconductor device having improved thermal properties
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015220429A (ja) * 2014-05-21 2015-12-07 ローム株式会社 半導体装置
WO2019155659A1 (ja) * 2018-02-07 2019-08-15 株式会社 東芝 半導体装置
US11552021B2 (en) 2019-11-19 2023-01-10 Fuji Electric Co., Ltd. Semiconductor device, semiconductor manufacturing apparatus and method of manufacturing semiconductor device having printed circuit board and insulating board with complementary warps

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6490027B2 (ja) * 2016-06-10 2019-03-27 三菱電機株式会社 半導体装置
US20190103342A1 (en) * 2017-10-04 2019-04-04 Infineon Technologies Ag Semiconductor chip package comprising substrate, semiconductor chip, and leadframe and a method for fabricating the same
DE102020204358A1 (de) * 2020-04-03 2021-10-07 Zf Friedrichshafen Ag Halbbrückenmodul für einen Inverter eines elektrischen Antriebs eines Elektrofahrzeugs oder eines Hybridfahrzeugs und Inverter für einen elektrischen Antrieb eines Elektrofahrzeugs oder eines Hybridfahrzeugs

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08186199A (ja) * 1994-12-28 1996-07-16 Matsushita Electron Corp 樹脂封止型半導体装置
JP2005175130A (ja) * 2003-12-10 2005-06-30 Toyota Motor Corp 半導体モジュール、半導体装置および負荷駆動装置
JP2006202885A (ja) * 2005-01-19 2006-08-03 Mitsubishi Electric Corp 半導体装置
JP2007173703A (ja) * 2005-12-26 2007-07-05 Mitsubishi Electric Corp 半導体装置
JP2009212302A (ja) * 2008-03-04 2009-09-17 Denso Corp 半導体モジュール及びその製造方法
JP2010097967A (ja) * 2008-10-14 2010-04-30 Denso Corp 半導体装置
JP2011249364A (ja) * 2010-05-21 2011-12-08 Denso Corp 半導体モジュールおよびその製造方法
JP2012230981A (ja) * 2011-04-26 2012-11-22 Elpida Memory Inc 半導体装置及びその製造方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06216277A (ja) 1993-01-20 1994-08-05 Hitachi Ltd 半導体装置およびその半導体装置を組み込んだicカード
JPH10275887A (ja) 1997-03-31 1998-10-13 Nec Corp 半導体装置
JP2001127212A (ja) * 1999-10-26 2001-05-11 Hitachi Ltd 半導体装置および半導体装置の製造方法
US7145254B2 (en) * 2001-07-26 2006-12-05 Denso Corporation Transfer-molded power device and method for manufacturing transfer-molded power device
JP3740116B2 (ja) 2002-11-11 2006-02-01 三菱電機株式会社 モールド樹脂封止型パワー半導体装置及びその製造方法
JP2005117009A (ja) * 2003-09-17 2005-04-28 Denso Corp 半導体装置およびその製造方法
JP4585216B2 (ja) 2004-03-26 2010-11-24 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP4354377B2 (ja) * 2004-09-28 2009-10-28 三菱電機株式会社 半導体装置
JP4494240B2 (ja) 2005-02-03 2010-06-30 富士通マイクロエレクトロニクス株式会社 樹脂封止型半導体装置
JP2008021033A (ja) 2006-07-11 2008-01-31 Matsushita Electric Ind Co Ltd 電子部品
JP5253455B2 (ja) * 2010-06-01 2013-07-31 三菱電機株式会社 パワー半導体装置
US8621945B2 (en) 2010-11-14 2014-01-07 Kla Tencor Method and apparatus for improving the temperature stability and minimizing the noise of the environment that encloses an interferometric measuring system
JP2012119597A (ja) * 2010-12-03 2012-06-21 Mitsubishi Electric Corp 半導体装置及びその製造方法
JP2013021254A (ja) * 2011-07-14 2013-01-31 Mitsubishi Electric Corp 半導体装置および半導体装置の製造方法
JP5661052B2 (ja) * 2012-01-18 2015-01-28 三菱電機株式会社 パワー半導体モジュールおよびその製造方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08186199A (ja) * 1994-12-28 1996-07-16 Matsushita Electron Corp 樹脂封止型半導体装置
JP2005175130A (ja) * 2003-12-10 2005-06-30 Toyota Motor Corp 半導体モジュール、半導体装置および負荷駆動装置
JP2006202885A (ja) * 2005-01-19 2006-08-03 Mitsubishi Electric Corp 半導体装置
JP2007173703A (ja) * 2005-12-26 2007-07-05 Mitsubishi Electric Corp 半導体装置
JP2009212302A (ja) * 2008-03-04 2009-09-17 Denso Corp 半導体モジュール及びその製造方法
JP2010097967A (ja) * 2008-10-14 2010-04-30 Denso Corp 半導体装置
JP2011249364A (ja) * 2010-05-21 2011-12-08 Denso Corp 半導体モジュールおよびその製造方法
JP2012230981A (ja) * 2011-04-26 2012-11-22 Elpida Memory Inc 半導体装置及びその製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015220429A (ja) * 2014-05-21 2015-12-07 ローム株式会社 半導体装置
WO2019155659A1 (ja) * 2018-02-07 2019-08-15 株式会社 東芝 半導体装置
JPWO2019155659A1 (ja) * 2018-02-07 2021-01-14 株式会社東芝 半導体装置
US11552021B2 (en) 2019-11-19 2023-01-10 Fuji Electric Co., Ltd. Semiconductor device, semiconductor manufacturing apparatus and method of manufacturing semiconductor device having printed circuit board and insulating board with complementary warps

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US20130285235A1 (en) 2013-10-31

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