CN103378025A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
- Publication number
- CN103378025A CN103378025A CN2013100930773A CN201310093077A CN103378025A CN 103378025 A CN103378025 A CN 103378025A CN 2013100930773 A CN2013100930773 A CN 2013100930773A CN 201310093077 A CN201310093077 A CN 201310093077A CN 103378025 A CN103378025 A CN 103378025A
- Authority
- CN
- China
- Prior art keywords
- radiator
- semiconductor element
- semiconductor device
- semiconductor
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/40139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous strap daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/40247—Connecting the strap to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73221—Strap and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73263—Layer and strap connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/8485—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
本发明提供能够抑制热应力导致的翘曲、提高可靠性的半导体装置。散热器3a~3f互相离开而配置。晶体管元件1a~1c安装在散热器3a~3c上,其下表面与散热器3a~3c接合。晶体管元件1d~1f安装在散热器3d~3f上,其下表面与散热器3d~3f接合。模制树脂8覆盖散热器3a~3f及晶体管元件1a~1f。具有比模制树脂8高的刚性的增强部件9在模制树脂8内横穿散热器3a~3f之间的区域而设置。
Description
技术领域
本发明涉及用于控制汽车或电车等的电机的逆变器、发电/再生用转换器等的半导体装置。
背景技术
在散热器上安装半导体元件、并用树脂密封散热器及半导体元件的半导体装置得到使用(例如,参照专利文献1)。
现有技术文献
专利文献
[专利文献1]日本特开2004-165281号公报。
在互相离开的2个散热器上分别安装有半导体元件的半导体装置中,在2个散热器之间的区域存在树脂。由于树脂和散热器的线膨胀系数不同,如果使用时产生热而发生温度变化,则产生热应力。因此,冷热循环被过量地施加的情况下,从2个散热器之间的区域产生翘曲。进一步,有如下问题,即剥离在树脂和散热器或引线框等的内置部件之间进行,对可靠性造成影响。
发明内容
本发明为解决如上述那样的课题而作出,其目的是获得能够抑制热应力导致的翘曲、提高可靠性的半导体装置。
本发明的半导体装置,其特征在于,具备:第1散热器;第2散热器,其与所述第1散热器离开而配置;第1半导体元件,其安装在所述第1散热器上,下表面与所述第1散热器接合;第2半导体元件,其安装在所述第2散热器上,下表面与所述第2散热器接合;树脂,其覆盖所述第1及第2散热器、以及所述第1及第2半导体元件;增强部件,其在所述树脂内横穿所述第1散热器和所述第2散热器之间的区域而设置,具有比所述树脂高的刚性。
根据本发明,能够抑制热应力导致的翘曲,提高可靠性。
附图说明
图1是示出本发明的实施方式1的半导体装置的电路图;
图2是示出本发明的实施方式1的半导体装置的内部的透视俯视图;
图3是示出本发明的实施方式1的半导体装置的内部(省略增强部件)的透视俯视图;
图4是沿图2的I-II的截面图;
图5是沿图3的III-IV的截面图;
图6是示出本发明的实施方式1的半导体装置的变形例的内部(省略增强部件)的透视俯视图;
图7是示出本发明的实施方式2的半导体装置的截面图;
图8是示出本发明的实施方式3的半导体装置的内部的透视俯视图。
具体实施方式
关于本发明的实施方式的半导体装置,参照附图进行说明。存在对相同或对应的构成要件附上相同标号,省略反复说明的情况。
实施方式1
图1是示出本发明的实施方式1的半导体装置的电路图。晶体管元件1a~1f和二极管2a~2f的6对构成3相半桥式电路。来自电源的电力经由U、V、W端子供给负载。晶体管元件1a~1f是将由电源供给的电流仅在需要的时间导通的绝缘栅型双极晶体管(IGBT:Insulated Gate Bipolar Transistor)。在晶体管元件1a~1f从导通状态成为截止状态时,二极管2a~2f使电流回流。
图2是示出本发明的实施方式1的半导体装置的内部的透视俯视图。图3是示出本发明的实施方式1的半导体装置的内部(省略增强部件)的透视俯视图。图4是沿图2的I-II的截面图。
散热器3a~3c和散热器3d~3f左右离开而配置。散热器3a~3f互相分离。晶体管元件1a~1c及二极管2a~2c分别安装在散热器3a~3c上,它们的下表面用焊料4个别地与散热器3a~3c接合。晶体管元件1d~1f及二极管2d~2f分别安装在散热器3d~3f上,它们的下表面分别用焊料4个别地与散热器3d~3f接合。
互相分离的布线部件5a~5c分别用焊料4个别地与晶体管元件1a~1c及二极管2a~2c的上表面接合。布线部件5d用焊料4共同地与晶体管元件1d~1f及二极管2d~2f的上表面接合。此外,也可以代替焊料4,使用导电性粘结剂等。布线部件5a~5c分别与散热器3d~3f的上表面的周边部接合。互相分离的布线部件5e~5g分别与散热器3a~3c的上表面的周边部接合。
信号布线6a~6c分别导线连接到晶体管元件1a~1c的控制端子。信号布线6d~6f分别导线连接到晶体管元件1d~1f的控制端子。为了与外部的绝缘,绝缘层7设置在散热器3d~3f的下表面。这些散热器3a~3f、晶体管元件1a~1f、二极管2a~2f、一部分布线部件5a~5g、一部分信号布线6a~6f以及绝缘层7的上表面及侧面,被模制树脂8覆盖。
布线部件5a~5g担负与装置外部的电力的授受。关于布线部件5a~5g及信号布线6a~6f,例如,如引线框那样地冲裁或蚀刻同一金属板,以在外框连结为一体的状态形成。在用模制树脂8覆盖其一部分而将其机械地保持之后,除去外框而将布线部件5a~5g及信号布线6a~6f分割开。由此,由于能够总括地组装数量较多的布线部件5a~5g及信号布线6a~6f,所以量产性好,并且工业上的价值变高。
在本实施方式中,具有比模制树脂8高的刚性的增强部件9在模制树脂8内横穿散热器3a~3f之间的区域而设置。增强部件9不与晶体管元件1a~1f、二极管2a~2f等相接,与晶体管元件1a~1f、二极管2a~2f等相比设置在上方。
增强部件9例如是金属制的板部件。如果增强部件9是金属部件,则拉伸弹性模量相对于模制树脂8充分高,因此,能够提高增强效果。另外,如果增强部件9是如纤维增强塑料那样地被强化的有机材料、陶瓷材料等,则适于减轻重量。另外,不仅是板形状,增强部件9也可以是向上翘曲时抑制弯曲那样的L字、U字型形状。
通过利用该增强部件9增强散热器3a~3f之间的区域,从而,在该区域能够抑制由于热应力产生的翘曲。其结果是,能够防止破损、提高可靠性。
另外,晶体管元件1a~1f、二极管2a~2f、散热器3a~3f、布线部件5a~5g及信号布线6a~6f,构成控制电机等负载的逆变器电路所需要的3相半桥式电路。在如此用1个半导体装置构成3相半桥式电路的情况下,封装件尺寸变大,翘曲的问题变得显著。然而,利用本实施方式的构成能够抑制翘曲,因此,能够提高可靠性。
另外,布线部件5a~5c横穿散热器3a~3c和散热器3d~3f之间的区域,分别连接晶体管元件1a~1c的上表面和散热器3d~3f。该布线部件5a~5c作为电气电路发挥功能,并且也能够增强该区域。从而,能够不增加部件件数地抑制热应力导致的翘曲。其结果是,能够不损失量产性地提高可靠性。
图5是沿图3的III-IV的截面图。布线部件5a~5c即使是平坦的构造,利用金属的刚性也能获得增强效果,但是,通过在布线部件5a~5c的一部分在从上表面到下表面方向设置U字状的凹陷10,能够提高厚度方向的刚性。如果凹陷10的深度是布线部件5a~5c的厚度的1.5倍左右,则加工是可能的,并能获得充分的增强效果。此外,也可以在布线部件5a~5c的从下表面到上表面方向设置凹陷10,凹陷10也可以不是U字状,而是三角状、半圆状等。
图6是示出本发明的实施方式1的半导体装置的变形例的内部(省略增强部件)的透视俯视图。晶体管元件1a~1c及二极管2a~2c并排安装在1个散热器3g上,它们的下表面用焊料4共同地与散热器3a接合。由此,装置的左侧由刚性高的散热器3g支撑。布线部件5h与散热器3g的上表面的周边部接合。
通过如此将同电位的散热器3a~3c汇总到1个散热器3g,能够降低封装件在散热器3g的长度方向的翘曲。另外,也能够降低部件件数,能够简化装配。此外,关于散热器3g的长度方向,如果平行于封装件的端子取出面则容易布线因而优选,但是,也可以为垂直于端子取出面的方向。
实施方式2
图7是示出本发明的实施方式2的半导体装置的截面图。在绝缘层7的下方能够确保各元件之间的绝缘,因此,在绝缘层7之下跨及多个散热器3a~3f设置1块铜箔11。该铜箔11比绝缘层7厚,横穿散热器3a~3f之间的区域。通过用增厚的铜箔11增强散热器3a~3f之间的区域,从而,在该区域能够抑制由于热应力产生的翘曲。其结果是,能够防止破损、提高可靠性。另外,铜箔11也能够利用于封装件和冷却器的粘结。
实施方式3
图8是示出本发明的实施方式3的半导体装置的内部的透视俯视图。散热器3g具有与散热器3d~3f对置的凹部12。散热器3d~3f具有进入凹部12的延伸设置部13。由此,通过增强散热器3g和散热器3d~3f之间的区域,从而,在该区域能够抑制由于热应力产生的翘曲。其结果是,能够防止破损、提高可靠性。此外,延伸设置部13优选按照半导体元件的形状的长方形,但是,也可以是如S线那样的曲线状、三角形状等。
附图标记说明
1a~1c 晶体管元件(第1半导体元件)
1d~1f 晶体管元件(第2半导体元件)
2a~2c 二极管(第1半导体元件)
2d~2f 二极管(第2半导体元件)
3a~3c 散热器(第1散热器)
3d~3f 散热器(第2散热器)
5a~5h 布线部件
7 绝缘层
8 模制树脂(树脂)
9 增强部件
10 凹陷
11 铜箔(金属层)
12 凹部
13 延伸设置部。
Claims (7)
1. 一种半导体装置,其特征在于,具备:
第1散热器;
第2散热器,其与所述第1散热器离开而配置;
第1半导体元件,其安装在所述第1散热器上,下表面与所述第1散热器接合;
第2半导体元件,其安装在所述第2散热器上,下表面与所述第2散热器接合;
树脂,其覆盖所述第1及第2散热器、以及所述第1及第2半导体元件;以及
增强部件,其在所述树脂内横穿所述第1散热器和所述第2散热器之间的区域而设置,具有比所述树脂高的刚性。
2. 如权利要求1所述的半导体装置,其特征在于,
所述增强部件不与所述第1及第2半导体元件相接,与所述第1及第2半导体元件相比设置在上方。
3. 如权利要求1所述的半导体装置,其特征在于,
还具备绝缘层,其设置在所述第1及第2散热器的下表面,
其中,所述增强部件设置在所述绝缘层之下,是比所述绝缘层厚的金属层。
4. 一种半导体装置,其特征在于,具备:
第1散热器;
第2散热器,其与所述第1散热器离开而配置;
第1半导体元件,其安装在所述第1散热器上,下表面与所述第1散热器接合;
第2半导体元件,其安装在所述第2散热器上,下表面与所述第2散热器接合;以及
树脂,其覆盖所述第1及第2散热器、以及所述第1及第2半导体元件,
其中,所述第1散热器具有与所述第2散热器对置的凹部,
所述第2散热器具有进入所述凹部的延伸设置部。
5. 如权利要求1~4的任一项所述的半导体装置,其特征在于,
还具备布线部件,其连接所述第1半导体元件的上表面和所述第2散热器,具有凹陷。
6. 如权利要求1~4的任一项所述的半导体装置,其特征在于,
所述第1半导体元件具有多个半导体元件,
所述多个半导体元件的下表面共同地与1个所述第1散热器接合。
7. 如权利要求1~4的任一项所述的半导体装置,其特征在于,
所述第1及第2散热器、以及所述第1及第2半导体元件构成3相半桥式电路。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012-103244 | 2012-04-27 | ||
JP2012103244A JP2013232495A (ja) | 2012-04-27 | 2012-04-27 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103378025A true CN103378025A (zh) | 2013-10-30 |
CN103378025B CN103378025B (zh) | 2016-04-20 |
Family
ID=49323386
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310093077.3A Expired - Fee Related CN103378025B (zh) | 2012-04-27 | 2013-03-22 | 半导体装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9059128B2 (zh) |
JP (1) | JP2013232495A (zh) |
CN (1) | CN103378025B (zh) |
DE (1) | DE102013201056A1 (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015220429A (ja) * | 2014-05-21 | 2015-12-07 | ローム株式会社 | 半導体装置 |
JP6490027B2 (ja) * | 2016-06-10 | 2019-03-27 | 三菱電機株式会社 | 半導体装置 |
US20190103342A1 (en) * | 2017-10-04 | 2019-04-04 | Infineon Technologies Ag | Semiconductor chip package comprising substrate, semiconductor chip, and leadframe and a method for fabricating the same |
WO2019155659A1 (ja) * | 2018-02-07 | 2019-08-15 | 株式会社 東芝 | 半導体装置 |
JP7409035B2 (ja) | 2019-11-19 | 2024-01-09 | 富士電機株式会社 | 半導体装置、半導体製造装置及び半導体装置の製造方法 |
DE102020204358A1 (de) * | 2020-04-03 | 2021-10-07 | Zf Friedrichshafen Ag | Halbbrückenmodul für einen Inverter eines elektrischen Antriebs eines Elektrofahrzeugs oder eines Hybridfahrzeugs und Inverter für einen elektrischen Antrieb eines Elektrofahrzeugs oder eines Hybridfahrzeugs |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001127212A (ja) * | 1999-10-26 | 2001-05-11 | Hitachi Ltd | 半導体装置および半導体装置の製造方法 |
US20030022464A1 (en) * | 2001-07-26 | 2003-01-30 | Naohiko Hirano | Transfer-molded power device and method for manufacturing transfer-molded power device |
CN1499619A (zh) * | 2002-11-11 | 2004-05-26 | ������������ʽ���� | 模塑树脂封装型功率半导体装置及其制造方法 |
US20050056927A1 (en) * | 2003-09-17 | 2005-03-17 | Takanori Teshima | Semiconductor device having a pair of heat sinks and method for manufacturing the same |
CN1755918A (zh) * | 2004-09-28 | 2006-04-05 | 三菱电机株式会社 | 半导体器件 |
US20110291106A1 (en) * | 2010-06-01 | 2011-12-01 | Mitsubishi Electric Corporation | Power semiconductor device |
JP2011249364A (ja) * | 2010-05-21 | 2011-12-08 | Denso Corp | 半導体モジュールおよびその製造方法 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06216277A (ja) | 1993-01-20 | 1994-08-05 | Hitachi Ltd | 半導体装置およびその半導体装置を組み込んだicカード |
JPH08186199A (ja) * | 1994-12-28 | 1996-07-16 | Matsushita Electron Corp | 樹脂封止型半導体装置 |
JPH10275887A (ja) | 1997-03-31 | 1998-10-13 | Nec Corp | 半導体装置 |
JP3978424B2 (ja) * | 2003-12-10 | 2007-09-19 | トヨタ自動車株式会社 | 半導体モジュール、半導体装置および負荷駆動装置 |
JP4585216B2 (ja) | 2004-03-26 | 2010-11-24 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP4499577B2 (ja) * | 2005-01-19 | 2010-07-07 | 三菱電機株式会社 | 半導体装置 |
JP4494240B2 (ja) | 2005-02-03 | 2010-06-30 | 富士通マイクロエレクトロニクス株式会社 | 樹脂封止型半導体装置 |
JP4349364B2 (ja) * | 2005-12-26 | 2009-10-21 | 三菱電機株式会社 | 半導体装置 |
JP2008021033A (ja) | 2006-07-11 | 2008-01-31 | Matsushita Electric Ind Co Ltd | 電子部品 |
JP4748173B2 (ja) * | 2008-03-04 | 2011-08-17 | 株式会社デンソー | 半導体モジュール及びその製造方法 |
JP5217884B2 (ja) * | 2008-10-14 | 2013-06-19 | 株式会社デンソー | 半導体装置 |
US8621945B2 (en) | 2010-11-14 | 2014-01-07 | Kla Tencor | Method and apparatus for improving the temperature stability and minimizing the noise of the environment that encloses an interferometric measuring system |
JP2012119597A (ja) * | 2010-12-03 | 2012-06-21 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP2012230981A (ja) * | 2011-04-26 | 2012-11-22 | Elpida Memory Inc | 半導体装置及びその製造方法 |
JP2013021254A (ja) * | 2011-07-14 | 2013-01-31 | Mitsubishi Electric Corp | 半導体装置および半導体装置の製造方法 |
JP5661052B2 (ja) * | 2012-01-18 | 2015-01-28 | 三菱電機株式会社 | パワー半導体モジュールおよびその製造方法 |
-
2012
- 2012-04-27 JP JP2012103244A patent/JP2013232495A/ja active Pending
-
2013
- 2013-01-15 US US13/742,079 patent/US9059128B2/en not_active Expired - Fee Related
- 2013-01-23 DE DE102013201056A patent/DE102013201056A1/de not_active Withdrawn
- 2013-03-22 CN CN201310093077.3A patent/CN103378025B/zh not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001127212A (ja) * | 1999-10-26 | 2001-05-11 | Hitachi Ltd | 半導体装置および半導体装置の製造方法 |
US20030022464A1 (en) * | 2001-07-26 | 2003-01-30 | Naohiko Hirano | Transfer-molded power device and method for manufacturing transfer-molded power device |
CN1499619A (zh) * | 2002-11-11 | 2004-05-26 | ������������ʽ���� | 模塑树脂封装型功率半导体装置及其制造方法 |
US20050056927A1 (en) * | 2003-09-17 | 2005-03-17 | Takanori Teshima | Semiconductor device having a pair of heat sinks and method for manufacturing the same |
CN1755918A (zh) * | 2004-09-28 | 2006-04-05 | 三菱电机株式会社 | 半导体器件 |
JP2011249364A (ja) * | 2010-05-21 | 2011-12-08 | Denso Corp | 半導体モジュールおよびその製造方法 |
US20110291106A1 (en) * | 2010-06-01 | 2011-12-01 | Mitsubishi Electric Corporation | Power semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
US9059128B2 (en) | 2015-06-16 |
US20130285235A1 (en) | 2013-10-31 |
CN103378025B (zh) | 2016-04-20 |
DE102013201056A1 (de) | 2013-10-31 |
JP2013232495A (ja) | 2013-11-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101505552B1 (ko) | 복합 반도체 패키지 및 그 제조방법 | |
JP5253455B2 (ja) | パワー半導体装置 | |
US9275930B2 (en) | Circuit device and method of manufacturing the same | |
CN103378025B (zh) | 半导体装置 | |
EP2677539B1 (en) | Process for manufacture of a semiconductor device | |
US10332869B2 (en) | Method for manufacturing power module | |
CN107958901B (zh) | 模压智能电源模块 | |
US8450837B2 (en) | Circuit device having an improved heat dissipitation, and the method of manufacturing the same | |
CN107078127B (zh) | 电力用半导体装置及其制造方法 | |
US7935899B2 (en) | Circuit device and method of manufacturing the same | |
CN105990266A (zh) | 功率转换电路的封装模块及其制造方法 | |
EP3226293B1 (en) | Semiconductor module and semiconductor driving device | |
US11476179B2 (en) | Inverter | |
CN101675520A (zh) | 电力用半导体模块 | |
US9922906B2 (en) | Electronic device and manufacturing method of electronic device | |
CN102956509A (zh) | 功率器件和封装该功率器件的方法 | |
CN106129018B (zh) | 包括金属衬底和嵌入层合体的半导体模块的电子设备 | |
US20110012251A1 (en) | Semiconductor device and method for manufacturing same | |
KR101255930B1 (ko) | 전력 모듈 패키지 및 그 제조방법 | |
JP5490276B2 (ja) | パワー半導体装置 | |
CN114566473A (zh) | 包括具有嵌入的封装式半导体芯片的引线框的印刷电路板 | |
CN106165089B (zh) | 半导体模块以及搭载有半导体模块的驱动装置 | |
JP2013041939A (ja) | 半導体モジュール及びそれを搭載したインバータ | |
KR101265046B1 (ko) | 반도체장치 | |
JP2021086869A (ja) | 電子部品、電子装置及び電子部品の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160420 Termination date: 20170322 |