CN106129018B - 包括金属衬底和嵌入层合体的半导体模块的电子设备 - Google Patents
包括金属衬底和嵌入层合体的半导体模块的电子设备 Download PDFInfo
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- CN106129018B CN106129018B CN201610298383.4A CN201610298383A CN106129018B CN 106129018 B CN106129018 B CN 106129018B CN 201610298383 A CN201610298383 A CN 201610298383A CN 106129018 B CN106129018 B CN 106129018B
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Abstract
根据本发明的电子设备包括:包括金属层的衬底;设置在所述衬底上方的电绝缘层;设置在所述电绝缘层上方的半导体模块;以及设置在所述电绝缘层上方的层合层。所述层合层至少部分嵌入所述半导体模块。
Description
技术领域
本发明总体上涉及电子设备以及用于制造电子设备的方法。具体地,所述电子设备可以包括金属衬底和嵌入层合体(laminate)的半导体模块。
背景技术
电子设备可以包括衬底,比如金属芯衬底、金属基层衬底或绝缘金属衬底(IMS)。电子设备可以用在很多应用中,例如用作AC/DC转换器或DC/DC转换器,用于电动助力转向应用,用于大电流应用,等等。衬底可以提供有限的表面区域用于在衬底上方安装比如晶体管的有源电部件或比如电容器或分流器的无源电部件。换言之,表面区域的尺寸可以限制能够安装在衬底上的电部件的数量。
电子设备及其制造方法一直有待提高。因此可能令人期望的是提高电子设备的操作、设计和制造方法。更具体地说,可能令人期望的是在不增加衬底的尺寸的情况下提供可以在衬底表面区域上提供额外的自由空间的电子设备和制造方法。此外,可能令人期望的是在不需要减少包括在包括衬底的电子设备中的有源电设备或无源电设备的数量的情况下减小衬底的尺寸。另外,可能令人期望的是改进电子设备的热管理。例如,可能令人期望的是提高由包括在电子设备中的半导体元件生成的热的消散效率。
在以下详细描述中,参考了附图,在所述附图中通过举例说明的方法示出可以实现本发明的特定示例。在这方面,参考所描述的附图的取向可以使用诸如“顶”、“底”、“前”、“后”、“首”、“尾”等方向性术语。因为可以将这些示例的部件置于很多不同的取向,所以方向性术语可以用于举例说明的目的而绝非限制性的。
发明内容
按照本发明,提出了一种电子设备,所述电子设备包括:包括金属层的衬底;设置在所述衬底上方的电绝缘层;设置在所述电绝缘层上方的半导体模块;以及设置在所述电绝缘层上方并且至少部分嵌入所述半导体模块的层合层。
根据本发明的一种有利的实施方式,所述衬底包括绝缘金属衬底、金属芯或金属基层。
根据本发明的一种有利的实施方式,所述衬底的厚度位于从0.5mm到5.0mm的范围内。
根据本发明的一种有利的实施方式,所述金属层包括铝和铜中的至少一种。
根据本发明的一种有利的实施方式,所述电绝缘层和所述层合层中的至少一个包括层合体、环氧树脂、填充的环氧树脂、玻璃纤维填充的环氧树脂、酰亚胺、热塑性塑料和热固性塑料聚合物或聚合物共混物中的至少一种。
根据本发明的一种有利的实施方式,所述层合层的厚度位于从30μm到300μm的范围内。
根据本发明的一种有利的实施方式,所述半导体模块包括载体和附接到所述载体上的至少一个半导体芯片。
根据本发明的一种有利的实施方式,所述载体包括引线框架。
根据本发明的一种有利的实施方式,所述半导体模块设置在所述电绝缘层的上方,其中,所述载体面向所述电绝缘层。
根据本发明的一种有利的实施方式,所述半导体模块包括功率半导体芯片。
根据本发明的一种有利的实施方式,所述半导体模块包括半导体封装,所述半导体封装包括半导体芯片和至少部分包封所述半导体芯片的包封材料。
根据本发明的一种有利的实施方式,所述半导体模块还包括第一电布线层,所述第一布线层设置在所述半导体封装周边上并且配置成将所述半导体芯片电连接到所述半导体封装的外部。
根据本发明的一种有利的实施方式,所述层合层的第一侧面向所述绝缘层,其中所述层合层的与所述第一侧相反的第二侧与所述半导体模块的一侧是共面的。
根据本发明的一种有利的实施方式,所述层合层的第一侧面向所述电绝缘层,其中所述层合层的与所述第一侧相反的第二侧包括第二电布线层。
根据本发明的一种有利的实施方式,所述电子设备还包括:设置在所述层合层上方的电部件。
根据本发明的一种有利的实施方式,所述电部件包括分立器件、无源部件和半导体芯片中的至少一个。
根据本发明的一种有利的实施方式,所述半导体模块是半桥、H桥和3相桥中的至少一种的一部分。
根据本发明的一种有利的实施方式,所述层合层包括预浸材料和铜箔。
按照本发明,提出了一种电子设备,所述电子设备包括:金属衬底;布置在所述金属衬底上方的半导体模块,其中所述半导体模块包括面向所述金属衬底的第一主表面、背离所述金属衬底的第二主表面以及从所述第一主表面延伸至所述第二主表面的侧表面;布置在所述金属衬底上方的层合体,其中所述半导体模块嵌入所述层合体,其中所述半导体模块的侧表面由所述层合体覆盖,其中所述层合体布置在所述金属衬底和所述半导体模块的第一主表面之间并且使所述金属衬底相对于所述半导体模块电绝缘;布置在所述层合体上方的导电布线层,其中所述布线层从所述层合体暴露并且提供至所述半导体模块的电耦合。
按照本发明,提出了一种方法,所述方法包括:提供包括金属层的衬底;在所述衬底的上方布置电绝缘层;在所述电绝缘层的上方布置半导体模块;以及执行层合工艺,其中在所述电绝缘层的上方形成层合层,其中所述半导体模块至少部分嵌入所述层合层。
根据本发明的一种有利的实施方式,在所述衬底的上方布置所述电绝缘层包括层合工艺。
附图说明
包括附图以提供对各方面的进一步理解,并且附图包括于并且组成本说明书的一部分。附图示出各方面并且与描述一起来解释各方面的原理。当其他方面和各方面的很多预期优点参照以下详细描述变得更好理解时,它们将更易于理解。所示出的部件不是按照比例绘制的或不一定是按照比例绘制的。各个附图中的相似附图标记指示相似的部分。
图1示出根据本发明的包括衬底和半导体模块的电子设备的一个示例的侧视图。
图2A和2B示出根据本发明的可以包括在电子设备中的半导体模块的两个示例的侧视图。
图3示出根据本发明的可以包括在电子设备中的半导体模块的另一示例的侧视图。
图4示出根据本发明的电子设备以及布置在电子设备上的有源电设备或无源电设备的另一示例的侧视图。
图5示出根据本发明的包括电子设备的布置的侧视图。
图6A-6D示出根据本发明的用于制造电子设备的示例性方法的侧视图。
图7示出根据本发明的用于制造电子设备的方法的一个示例的流程图。
具体实施方式
可以理解的是,在不背离本发明的思想的情况下,可以使用其他示例以及可以做出结构上或逻辑上的改变。因此,不应将以下详细描述理解为限制性的。
本文中描述的不同示例的特征可以互相组合,除非另有特别说明。
如在本说明书中使用的术语“连接的”,“耦合的”,“电连接的”和/或“电耦合的”并非旨在表示元件必须直接耦合在一起。可以在“连接的”、“耦合的”、“电连接的”或“电耦合的”的元件之间提供中间元件。
另外,关于例如形成在或位于物体表面“上方”的材料层所使用的词语“上方”(或“上”)在这里可以用来表示材料层可以“直接”位于(例如形成在,设置在等等)所指的表面上,例如直接接触所指的表面。关于例如形成在或位于表面“上方”的材料层所使用的词语“上方”也可以在这里用来表示材料层可以非直接地位于(例如形成在,设置在等等)所指的表面上,其中例如一个或多个额外的层布置在所指的表面和材料层之间。
下文中所描述的管芯(dies)可以是半导体材料的小块,在其上可以制造给定功能电路。通过诸如光刻的工艺,可以在电子级硅或其他半导体材料的单个晶片上大批量生产集成电路。可以将晶片切割成很多片,其中这些片中的每一个可以被称为“管芯”。之后,可以封装一个或多个分开的管芯。封装可以涉及将管芯附接在衬底上、提供至管芯的电连接并且提供至少部分包封管芯的封装。也可以不包封管芯,而是将附接到比如例如引线框架的载体上的裸管芯或管芯包括在下文所描述的电子设备中。
下文中描述包含多个半导体芯片(即包括给定功能电路的管芯)的设备或电子设备。需要注意的是,在本说明书中术语“管芯”、“半导体管芯”、“芯片”和“半导体芯片”可以同义地使用。术语“半导体模块”可以用于包括半导体芯片的部件。尤其是,管芯或半导体芯片可以包括功率半导体。功率半导体芯片是特定类型的半导体芯片,其可以设计用来处理非常大的功率级别。功率半导体芯片可以尤其配置成切换和控制电流和/或电压。它们可以被实现为功率MOSFET、IGBT、JFET、功率双极晶体管和二极管。例如,可以在大多数电源、DC/DC转换器和电动机控制器中找到功率半导体芯片。功率半导体芯片可以彼此堆叠用于特定的应用,诸如例如半桥电路。
本文描述的半导体芯片可以是不同的类型,可以由不同的技术制造并且可以包括例如集成电路、集成电光电路或集成机电电路或无源器件。集成电路可以例如设计为逻辑集成电路、模拟集成电路、混合信号集成电路、功率集成电路、存储器电路或集成无源器件。此外,半导体芯片可以配置为MEMS(Micro-Electro Mechanical Systems:微机电系统)并且可以包括微机械结构,诸如桥、膜片或舌状结构。所述半导体芯片不需要由特定半导体材料制造。半导体芯片可以包括例如硅(Si)、碳化硅(SiC)、硅锗(SiGe)、砷化镓(GaAs)、氮化镓(GaN),并且此外可以包含非半导体的非有机材料和/或有机材料,诸如例如绝缘体、塑料或金属。此外,可以封装或不封装半导体芯片。
尤其是,可以涉及具有垂直结构的半导体芯片,就是说可以通过以下方式制造半导体芯片:电流能够在垂直于半导体芯片的主面的方向上流动。具有垂直结构的半导体芯片可以在它的两个主面上——就是说在它的顶侧和底侧上具有电极。尤其是,功率半导体芯片可以具有垂直结构并且可以在两个主面上具有负载电极。垂直功率半导体芯片可以例如被配置为功率MOSFET(Metal Oxide Semiconductor Field Effect Transistors:金属氧化物半导体场效应晶体管)、IGBT(Insulated Gate Bipolar Transistors:绝缘栅双极晶体管)、JFET(Junction Gate Field Effect Transistors:结型场效应晶体管)、功率双极晶体管或二极管。举例而言,功率MOSFET的源极电极和栅极电极可以位于一个面上,而功率MOSFET的漏极电极可以布置于另一个面上。此外,本文中描述的设备可以包括配置成控制功率半导体芯片的集成电路的集成电路。
半导体芯片可以具有接触盘(或接触元件或端子),所述接触盘可以允许与包括在半导体芯片中的集成电路进行电接触。所述接触盘可以包括可以被施加在半导体材料上的一个或多个金属层。可以用任意期望的几何形状和任意期望的材料成分来制造所述金属层。金属层可以是例如覆盖一个区域的层的形式。任意期望的金属或金属合金——例如铝、钛、金、银、铜、钯、铂、镍、铬或镍钒可以用作所述材料。金属层不需要是同质的或者由仅仅一种材料制造,就是说包含在金属层中的材料的不同组成和浓度是可能的。
可以提供具有导线(或导体轨)形状的一个或多个金属层,并且所述一个或多个金属层可以电耦合至半导体芯片。所述金属层可以例如用来生产再分配层或布线层。导线可以用作布线层以从设备的外部实现与半导体芯片的电接触和/或实现与包含在设备中的其他半导体芯片和/或部件的电接触。导线可以将半导体芯片的接触盘耦合至外部接触盘。导线可以用任意期望的几何形状和任意期望的材料成分来制造。任意期望的金属——例如铝、镍、钯、银、锡、金或铜或金属合金可以用作所述材料。导线不需要是同质的或由仅仅一种材料制造,也就是说包含在导线中的材料的不同成分和浓度是可能的。此外,导线可以布置在电绝缘层上方或下方或之间。
下面描述的设备可以包括可以是任意形状和尺寸的外部接触盘(或外部接触元件)。所述外部接触盘可以是可从设备外部触及的,因此可以允许从设备外部实现与半导体芯片的电接触。外部接触盘可以由任意期望的导电材料组成,例如,诸如铜、铝或金的金属、金属合金或导电有机材料。外部接触盘可以由金属层的部分来形成。诸如焊球或焊点的焊接材料可以沉积在外部接触盘上。外部接触盘可以布置在设备的上表面上。设备的下表面和/或设备的侧表面可以没有外部接触盘。
可以封装半导体芯片。就是说,半导体芯片或者半导体芯片的至少部分可以由包封材料覆盖,该包封材料可以是电绝缘的以及可以形成包封体。例如,包封材料可以包括预浸材料(prepreg)、树脂、环氧树脂、模制化合物、聚合物、酰亚胺和层合体中的至少一种。
本文描述的设备可以包括至少一个安装表面。该安装表面可以用来将设备安装到另一个部件上,或者反过来。外部接触元件和特别是外部接触表面可以设置在安装表面上以允许将设备电耦合到部件上。可以使用诸如焊球的焊料沉积物或其他适合的连接元件来建立设备与其他部件之间的电连接和尤其是机械连接。
附图1示出根据本发明的电子设备100的一个示例。电子设备100包括衬底102、嵌入复合部104和半导体模块110。衬底102可以包括上表面102A、与上表面102A相反的下表面102B以及将上表面102A连接到下表面102B的侧表面。嵌入复合部104可以布置在衬底102的上表面102A的上方。在电子设备100的一个示例中,嵌入复合部104仅覆盖衬底102的上表面102A,而不覆盖衬底102的侧表面或下表面102B。尤其是,嵌入复合部104可以完全覆盖衬底102的上表面102A。
衬底102例如可以包括IMS、金属芯或金属基层。衬底可以包括铝(Al)、铜(Cu)和铁(Fe)中的至少一种。衬底可以包括金属合金,例如CuFeP。
从上表面102A到下表面102B测量,衬底102可以具有从大约0.5mm到大约5.0mm的范围内、更特别地从大约1mm到大约2.5mm的范围内、甚至更特别地从大约1mm到大约2mm的范围内的厚度。沿着上表面102A的第一边缘测量,衬底102可以具有从大约1cm到大约20cm的范围内、更特别地从大约2cm到大约10cm的范围内、甚至更特别地从大约5cm到大约10cm的范围内的长度。沿着上表面102A的第二边缘测量,衬底102可以具有从大约0.5cm到大约8cm的范围内、更特别地从大约1cm到大约5cm的范围内的宽度。衬底102可以具有方形形状、矩形形状或任意其他适当的形状。衬底102可以包括用于将电子设备100安装在框架上或任意其他适当的设备上的通孔,如例如下文关于附图5进一步描述的那样。
衬底102可以配置成消散由半导体模块110和/或安装在嵌入复合部104上的另外的设备生成的热,如下文关于附图4进一步描述的那样。
半导体模块110可以布置在衬底102的上方,并且半导体模块110可以嵌入嵌入复合部104中。半导体模块110可以包括上表面110A、下表面110B和连接上表面110A与下表面110B的侧表面。
半导体模块110可以包括半导体封装,所述半导体封装包括一个或多个半导体芯片以及至少部分包封所述一个或多个半导体芯片的包封材料。
半导体模块110可以例如配置成作为半桥、H桥或3相桥电路运行。半导体模块110可以包括单个半导体芯片或多个半导体芯片。
注意,比如电子设备100的电子设备可以包括不止一个比如半导体模块110的半导体模块。所述不止一个半导体模块可以是相同种类的或可以是不同种类的。
在附图1的示例中,嵌入复合部104覆盖半导体模块110的下表面110B和侧表面,但不覆盖半导体模块110的上表面110A。在电子设备的另一示例中,嵌入复合部104可以部分地覆盖半导体模块110的上表面110A。在又一示例中,嵌入复合部104可以从各个方向完全覆盖半导体模块110。
嵌入复合部104可以包括一些层。例如,如在附图1中所示,嵌入复合部104可以包括布置在衬底102上方的第一层106和布置在第一层106上方的第二层108。此外,第一层106可以布置在衬底102和半导体模块110之间。第一层106可以直接施加在衬底102的上表面102A上以及半导体模块110的下表面110B上。第一层106可以配置成使半导体模块110相对于衬底102电绝缘。
在电子设备的一个示例中,第二层108可以是电绝缘的。第二层108可以具有从30μm到300μm范围内的厚度。
嵌入复合部104可以不仅仅包括如在附图1中所示的第一层106和第二层108。另外的一个或多个层可以布置在第二层108上方和/或第一层106下方和/或第一层106和第二层108之间。
嵌入复合部可以包括层合体、环氧树脂、填充的环氧树脂、玻璃纤维填充的环氧树脂、酰亚胺、热塑性塑料和热固性塑料的聚合物或聚合物共混物中的至少一种。尤其是,第一层106和第二层108中的每一个可以包括这些材料中的至少一种。第一层106和第二层108可以包括相同的或不同的材料或材料成分。第一层106和/或第二层108可以包括预浸材料和铜箔。
电子设备100可以包括布线层112。布线层112可以布置在嵌入复合部104的上表面108A上。布线层112可以被结构化并且布线层112可以包括用于将设备耦合到布线层112的导电路径和/或耦合盘。耦合例如可以包括焊接。在附图1中未示出的电子设备的一个示例中,布线层112可以电耦合到半导体模块110并且可以配置成将半导体模块110电耦合到外部。布线层112可以包括几个垂直堆叠的导电材料层,其中垂直堆叠层可以通过过孔链接。在电子设备的一个示例中,第一层106不一定包括任何形式的布线层。
在一个示例中,嵌入复合部的上表面108A和半导体模块的上表面110A可以是共面的。布线层112可以与上表面108A共面,或布线层112可以布置在上表面108A的上方。
由半导体模块110产生的热可以主要通过第一层106消散到衬底102。为此,电子设备100可以有利地配置成仅提供半导体模块110和衬底102之间的小的热阻。半导体模块110与衬底102之间的热阻可以小于安装在上表面108A上的设备402(比较附图4)与衬底102之间的热阻。
根据电子设备100的一个实施例,嵌入复合部104可以包括布置在衬底102上的第一层合体层(第一层106)、布置在第一层合体层上的第二层合体层(第二层108)和布置在第二层合体层上的铜箔。铜箔可以被结构化或可以没有任何结构。半导体模块110可以布置在第一层合体层上,并且第二层合体层可以配置成嵌入半导体模块110。
根据电子设备100的另一实施例,嵌入复合部104可以包括布置在衬底102上的第一层合体层(第一层106)、布置在第一层合体层上并且嵌入半导体模块110的预浸材料层、布置在预浸材料层和半导体模块110上的第二层合体层以及布置在第二层合体层上的铜箔。预浸材料层可以包括配置成接收半导体模块110的腔。铜箔可以被结构化或可以没有任何结构。
根据电子设备100的又一实施例,嵌入复合部104可以包括布置在衬底102上的预浸材料层、布置在预浸材料层上的层合体层以及布置在层合体层上的铜箔。预浸材料层可以包括配置成接收半导体模块110的腔。绝缘层可以布置在半导体模块110的下表面上,使得绝缘层布置在衬底102和半导体模块110之间而不是衬底102和预浸材料层之间。绝缘层可以包括层合体。
附图2A示出半导体模块或半导体封装200A的一个示例,其中半导体模块200A可以相应于附图1的半导体模块110。半导体模块200A可以包括载体202、布置在载体上方的半导体芯片204和包封半导体芯片204的包封材料206。
与半导体封装200A类似的半导体模块的另一示例包括载体202和半导体芯片204(参照附图2A),但不包括包封半导体芯片204的包封材料。
载体202可以包括金属或金属合金。例如,载体202可以包括铝(Al)、铜(Cu)和铁(Fe)中的至少一种。在一个示例中,载体202可以包括引线框架。
半导体芯片204可以相对于载体202电绝缘或半导体芯片204可以与载体202电耦合。注意,在附图2A中仅示出了单个半导体芯片204。然而,半导体模块200A也可以包括不止一个半导体芯片204,例如两个半导体芯片。所述不止一个半导体芯片可以是相同类型的或不同类型的半导体芯片。例如,所述不止一个半导体芯片可以是两个功率半导体芯片。此外,逻辑半导体芯片可以配置成控制一个或多个功率半导体芯片。
包封材料206可以包括层合体、环氧树脂、填充的环氧树脂、玻璃纤维填充的环氧树脂、酰亚胺、热塑性塑料和热固性塑料聚合物或聚合物共混物中的至少一种。
半导体模块200A可以包括用于将一个或多个半导体芯片204电连接到半导体模块200A的外部的导电布线(在附图2A中没有示出)。半导体模块200A可以配置成将一个或多个半导体芯片204电耦合到电子设备100的布线层112。
附图2B示出半导体模块或半导体封装200B的另一示例,其中半导体模块200B可以相应于附图1的半导体模块110。半导体模块200B可以包括一个或多个半导体芯片204(在附图2B的示例中示出两个半导体芯片)以及布置在一个或多个半导体芯片204上方的布线层208。布线层208可以暴露在电子设备100的上表面108A上并且可以配置成从外部电连接到一个或多个半导体芯片204。布线层208可以包括可以通过过孔互相连接的一个或多个导电轨水平层。半导体模块200B的布线层208可以与布置在嵌入复合部104上的布线层112共面并且可以包括相同的材料成分或不同的材料成分。布线层208可以在电子设备100的上表面108A上暴露于外部。
在一个示例中,一个或多个半导体芯片204可以电耦合到载体202。例如,位于一个或多个半导体芯片204的下表面上的电极(例如负载电极)可以电耦合到载体202。此外,布线层208可以提供至载体202的电接触。
载体202可以包括一个或多个单独部分。例如,可以为每一个半导体芯片204提供一个接触盘。所述单独部分可以彼此绝缘或可以彼此电连接。
附图3示出半导体模块或半导体封装300的另一示例,其中半导体模块300可以相应于附图1的半导体模块110。半导体模块300包括第一金属层302、布置在第一金属层302上的第一绝缘层304、布置在第一绝缘层304上的第二金属层306、布置在第二金属层306上的第二绝缘层308和布置在第二绝缘层308上的布线层310。
第一和第二金属层302和306以及布线层310可以包括铝(Al)、铜(Cu)和铁(Fe)中的至少一种。第一和第二绝缘层304和308可以包括层合体、环氧树脂、填充的环氧树脂、填充玻璃纤维的环氧树脂、酰亚胺、热塑性塑料和热固性塑料聚合物或聚合物共混物中的至少一种。
第二金属层306可以包括配置成将半导体芯片312安装到每一个芯片盘上的一个或多个芯片盘。
布线层310可以包括延伸穿过第二绝缘层308并且耦合到半导体芯片312上的接触盘和/或耦合到第二金属层306的过孔。
附图4示出电子设备400的另一示例和布置在电子设备400的上表面108A上的设备或部件402。当在垂直方向上观察时,设备402例如可以完全或部分地布置在半导体模块110的覆盖区(footprint)的上方。设备400可以包括无源电部件,比如,例如,电容器、用于连接器的盘、电感器或分流器。设备400可以包括有源电部件,比如,例如,半导体芯片或半导体模块。
由于半导体模块110嵌入嵌入复合部104中,它不需要上表面108A上的空间。根据本发明嵌入半导体模块110而不是将其安装在上表面108A上,因此可以产生上表面108A上的自由空间。因此,根据本发明的电子设备——诸如例如电子设备100和400与传统的电子设备相比可以设计成具有更小的尺寸。反过来,具有与传统的电子设备相同尺寸的根据本发明的电子设备可以在上表面108A上提供额外的自由空间,例如用于安装额外的设备402。
用于嵌入电子设备100或400的半导体模块或半导体封装110不需要一定如关于半导体模块200A、200B和300所公开的那样进行配置。原则上,任意“薄”的半导体封装都可以用于嵌入电子设备100或400。这里,“薄”的半导体封装可以是通常包括例如至少一个绝缘层和至少一个包括过孔的布线层的层合层结构的封装,而不是包括例如模制化合物和接合线的封装。此外,根据本发明的半导体模块110不需要一定包括(金属)载体。半导体模块110可以甚至仅包括单一的裸管芯或附接到载体上的管芯。
附图5示出布置500的各个部件,其应如由两个图示的箭头所指示的那样进行组合。所述布置500包括第一电子设备502和包住第一电子设备502的壳体506。第一电子设备502可以相应于电子设备100或400。壳体506可以包括金属壳体,例如铝壳体。
布置500可以可选地包括第二电子设备504,其中所述壳体506也可以包住第二电子设备504。第二电子设备504可以包括印刷电路板(PCB)或可以相应于电子设备100或400。
第一电子设备502可以包括比如例如半桥电路、H桥电路或3相桥电路的负载电路,并且第二电子设备504可以包括配置成控制第一电子设备502的电路的控制逻辑。
布置500可以可选地包括安装框架508,所述安装框架配置用于将第一电子设备502和/或第二电子设备504安装在安装框架508上。安装框架508可以包括配置用于将布置500连接到比如例如电动机的外部设备的连接器。安装框架508例如可以包括塑料插接部。壳体506可以固定在框架508上,例如在使用螺钉的情况下。
附图6A-6D示出用于制造电子设备600的方法,其中电子设备600可以相应于电子设备100或400。电子设备100、400和600的类似部分分配了具有相同的第二位数字和第三位数字的附图标记。
如在附图6A中所示,提供衬底602,以及将第一层606施加在衬底602的上表面上。施加第一层606可以包括层合工艺。
如在附图6B中所示,将半导体模块610布置在第一层606上。将半导体模块610布置在第一层606上可以包括附接工艺。例如,第一层606可以具有粘接性能,并且当将半导体模块置于第一粘接层606上或当以一定的力将半导体模块向下压在第一层606上时,半导体模块可以因此粘接到第一层606上。
如在附图6C中所示,将第二层608施加在第一层606上。将第二层608施加在第一层606上可以包括层合工艺。在一个示例中,第二层608可以包括配置成接收半导体模块610的凹部。如在附图6C中所示,第二层608可以覆盖半导体模块610的上表面610A,或者它可以使上表面610A裸露。在后一种情况下,第二层608的上表面608A与半导体模块610的上表面610A可以是共面的。
替代在附图6B和6C中所示的工艺步骤,当将第二层608施加在第一层606上时,半导体模块610可以已经包括在第二层608中。
如在附图6D中所示,可以将布线层612施加在第二层608的上表面608A上。施加布线层612可以包括光掩模施涂、蚀刻工艺、激光钻孔工艺、金属施涂工艺和金属结构化工艺。金属施涂工艺可以包括电镀工艺。金属结构化工艺可以包括光掩模施涂和蚀刻工艺。
布线层612可以配置成提供用于将有源电设备或无源电设备安装到上表面608A上的接合盘。布线层612可以包括配置用于将有源电设备或无源电设备焊接到可焊接盘上的可焊接盘。此外,布线层612可以配置成提供至半导体模块610的电连接。替代地,半导体模块610可以在上表面608A上暴露并且因此可以自己提供至外部的电接触。
附图7示出用于制造比如电子设备100、400和600的电子设备的方法700的流程图。方法700包括第一方法步骤701:提供包括金属层的衬底。方法700包括第二方法步骤702:将电绝缘层布置在衬底的上方。方法700包括第三方法步骤703:将半导体模块布置在电绝缘层的上方。方法700包括第四方法步骤704:执行层合工艺,其中在电绝缘层的上方形成层合层,其中半导体模块至少部分嵌入层合层。
可以按顺序执行方法步骤701-704。然而,也有可能同时执行某些方法步骤。例如,在根据本发明的用于制造电子设备的方法的一个示例中,可以同时执行方法步骤703和704。
方法700可以包括额外的方法步骤。例如,在衬底上方布置绝缘层之后(参照方法步骤702),方法700可以包括固化绝缘层的方法步骤,例如在使用加热工艺的情况下。可以在方法步骤703之前执行固化绝缘层。
可以作为批处理来执行方法700。就是说,可以在使用方法700的情况下同时制造大批的电子设备。
虽然已经关于多个实施方案中的仅仅一个公开了本发明的具体特征或方面,但当对于任何给定或具体应用而言期望并且有利时,这个特征或方面可以与其他实施方案的一个或多个其他特征或方面结合。此外,就在详细描述或权利要求中使用的术语“包含”、“具有”、“有”或其其他变型而言,这些术语旨在以类似于术语“包括”的方式进行理解。同样,术语“示例性”仅仅意味着一个示例,而非最好或最佳。也将理解的是,出于简化和易于理解的目的,在此所描绘的特征和/或元件相对于彼此以具体尺寸图示,并且实际尺寸可以与在此图示的不同。
虽然已经详细描述了本发明及其优点,但是将理解的是,在不偏离由所附权利要求限定的本发明的构思和保护范围的情况下在此可以进行各种改变、替换和替代。本申请旨在覆盖在此所讨论的特定方面的任意改变或变化。因此,本发明旨在仅由权利要求及其等同方案限定。
Claims (21)
1.一种电子设备,所述电子设备包括:
包括金属层的衬底;
设置在所述衬底上的电绝缘层;
设置在所述电绝缘层上的半导体模块,其中,所述半导体模块包括载体、附接到所述载体上的至少一个半导体芯片和设置在载体之上且至少部分包封所述至少一个半导体芯片的包封材料;以及
设置在所述电绝缘层上并且至少部分嵌入所述半导体模块的侧表面的层合层。
2.根据权利要求1所述的电子设备,其中,所述衬底包括绝缘金属衬底、金属芯或金属基层。
3.根据权利要求1或2所述的电子设备,其中,所述衬底的厚度位于从0.5mm到5.0mm的范围内。
4.根据权利要求1或2所述的电子设备,其中,所述金属层包括铝和铜中的至少一种。
5.根据权利要求1或2所述的电子设备,其中,所述电绝缘层和所述层合层中的至少一个包括层合体、环氧树脂、酰亚胺、热塑性塑料和热固性塑料聚合物或聚合物共混物中的至少一种。
6.根据权利要求1或2所述的电子设备,其中,所述层合层的厚度位于从30μm到300μm的范围内。
7.根据权利要求5所述的电子设备,其中,所述环氧树脂是填充的环氧树脂。
8.根据权利要求1或2所述的电子设备,其中,所述载体包括引线框架。
9.根据权利要求1或2所述的电子设备,其中,所述半导体模块设置在所述电绝缘层的上方,其中,所述载体面向所述电绝缘层。
10.根据权利要求1或2所述的电子设备,其中,所述半导体模块包括功率半导体芯片。
11.根据权利要求5所述的电子设备,其中,所述环氧树脂是玻璃纤维填充的环氧树脂。
12.根据权利要求1、2、7、11之一所述的电子设备,其中,所述半导体模块还包括第一电布线层,所述第一电布线层设置在所述半导体模块周边上并且配置成将所述至少一个半导体芯片电连接到所述半导体模块的外部。
13.根据权利要求1、2、7、11之一所述的电子设备,其中,所述层合层的第一侧面向所述绝缘层,其中,所述层合层的与所述第一侧相反的第二侧与所述半导体模块的一侧是共面的。
14.根据权利要求1、2、7、11之一所述的电子设备,其中,所述层合层的第一侧面向所述电绝缘层,其中,所述层合层的与所述第一侧相反的第二侧包括第二电布线层。
15.根据权利要求1所述的电子设备,所述电子设备还包括:设置在所述层合层上方的电部件。
16.根据权利要求15所述的电子设备,其中,所述电部件包括分立器件、无源部件和半导体芯片中的至少一个。
17.根据权利要求1、2、7、11、15-16之一所述的电子设备,其中,所述半导体模块是半桥、H桥和3相桥中的至少一种的一部分。
18.根据权利要求1、2、7、11、15-16之一所述的电子设备,其中,所述层合层包括预浸材料和铜箔。
19.一种电子设备,所述电子设备包括:
金属衬底;
布置在所述金属衬底上方的半导体模块,其中,所述半导体模块包括载体、附接到所述载体上的至少一个半导体芯片和设置在载体之上且至少部分包封所述至少一个半导体芯片的包封材料,所述半导体模块还包括面向所述金属衬底的第一主表面、背离所述金属衬底的第二主表面以及从所述第一主表面延伸至所述第二主表面的侧表面;
布置在所述金属衬底上方的层合体,其中,所述半导体模块嵌入所述层合体,其中,所述半导体模块的所述侧表面由所述层合体覆盖,其中,所述层合体布置在所述金属衬底和所述半导体模块的所述第一主表面之间并且使所述金属衬底相对于所述半导体模块电绝缘;
布置在所述层合体的上表面上的导电布线层,其中,所述布线层从所述层合体暴露并且提供至所述半导体模块的电耦合。
20.一种用于制造电子设备的方法,所述方法包括:
提供包括金属层的衬底;
提供半导体模块,其包括载体、附接到所述载体上的至少一个半导体芯片和设置在载体之上且至少部分包封所述至少一个半导体芯片的包封材料;
在所述衬底的上方布置电绝缘层;
在所述电绝缘层的上方布置所述半导体模块;以及
执行层合工艺,其中,在所述电绝缘层的上方形成层合层,其中,所述半导体模块至少部分嵌入所述层合层。
21.根据权利要求20所述的方法,其中,在所述衬底的上方布置所述电绝缘层包括层合工艺。
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