JP2013093579A5 - - Google Patents
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- Publication number
- JP2013093579A5 JP2013093579A5 JP2012234265A JP2012234265A JP2013093579A5 JP 2013093579 A5 JP2013093579 A5 JP 2013093579A5 JP 2012234265 A JP2012234265 A JP 2012234265A JP 2012234265 A JP2012234265 A JP 2012234265A JP 2013093579 A5 JP2013093579 A5 JP 2013093579A5
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- JP
- Japan
- Prior art keywords
- substrate
- doped region
- depth
- concentration
- conductivity type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims 30
- 239000004065 semiconductor Substances 0.000 claims 13
- 230000000149 penetrating effect Effects 0.000 claims 4
- 239000002184 metal Substances 0.000 claims 3
- 238000009792 diffusion process Methods 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/279,776 | 2011-10-24 | ||
| US13/279,776 US8518764B2 (en) | 2011-10-24 | 2011-10-24 | Semiconductor structure having a through substrate via (TSV) and method for forming |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013093579A JP2013093579A (ja) | 2013-05-16 |
| JP2013093579A5 true JP2013093579A5 (enExample) | 2015-11-26 |
| JP6222800B2 JP6222800B2 (ja) | 2017-11-01 |
Family
ID=48108619
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012234265A Expired - Fee Related JP6222800B2 (ja) | 2011-10-24 | 2012-10-24 | 基板貫通バイアを有する半導体構造および製造方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8518764B2 (enExample) |
| JP (1) | JP6222800B2 (enExample) |
| CN (1) | CN103066059B (enExample) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9275933B2 (en) * | 2012-06-19 | 2016-03-01 | United Microelectronics Corp. | Semiconductor device |
| US9196671B2 (en) * | 2012-11-02 | 2015-11-24 | International Business Machines Corporation | Integrated decoupling capacitor utilizing through-silicon via |
| KR101968351B1 (ko) * | 2013-01-28 | 2019-08-13 | 서울대학교산학협력단 | 반도체 장치 및 그 제조 방법 |
| US8927427B2 (en) * | 2013-04-29 | 2015-01-06 | International Business Machines Corporation | Anticipatory implant for TSV |
| JP6219140B2 (ja) * | 2013-11-22 | 2017-10-25 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US9373613B2 (en) * | 2013-12-31 | 2016-06-21 | Skyworks Solutions, Inc. | Amplifier voltage limiting using punch-through effect |
| JP6305067B2 (ja) | 2014-01-09 | 2018-04-04 | 株式会社東芝 | 半導体装置の製造方法 |
| WO2015136821A1 (ja) | 2014-03-12 | 2015-09-17 | 学校法人慶應義塾 | 積層半導体集積回路装置 |
| CN104392993A (zh) * | 2014-12-08 | 2015-03-04 | 江苏博普电子科技有限责任公司 | 一种基于高阻硅衬底的ldmos mmic芯片 |
| US10242932B2 (en) | 2016-06-24 | 2019-03-26 | Infineon Technologies Ag | LDMOS transistor and method |
| US9875933B2 (en) | 2016-06-24 | 2018-01-23 | Infineon Technologies Ag | Substrate and method including forming a via comprising a conductive liner layer and conductive plug having different microstructures |
| US9960229B2 (en) | 2016-06-24 | 2018-05-01 | Infineon Technologies Ag | Semiconductor device including a LDMOS transistor |
| US10622284B2 (en) | 2016-06-24 | 2020-04-14 | Infineon Technologies Ag | LDMOS transistor and method |
| US10050139B2 (en) | 2016-06-24 | 2018-08-14 | Infineon Technologies Ag | Semiconductor device including a LDMOS transistor and method |
| WO2018004662A1 (en) * | 2016-07-01 | 2018-01-04 | Intel Corporation | Methods and apparatus to prevent through-silicon-via shorting |
| US10020270B2 (en) * | 2016-09-29 | 2018-07-10 | Infineon Technologies Ag | Semiconductor device including a LDMOS transistor, monolithic microwave integrated circuit and method |
| JP7341927B2 (ja) | 2020-03-12 | 2023-09-11 | キオクシア株式会社 | 半導体記憶装置 |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4070485B2 (ja) * | 2001-05-09 | 2008-04-02 | 株式会社東芝 | 半導体装置 |
| JP2002343968A (ja) * | 2001-05-14 | 2002-11-29 | Toshiba Corp | 半導体装置、半導体装置の製造方法 |
| US6521923B1 (en) * | 2002-05-25 | 2003-02-18 | Sirenza Microdevices, Inc. | Microwave field effect transistor structure on silicon carbide substrate |
| US7667268B2 (en) * | 2002-08-14 | 2010-02-23 | Advanced Analogic Technologies, Inc. | Isolated transistor |
| US6949445B2 (en) | 2003-03-12 | 2005-09-27 | Micron Technology, Inc. | Method of forming angled implant for trench isolation |
| US7102184B2 (en) | 2003-06-16 | 2006-09-05 | Micron Technology, Inc. | Image device and photodiode structure |
| US7087959B2 (en) * | 2004-08-18 | 2006-08-08 | Agere Systems Inc. | Metal-oxide-semiconductor device having an enhanced shielding structure |
| US7670896B2 (en) * | 2006-11-16 | 2010-03-02 | International Business Machines Corporation | Method and structure for reducing floating body effects in MOSFET devices |
| US7843064B2 (en) | 2007-12-21 | 2010-11-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and process for the formation of TSVs |
| JP2009170747A (ja) * | 2008-01-18 | 2009-07-30 | Toshiba Corp | 半導体装置及びその製造方法 |
| US7960781B2 (en) * | 2008-09-08 | 2011-06-14 | Semiconductor Components Industries, Llc | Semiconductor device having vertical charge-compensated structure and sub-surface connecting layer and method |
| US7884016B2 (en) | 2009-02-12 | 2011-02-08 | Asm International, N.V. | Liner materials and related processes for 3-D integration |
| JP2011009595A (ja) * | 2009-06-29 | 2011-01-13 | Renesas Electronics Corp | 半導体装置および半導体装置の製造方法 |
| CN102148251B (zh) * | 2011-01-10 | 2013-01-30 | 电子科技大学 | Soi横向mosfet器件和集成电路 |
-
2011
- 2011-10-24 US US13/279,776 patent/US8518764B2/en active Active
-
2012
- 2012-10-24 CN CN201210407786.XA patent/CN103066059B/zh active Active
- 2012-10-24 JP JP2012234265A patent/JP6222800B2/ja not_active Expired - Fee Related
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