JP2013026625A5 - - Google Patents
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- Publication number
- JP2013026625A5 JP2013026625A5 JP2012159378A JP2012159378A JP2013026625A5 JP 2013026625 A5 JP2013026625 A5 JP 2013026625A5 JP 2012159378 A JP2012159378 A JP 2012159378A JP 2012159378 A JP2012159378 A JP 2012159378A JP 2013026625 A5 JP2013026625 A5 JP 2013026625A5
- Authority
- JP
- Japan
- Prior art keywords
- connection terminal
- substrate
- insulating film
- chip
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 45
- 239000000758 substrate Substances 0.000 claims 34
- 238000000034 method Methods 0.000 claims 11
- 239000002184 metal Substances 0.000 claims 9
- 229910052751 metal Inorganic materials 0.000 claims 9
- 238000004519 manufacturing process Methods 0.000 claims 6
- 239000002245 particle Substances 0.000 claims 6
- 230000000149 penetrating effect Effects 0.000 claims 5
- 229920006254 polymer film Polymers 0.000 claims 5
- 230000000903 blocking effect Effects 0.000 claims 4
- 238000010030 laminating Methods 0.000 claims 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims 2
- 230000003746 surface roughness Effects 0.000 claims 2
- 238000005229 chemical vapour deposition Methods 0.000 claims 1
- 238000005520 cutting process Methods 0.000 claims 1
- 238000007772 electroless plating Methods 0.000 claims 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 239000011810 insulating material Substances 0.000 claims 1
- 230000001678 irradiating effect Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 claims 1
- 239000011133 lead Substances 0.000 claims 1
- 229910052759 nickel Inorganic materials 0.000 claims 1
- 229910052755 nonmetal Inorganic materials 0.000 claims 1
- 150000002843 nonmetals Chemical group 0.000 claims 1
- 229920000052 poly(p-xylylene) Polymers 0.000 claims 1
- 229920000642 polymer Polymers 0.000 claims 1
- 230000001681 protective effect Effects 0.000 claims 1
- 239000002356 single layer Substances 0.000 claims 1
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2011-0071016 | 2011-07-18 | ||
| KR20110071016 | 2011-07-18 | ||
| KR10-2012-0029739 | 2012-03-23 | ||
| KR1020120029739A KR101936788B1 (ko) | 2011-07-18 | 2012-03-23 | 반도체 패키지 및 그 제조 방법 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2013026625A JP2013026625A (ja) | 2013-02-04 |
| JP2013026625A5 true JP2013026625A5 (enExample) | 2015-06-18 |
Family
ID=47534598
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012159378A Pending JP2013026625A (ja) | 2011-07-18 | 2012-07-18 | 半導体パッケージ及びその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US8970046B2 (enExample) |
| JP (1) | JP2013026625A (enExample) |
| CN (1) | CN102891136B (enExample) |
| DE (1) | DE102012212611A1 (enExample) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015126102A (ja) * | 2013-12-26 | 2015-07-06 | 株式会社東芝 | 半導体装置 |
| US9305901B2 (en) * | 2014-07-17 | 2016-04-05 | Seagate Technology Llc | Non-circular die package interconnect |
| CN104409448A (zh) * | 2014-11-21 | 2015-03-11 | 三星半导体(中国)研究开发有限公司 | 半导体封装及其制造方法 |
| JP6560496B2 (ja) * | 2015-01-26 | 2019-08-14 | 株式会社ジェイデバイス | 半導体装置 |
| US10486548B2 (en) * | 2016-01-13 | 2019-11-26 | Ford Global Technologies, Llc | Power inverter for a vehicle |
| US9875993B2 (en) * | 2016-01-14 | 2018-01-23 | Micron Technology, Inc. | Semiconductor devices with duplicated die bond pads and associated device packages and methods of manufacture |
| KR102556327B1 (ko) * | 2016-04-20 | 2023-07-18 | 삼성전자주식회사 | 패키지 모듈 기판 및 반도체 모듈 |
| US20200066701A1 (en) * | 2016-09-28 | 2020-02-27 | Intel Corporation | Stacked chip package having substrate interposer and wirebonds |
| KR102337647B1 (ko) | 2017-05-17 | 2021-12-08 | 삼성전자주식회사 | 반도체 패키지 및 그 제조 방법 |
| KR102432379B1 (ko) * | 2017-10-16 | 2022-08-12 | 삼성전자주식회사 | 반도체 소자 |
| US10879225B2 (en) * | 2018-10-24 | 2020-12-29 | Samsung Electronics Co., Ltd. | Semiconductor package and method of manufacturing semiconductor package |
| US11024604B2 (en) * | 2019-08-10 | 2021-06-01 | Amkor Technology Singapore Holding Pte. Ltd. | Semiconductor devices and methods of manufacturing semiconductor devices |
| US11171109B2 (en) | 2019-09-23 | 2021-11-09 | Micron Technology, Inc. | Techniques for forming semiconductor device packages and related packages, intermediate products, and methods |
| WO2021102876A1 (en) * | 2019-11-29 | 2021-06-03 | Yangtze Memory Technologies Co., Ltd. | Chip package structure and manufacturing method thereof |
| US11373956B2 (en) | 2020-01-14 | 2022-06-28 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
| CN115699295A (zh) * | 2020-05-26 | 2023-02-03 | 罗姆股份有限公司 | 半导体装置以及半导体装置的制造方法 |
| US11647633B2 (en) | 2020-07-13 | 2023-05-09 | Micron Technology, Inc. | Methods used in forming integrated circuitry comprising a stack comprising vertically-alternating first tiers and second tiers with the stack comprising a cavity therein that comprises a stair-step structure |
| US11942430B2 (en) * | 2021-07-12 | 2024-03-26 | Micron Technology, Inc. | Stacked die modules for semiconductor device assemblies and methods of manufacturing stacked die modules |
| US20230035470A1 (en) * | 2021-07-30 | 2023-02-02 | Stmicroelectronics S.R.L. | Method of coupling semiconductor dice and corresponding semiconductor device |
| US12500148B2 (en) | 2021-07-30 | 2025-12-16 | Stmicroelectronics S.R.L. | Method of coupling semiconductor dice, tool for use therein and corresponding semiconductor device |
| CN114093822B (zh) * | 2021-11-03 | 2025-10-31 | 长江存储科技有限责任公司 | 半导体封装结构及制备方法、待封装芯片的制备方法 |
| US20230260949A1 (en) * | 2022-02-16 | 2023-08-17 | Western Digital Technologies, Inc. | Semiconductor Device with Protective Layer |
| US12374647B2 (en) * | 2022-05-12 | 2025-07-29 | Renesas Electronics Corporation | Semiconductor device including chip-to-chip bonding |
| US12374620B2 (en) * | 2022-06-01 | 2025-07-29 | Micron Technology, Inc. | Memory circuitry and method used in forming memory circuitry |
| CN115642142A (zh) * | 2022-10-19 | 2023-01-24 | 深圳市汇顶科技股份有限公司 | 芯片堆叠封装结构及封装方法 |
Family Cites Families (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6621155B1 (en) * | 1999-12-23 | 2003-09-16 | Rambus Inc. | Integrated circuit device having stacked dies and impedance balanced transmission lines |
| JP2001291721A (ja) * | 2000-04-06 | 2001-10-19 | Nec Corp | 配線構造、導電パターンの形成方法、半導体装置および半導体装置の製造方法 |
| JP4707283B2 (ja) * | 2001-08-30 | 2011-06-22 | イビデン株式会社 | 半導体チップ |
| JP3612310B2 (ja) * | 2002-06-18 | 2005-01-19 | 株式会社東芝 | 半導体装置 |
| US6756252B2 (en) * | 2002-07-17 | 2004-06-29 | Texas Instrument Incorporated | Multilayer laser trim interconnect method |
| JP2004063569A (ja) * | 2002-07-25 | 2004-02-26 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
| JP2004063808A (ja) * | 2002-07-29 | 2004-02-26 | Matsushita Electric Works Ltd | 半導体装置のパッケージ構造とその製造方法 |
| JP4209178B2 (ja) * | 2002-11-26 | 2009-01-14 | 新光電気工業株式会社 | 電子部品実装構造及びその製造方法 |
| US20040108217A1 (en) | 2002-12-05 | 2004-06-10 | Dubin Valery M. | Methods for forming copper interconnect structures by co-plating of noble metals and structures formed thereby |
| WO2004077548A2 (de) | 2003-02-28 | 2004-09-10 | Siemens Aktiengesellschaft | Verbindungstechnik für leistungshalbleiter |
| US7242102B2 (en) * | 2004-07-08 | 2007-07-10 | Spansion Llc | Bond pad structure for copper metallization having increased reliability and method for fabricating same |
| US20060267173A1 (en) * | 2005-05-26 | 2006-11-30 | Sandisk Corporation | Integrated circuit package having stacked integrated circuits and method therefor |
| JP2007059851A (ja) * | 2005-08-26 | 2007-03-08 | Toyota Industries Corp | 半導体装置の製造方法 |
| KR20070048952A (ko) | 2005-11-07 | 2007-05-10 | 삼성전자주식회사 | 내부 접속 단자를 갖는 멀티 칩 패키지 |
| TWI358815B (en) * | 2006-09-12 | 2012-02-21 | Chipmos Technologies Inc | Stacked chip package structure with lead-frame hav |
| KR100825793B1 (ko) * | 2006-11-10 | 2008-04-29 | 삼성전자주식회사 | 배선을 구비하는 배선 필름, 상기 배선 필름을 구비하는반도체 패키지 및 상기 반도체 패키지의 제조방법 |
| US8723332B2 (en) * | 2007-06-11 | 2014-05-13 | Invensas Corporation | Electrically interconnected stacked die assemblies |
| KR100920039B1 (ko) | 2007-06-21 | 2009-10-07 | 주식회사 하이닉스반도체 | 적층형 반도체 패키지 및 이의 제조 방법 |
| KR101013545B1 (ko) | 2007-07-26 | 2011-02-14 | 주식회사 하이닉스반도체 | 스택 패키지 및 그의 제조방법 |
| JP5134899B2 (ja) * | 2007-09-26 | 2013-01-30 | 三洋電機株式会社 | 半導体モジュール、半導体モジュールの製造方法および携帯機器 |
| JP2010050286A (ja) * | 2008-08-21 | 2010-03-04 | Toshiba Corp | 半導体装置 |
| US20100090347A1 (en) * | 2008-10-09 | 2010-04-15 | Saylor Stephen D | Apparatus and method for contact formation in semiconductor devices |
| US8482137B2 (en) * | 2009-01-27 | 2013-07-09 | Panasonic Corporation | Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same |
| JP2011243790A (ja) * | 2010-05-19 | 2011-12-01 | Panasonic Electric Works Co Ltd | 配線方法、並びに、表面に配線が設けられた構造物、半導体装置、配線基板、メモリカード、電気デバイス、モジュール及び多層回路基板 |
-
2012
- 2012-07-11 US US13/546,163 patent/US8970046B2/en active Active
- 2012-07-18 DE DE102012212611A patent/DE102012212611A1/de not_active Withdrawn
- 2012-07-18 CN CN201210249511.8A patent/CN102891136B/zh active Active
- 2012-07-18 JP JP2012159378A patent/JP2013026625A/ja active Pending
-
2015
- 2015-02-03 US US14/613,154 patent/US9281235B2/en active Active
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