DE102012212611A1 - Halbleiterpackung und Verfahren zur Herstellung derselben - Google Patents

Halbleiterpackung und Verfahren zur Herstellung derselben Download PDF

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Publication number
DE102012212611A1
DE102012212611A1 DE102012212611A DE102012212611A DE102012212611A1 DE 102012212611 A1 DE102012212611 A1 DE 102012212611A1 DE 102012212611 A DE102012212611 A DE 102012212611A DE 102012212611 A DE102012212611 A DE 102012212611A DE 102012212611 A1 DE102012212611 A1 DE 102012212611A1
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Prior art keywords
insulating layer
connection terminal
substrate
chip
semiconductor
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DE102012212611A
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German (de)
English (en)
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DE102012212611A8 (de
Inventor
YoungLyong KIM
Taehoon Kim
ChulYong JANG
Jongho Lee
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Priority claimed from KR1020120029739A external-priority patent/KR101936788B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE102012212611A1 publication Critical patent/DE102012212611A1/de
Publication of DE102012212611A8 publication Critical patent/DE102012212611A8/de
Withdrawn legal-status Critical Current

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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE102012212611A 2011-07-18 2012-07-18 Halbleiterpackung und Verfahren zur Herstellung derselben Withdrawn DE102012212611A1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20110071016 2011-07-18
KR10-2011-0071016 2011-07-18
KR1020120029739A KR101936788B1 (ko) 2011-07-18 2012-03-23 반도체 패키지 및 그 제조 방법
KR10-2012-0029739 2012-03-23

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Publication Number Publication Date
DE102012212611A1 true DE102012212611A1 (de) 2013-03-07
DE102012212611A8 DE102012212611A8 (de) 2013-05-08

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DE102012212611A Withdrawn DE102012212611A1 (de) 2011-07-18 2012-07-18 Halbleiterpackung und Verfahren zur Herstellung derselben

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US (2) US8970046B2 (enExample)
JP (1) JP2013026625A (enExample)
CN (1) CN102891136B (enExample)
DE (1) DE102012212611A1 (enExample)

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Publication number Priority date Publication date Assignee Title
JP2015126102A (ja) * 2013-12-26 2015-07-06 株式会社東芝 半導体装置
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