JP2010123592A5 - - Google Patents

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Publication number
JP2010123592A5
JP2010123592A5 JP2008292987A JP2008292987A JP2010123592A5 JP 2010123592 A5 JP2010123592 A5 JP 2010123592A5 JP 2008292987 A JP2008292987 A JP 2008292987A JP 2008292987 A JP2008292987 A JP 2008292987A JP 2010123592 A5 JP2010123592 A5 JP 2010123592A5
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JP
Japan
Prior art keywords
semiconductor element
support plate
semiconductor
terminal
resin layer
Prior art date
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Application number
JP2008292987A
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English (en)
Japanese (ja)
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JP5173758B2 (ja
JP2010123592A (ja
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Priority to JP2008292987A priority Critical patent/JP5173758B2/ja
Priority claimed from JP2008292987A external-priority patent/JP5173758B2/ja
Priority to US12/616,324 priority patent/US8110921B2/en
Publication of JP2010123592A publication Critical patent/JP2010123592A/ja
Publication of JP2010123592A5 publication Critical patent/JP2010123592A5/ja
Application granted granted Critical
Publication of JP5173758B2 publication Critical patent/JP5173758B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2008292987A 2008-11-17 2008-11-17 半導体パッケージの製造方法 Active JP5173758B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008292987A JP5173758B2 (ja) 2008-11-17 2008-11-17 半導体パッケージの製造方法
US12/616,324 US8110921B2 (en) 2008-11-17 2009-11-11 Semiconductor package and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008292987A JP5173758B2 (ja) 2008-11-17 2008-11-17 半導体パッケージの製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012197608A Division JP2013016842A (ja) 2012-09-07 2012-09-07 半導体パッケージ

Publications (3)

Publication Number Publication Date
JP2010123592A JP2010123592A (ja) 2010-06-03
JP2010123592A5 true JP2010123592A5 (enExample) 2011-11-10
JP5173758B2 JP5173758B2 (ja) 2013-04-03

Family

ID=42171346

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008292987A Active JP5173758B2 (ja) 2008-11-17 2008-11-17 半導体パッケージの製造方法

Country Status (2)

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US (1) US8110921B2 (enExample)
JP (1) JP5173758B2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5161732B2 (ja) * 2008-11-11 2013-03-13 新光電気工業株式会社 半導体装置の製造方法
JP2013093453A (ja) * 2011-10-26 2013-05-16 Nippon Dempa Kogyo Co Ltd 電子モジュールとその製造方法
TWM458672U (zh) * 2013-04-10 2013-08-01 新世紀光電股份有限公司 光源模組
US9230936B2 (en) * 2014-03-04 2016-01-05 Qualcomm Incorporated Integrated device comprising high density interconnects and redistribution layers
US10720415B2 (en) * 2016-11-01 2020-07-21 Innolux Corporation Display device and method for forming the same
US20180177045A1 (en) * 2016-12-21 2018-06-21 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Embedding Component in Component Carrier by Component Fixation Structure
CN108347820B (zh) * 2017-01-25 2020-09-15 奥特斯(中国)有限公司 容纳部件的基底结构上的高导热涂层
US10957672B2 (en) * 2017-11-13 2021-03-23 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure and method of manufacturing the same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
JPH08162604A (ja) * 1994-12-01 1996-06-21 Toyota Motor Corp マルチチップモジュールの製造方法
JP3728847B2 (ja) 1997-02-04 2005-12-21 株式会社日立製作所 マルチチップモジュールおよびその製造方法
JP2004172489A (ja) * 2002-11-21 2004-06-17 Nec Semiconductors Kyushu Ltd 半導体装置およびその製造方法
WO2005031861A1 (en) * 2003-09-26 2005-04-07 Tessera, Inc. Structure and method of making capped chips including a flowable conductive medium
JP4158714B2 (ja) * 2004-02-06 2008-10-01 松下電器産業株式会社 電子部品実装済基板の製造方法
JP4568215B2 (ja) * 2005-11-30 2010-10-27 三洋電機株式会社 回路装置および回路装置の製造方法
JP4588091B2 (ja) * 2008-02-29 2010-11-24 三洋電機株式会社 半導体モジュールの製造方法
JP2010087229A (ja) * 2008-09-30 2010-04-15 Sanyo Electric Co Ltd 半導体モジュール、半導体モジュールの製造方法および携帯機器

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