JP4158714B2 - 電子部品実装済基板の製造方法 - Google Patents
電子部品実装済基板の製造方法 Download PDFInfo
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- JP4158714B2 JP4158714B2 JP2004030346A JP2004030346A JP4158714B2 JP 4158714 B2 JP4158714 B2 JP 4158714B2 JP 2004030346 A JP2004030346 A JP 2004030346A JP 2004030346 A JP2004030346 A JP 2004030346A JP 4158714 B2 JP4158714 B2 JP 4158714B2
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- 239000000758 substrate Substances 0.000 title claims description 147
- 238000000034 method Methods 0.000 title claims description 38
- 238000004519 manufacturing process Methods 0.000 title claims description 34
- 229920005989 resin Polymers 0.000 claims description 215
- 239000011347 resin Substances 0.000 claims description 215
- 239000000463 material Substances 0.000 claims description 112
- 239000004020 conductor Substances 0.000 claims description 78
- 238000003825 pressing Methods 0.000 claims description 19
- 229920005992 thermoplastic resin Polymers 0.000 description 30
- 238000010438 heat treatment Methods 0.000 description 20
- 239000004065 semiconductor Substances 0.000 description 20
- 230000009477 glass transition Effects 0.000 description 18
- 239000003990 capacitor Substances 0.000 description 16
- 229920001187 thermosetting polymer Polymers 0.000 description 11
- 238000012546 transfer Methods 0.000 description 10
- 229910052802 copper Inorganic materials 0.000 description 9
- 238000007650 screen-printing Methods 0.000 description 8
- -1 polyethylene terephthalate Polymers 0.000 description 7
- 229920000139 polyethylene terephthalate Polymers 0.000 description 7
- 239000005020 polyethylene terephthalate Substances 0.000 description 7
- 238000007646 gravure printing Methods 0.000 description 6
- 238000007645 offset printing Methods 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 6
- 238000001179 sorption measurement Methods 0.000 description 6
- BZHJMEDXRYGGRV-UHFFFAOYSA-N Vinyl chloride Chemical compound ClC=C BZHJMEDXRYGGRV-UHFFFAOYSA-N 0.000 description 4
- XECAHXYUAAWDEL-UHFFFAOYSA-N acrylonitrile butadiene styrene Chemical compound C=CC=C.C=CC#N.C=CC1=CC=CC=C1 XECAHXYUAAWDEL-UHFFFAOYSA-N 0.000 description 4
- 239000004676 acrylonitrile butadiene styrene Substances 0.000 description 4
- 229920000122 acrylonitrile butadiene styrene Polymers 0.000 description 4
- 238000006073 displacement reaction Methods 0.000 description 4
- 238000010292 electrical insulation Methods 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000515 polycarbonate Polymers 0.000 description 4
- 239000004417 polycarbonate Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 238000007639 printing Methods 0.000 description 4
- 229920002050 silicone resin Polymers 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000000839 emulsion Substances 0.000 description 3
- 238000007373 indentation Methods 0.000 description 3
- 239000005011 phenolic resin Substances 0.000 description 3
- 239000002904 solvent Substances 0.000 description 3
- 150000001252 acrylic acid derivatives Chemical class 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000001723 curing Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000004377 microelectronic Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 239000004820 Pressure-sensitive adhesive Substances 0.000 description 1
- 238000003848 UV Light-Curing Methods 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- HQQADJVZYDDRJT-UHFFFAOYSA-N ethene;prop-1-ene Chemical group C=C.CC=C HQQADJVZYDDRJT-UHFFFAOYSA-N 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000005001 laminate film Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H01L2924/01006—Carbon [C]
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- H01L2924/01047—Silver [Ag]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01078—Platinum [Pt]
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- H01L2924/14—Integrated circuits
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18162—Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
図1は、本発明の第1の実施の形態に係る電子部品実装済基板の断面図である。
図4は、本発明の第2の実施の形態に係る電子部品実装済基板の製造方法を示す説明図である。第1の実施の形態において、電子部品100の搬送時等に発生する位置ズレを予め防止する工程を付加するものである。
図5は、本発明の第3の実施の形態に係る電子部品実装済基板の製造方法を示す説明図である。第1の実施の形態を、高さの異なる電子部品101に適用するものである。
図6は、本発明の第4の実施の形態に係る電子部品実装済基板の断面図である。図1と同じ構成については同じ符号を用いる。
図7は、本発明の第5の実施の形態に係る電子部品実装済基板の製造方法を示す説明図である。図7において、図2と同じ構成については同じ符号を用いる。
図8は、本発明の第6の実施の形態に係る電子部品実装済基板の製造方法を示す説明図である。図8において、図7と同じ構成については同じ符号を用いる。
図9は、本発明の第7の実施の形態に係る電子部品実装済基板の製造方法を示す説明図である。第5の実施の形態を、高さの異なる電子部品101に適用したものである。
図10は、本発明の第8の実施の形態に係る電子部品実装済基板の製造方法を示す説明図である。図10において、図8と同じ構成については同じ符号を用いる。第6の実施の形態を、高さの異なる電子部品101に適用したものである。
図11は、本発明の第9の実施の形態に係る電子部品実装済基板の製造方法を示す説明図である。図11において、図2と同じ構成については同じ符号を用いる。
102,132 突起状電極
104 導体回路パターン
110 第1の樹脂基材
112 押しのけられた第1の樹脂基材
120 第2の樹脂基材
130 導電性の接続部
140,142 窪み部
150,152,170 支持冶具
160 転写部材
180 樹脂基材
182 押しのけられた樹脂基材
190 吸着冶具
200,210,212 熱プレス板
214 凸部または凹部
Claims (1)
- 少なくとも片面に突起状電極を有する複数の電子部品を、前記電子部品が埋没しない深さを有し、前記電子部品が嵌入される窪み部を有する支持冶具の前記窪み部に、前記電子部品を嵌入し位置固定する工程と、
前記電子部品の前記突起状電極の少なくとも表面部が、第1の樹脂基材の一方の表面に露出するように前記電子部品と前記第1の樹脂基材を押圧して圧入し、前記電子部品を含む第1の樹脂基材上に第2の樹脂基材を形成し、第1の樹脂基材と第2の樹脂基材とで電子部品を内蔵する工程と、
前記樹脂基材の前記一方の表面上に前記電子部品の前記突起状電極と接続される導体回路パターンを形成する工程と、
を有することを特徴とする電子部品実装済基板の製造方法。
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JP2004030346A JP4158714B2 (ja) | 2004-02-06 | 2004-02-06 | 電子部品実装済基板の製造方法 |
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JP2004030346A JP4158714B2 (ja) | 2004-02-06 | 2004-02-06 | 電子部品実装済基板の製造方法 |
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JP2005223183A JP2005223183A (ja) | 2005-08-18 |
JP4158714B2 true JP4158714B2 (ja) | 2008-10-01 |
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Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101305479B (zh) | 2005-11-09 | 2010-05-19 | 皇家飞利浦电子股份有限公司 | 装配照明元件到衬底上 |
KR100900817B1 (ko) * | 2007-11-27 | 2009-06-04 | 삼성전기주식회사 | 코어기판 제조용 지그, 이를 이용한 코어기판 제조방법 및코어기판 |
JP5161732B2 (ja) * | 2008-11-11 | 2013-03-13 | 新光電気工業株式会社 | 半導体装置の製造方法 |
JP5173758B2 (ja) * | 2008-11-17 | 2013-04-03 | 新光電気工業株式会社 | 半導体パッケージの製造方法 |
JP5845775B2 (ja) * | 2011-09-26 | 2016-01-20 | 住友電気工業株式会社 | 薄膜個片の接合方法 |
JP2014017364A (ja) * | 2012-07-09 | 2014-01-30 | Panasonic Corp | 部品実装基板の製造システム、および製造方法 |
JP2013016842A (ja) * | 2012-09-07 | 2013-01-24 | Shinko Electric Ind Co Ltd | 半導体パッケージ |
JP5773105B2 (ja) * | 2013-04-10 | 2015-09-02 | 株式会社村田製作所 | 樹脂多層基板およびその製造方法 |
JP6103054B2 (ja) | 2013-06-18 | 2017-03-29 | 株式会社村田製作所 | 樹脂多層基板の製造方法 |
JP6467775B2 (ja) * | 2014-03-10 | 2019-02-13 | 富士通株式会社 | 部品内蔵基板の製造方法 |
US10757813B2 (en) * | 2018-10-12 | 2020-08-25 | Advanced Semiconductor Engineering, Inc. | Embedded component package structure and manufacturing method thereof |
CN111199984B (zh) * | 2018-11-20 | 2022-12-02 | 中芯集成电路(宁波)有限公司 | 摄像组件及其封装方法、镜头模组、电子设备 |
CN111200702B (zh) * | 2018-11-20 | 2022-03-15 | 中芯集成电路(宁波)有限公司 | 摄像组件及其封装方法、镜头模组、电子设备 |
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CN111200700B (zh) * | 2018-11-20 | 2021-10-19 | 中芯集成电路(宁波)有限公司 | 摄像组件及其封装方法、镜头模组、电子设备 |
US11495588B2 (en) * | 2018-12-07 | 2022-11-08 | Advanced Micro Devices, Inc. | Circuit board with compact passive component arrangement |
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