JP2011502352A - 半導体デバイスのためのボンド・パッド・サポート構造 - Google Patents
半導体デバイスのためのボンド・パッド・サポート構造 Download PDFInfo
- Publication number
- JP2011502352A JP2011502352A JP2010530988A JP2010530988A JP2011502352A JP 2011502352 A JP2011502352 A JP 2011502352A JP 2010530988 A JP2010530988 A JP 2010530988A JP 2010530988 A JP2010530988 A JP 2010530988A JP 2011502352 A JP2011502352 A JP 2011502352A
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- Prior art keywords
- bond pad
- metallization layer
- metal
- passivation
- passivation structure
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Layout of the interconnection structure
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
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- H01L2224/05075—Plural internal layers
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/0554—External layer
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- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
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- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
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- H01L2924/3025—Electromagnetic shielding
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US2007/083183 WO2009058143A1 (en) | 2007-10-31 | 2007-10-31 | Bond pad support structure for semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2011502352A true JP2011502352A (ja) | 2011-01-20 |
| JP2011502352A5 JP2011502352A5 (enExample) | 2011-10-20 |
Family
ID=39523612
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010530988A Pending JP2011502352A (ja) | 2007-10-31 | 2007-10-31 | 半導体デバイスのためのボンド・パッド・サポート構造 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8183698B2 (enExample) |
| EP (2) | EP2568498A3 (enExample) |
| JP (1) | JP2011502352A (enExample) |
| KR (1) | KR101360815B1 (enExample) |
| WO (1) | WO2009058143A1 (enExample) |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7888257B2 (en) | 2007-10-10 | 2011-02-15 | Agere Systems Inc. | Integrated circuit package including wire bonds |
| EP2568498A3 (en) | 2007-10-31 | 2013-04-24 | Agere Systems Inc. | Bond pad support structure for semiconductor device |
| JP5362296B2 (ja) * | 2008-09-03 | 2013-12-11 | 矢崎総業株式会社 | 端子金具 |
| KR20110056005A (ko) * | 2009-11-20 | 2011-05-26 | 삼성전자주식회사 | 반도체 장치의 배선 구조체 |
| JP5730062B2 (ja) * | 2011-02-21 | 2015-06-03 | 株式会社ジャパンディスプレイ | 表示装置 |
| WO2011107044A2 (zh) * | 2011-04-19 | 2011-09-09 | 华为技术有限公司 | 焊盘的防水结构、防水焊盘和形成该防水结构的方法 |
| US8435824B2 (en) * | 2011-07-07 | 2013-05-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Backside illumination sensor having a bonding pad structure and method of making the same |
| US8994181B2 (en) * | 2011-08-18 | 2015-03-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bond pad structure to reduce bond pad corrosion |
| ITMI20111568A1 (it) * | 2011-08-31 | 2013-03-01 | St Microelectronics Srl | Struttura di monitoraggio di un pad di connessione e relativo metodo di rilevazione di alterazioni significative |
| US9064707B2 (en) * | 2011-09-14 | 2015-06-23 | Micronas Gmbh | Bonding contact area on a semiconductor substrate |
| US20130241058A1 (en) * | 2012-03-16 | 2013-09-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wire Bonding Structures for Integrated Circuits |
| US9166054B2 (en) * | 2012-04-13 | 2015-10-20 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| KR101933015B1 (ko) | 2012-04-19 | 2018-12-27 | 삼성전자주식회사 | 반도체 장치의 패드 구조물, 그의 제조 방법 및 패드 구조물을 포함하는 반도체 패키지 |
| US20130320522A1 (en) * | 2012-05-30 | 2013-12-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Re-distribution Layer Via Structure and Method of Making Same |
| US9455226B2 (en) | 2013-02-01 | 2016-09-27 | Mediatek Inc. | Semiconductor device allowing metal layer routing formed directly under metal pad |
| US9536833B2 (en) | 2013-02-01 | 2017-01-03 | Mediatek Inc. | Semiconductor device allowing metal layer routing formed directly under metal pad |
| CN104952822A (zh) * | 2014-03-25 | 2015-09-30 | 中芯国际集成电路制造(上海)有限公司 | 一种焊盘结构 |
| US9245846B2 (en) * | 2014-05-06 | 2016-01-26 | International Business Machines Corporation | Chip with programmable shelf life |
| US9960130B2 (en) | 2015-02-06 | 2018-05-01 | UTAC Headquarters Pte. Ltd. | Reliable interconnect |
| EP3131118B1 (en) * | 2015-08-12 | 2019-04-17 | MediaTek Inc. | Semiconductor device allowing metal layer routing formed directly under metal pad |
| US9922947B2 (en) * | 2016-04-28 | 2018-03-20 | Stmicroelectronics S.R.L. | Bonding pad structure over active circuitry |
| US10896885B2 (en) * | 2017-09-13 | 2021-01-19 | Polar Semiconductor, Llc | High-voltage MOSFET structures |
| US11705395B2 (en) * | 2018-06-25 | 2023-07-18 | Intel Corporation | Core fill to reduce dishing and metal pillar fill to increase metal density of interconnects |
| TWI731431B (zh) * | 2019-10-04 | 2021-06-21 | 旺宏電子股份有限公司 | 接墊結構 |
| US11004833B1 (en) * | 2020-02-17 | 2021-05-11 | Xilinx, Inc. | Multi-chip stacked devices |
| US11521904B2 (en) * | 2020-03-11 | 2022-12-06 | Texas Instruments Incorporated | Wire bond damage detector including a detection bond pad over a first and a second connected structures |
| US11348883B2 (en) * | 2020-03-27 | 2022-05-31 | Texas Instruments Incorporated | High voltage isolation barrier with electric overstress integrity |
| US11243573B2 (en) * | 2020-04-28 | 2022-02-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package, display apparatus and manufacturing method of semiconductor package |
| JP7519248B2 (ja) * | 2020-09-18 | 2024-07-19 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
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- 2007-10-31 EP EP20120195715 patent/EP2568498A3/en not_active Ceased
- 2007-10-31 EP EP07854541A patent/EP2195837A1/en not_active Withdrawn
- 2007-10-31 KR KR1020107007877A patent/KR101360815B1/ko active Active
- 2007-10-31 JP JP2010530988A patent/JP2011502352A/ja active Pending
- 2007-10-31 US US12/678,405 patent/US8183698B2/en active Active
- 2007-10-31 WO PCT/US2007/083183 patent/WO2009058143A1/en not_active Ceased
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Also Published As
| Publication number | Publication date |
|---|---|
| EP2568498A3 (en) | 2013-04-24 |
| EP2568498A2 (en) | 2013-03-13 |
| KR101360815B1 (ko) | 2014-02-11 |
| EP2195837A1 (en) | 2010-06-16 |
| WO2009058143A1 (en) | 2009-05-07 |
| US8183698B2 (en) | 2012-05-22 |
| KR20100077161A (ko) | 2010-07-07 |
| US20100201000A1 (en) | 2010-08-12 |
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