JP2011210901A - デプレッション型ｍｏｓトランジスタ - Google Patents

デプレッション型ｍｏｓトランジスタ Download PDF

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Publication number
JP2011210901A
JP2011210901A JP2010076366A JP2010076366A JP2011210901A JP 2011210901 A JP2011210901 A JP 2011210901A JP 2010076366 A JP2010076366 A JP 2010076366A JP 2010076366 A JP2010076366 A JP 2010076366A JP 2011210901 A JP2011210901 A JP 2011210901A
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JP
Japan
Prior art keywords
type
mos transistor
impurity region
region
concentration impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2010076366A
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English (en)
Japanese (ja)
Other versions
JP2011210901A5 (enExample
Inventor
Hirobumi Harada
博文 原田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP2010076366A priority Critical patent/JP2011210901A/ja
Priority to TW100109362A priority patent/TWI521702B/zh
Priority to US13/065,674 priority patent/US9013007B2/en
Priority to KR1020110027639A priority patent/KR101781220B1/ko
Priority to CN201110086411.3A priority patent/CN102208445B/zh
Publication of JP2011210901A publication Critical patent/JP2011210901A/ja
Publication of JP2011210901A5 publication Critical patent/JP2011210901A5/ja
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/637—Lateral IGFETs having no inversion channels, e.g. buried channel lateral IGFETs, normally-on lateral IGFETs or depletion-mode lateral IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2010076366A 2010-03-29 2010-03-29 デプレッション型ｍｏｓトランジスタ Withdrawn JP2011210901A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2010076366A JP2011210901A (ja) 2010-03-29 2010-03-29 デプレッション型ｍｏｓトランジスタ
TW100109362A TWI521702B (zh) 2010-03-29 2011-03-18 Often open the lack of type MOS transistor
US13/065,674 US9013007B2 (en) 2010-03-29 2011-03-28 Semiconductor device having depletion type MOS transistor
KR1020110027639A KR101781220B1 (ko) 2010-03-29 2011-03-28 디프레션형 ｍｏｓ 트랜지스터를 갖는 반도체 장치
CN201110086411.3A CN102208445B (zh) 2010-03-29 2011-03-29 具有耗尽型mos晶体管的半导体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010076366A JP2011210901A (ja) 2010-03-29 2010-03-29 デプレッション型ｍｏｓトランジスタ

Publications (2)

Publication Number Publication Date
JP2011210901A true JP2011210901A (ja) 2011-10-20
JP2011210901A5 JP2011210901A5 (enExample) 2013-02-28

Family

ID=44655390

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010076366A Withdrawn JP2011210901A (ja) 2010-03-29 2010-03-29 デプレッション型ｍｏｓトランジスタ

Country Status (5)

Country Link
US (1) US9013007B2 (enExample)
JP (1) JP2011210901A (enExample)
KR (1) KR101781220B1 (enExample)
CN (1) CN102208445B (enExample)
TW (1) TWI521702B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018129536A (ja) * 2013-06-20 2018-08-16 ストレイティオ， インコーポレイテッドＳｔｒａｔｉｏ， Ｉｎｃ． Ｃｍｏｓ画像センサ用のゲート制御型電荷変調デバイス

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6095927B2 (ja) * 2012-09-27 2017-03-15 エスアイアイ・セミコンダクタ株式会社 半導体集積回路装置
US9478571B1 (en) * 2013-05-24 2016-10-25 Mie Fujitsu Semiconductor Limited Buried channel deeply depleted channel transistor
US9559203B2 (en) * 2013-07-15 2017-01-31 Analog Devices, Inc. Modular approach for reducing flicker noise of MOSFETs
CN114551595B (zh) * 2020-11-20 2023-10-31 苏州华太电子技术股份有限公司 应用于射频放大的沟道掺杂调制rfldmos器件及制法
JP2022108157A (ja) * 2021-01-12 2022-07-25 キオクシア株式会社 半導体装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4951879A (enExample) * 1972-09-20 1974-05-20
JPH0369167A (ja) * 1989-08-08 1991-03-25 Nec Corp 埋め込み型ｐチャネルｍｏｓトランジスタ及びその製造方法
JPH09116154A (ja) * 1995-10-10 1997-05-02 Motorola Inc 傾斜チャネル半導体素子およびその製造方法
JP2004079810A (ja) * 2002-08-19 2004-03-11 Fujitsu Ltd 半導体装置およびその製造方法、ｃｍｏｓ集積回路装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4212683A (en) * 1978-03-27 1980-07-15 Ncr Corporation Method for making narrow channel FET
US4575746A (en) * 1983-11-28 1986-03-11 Rca Corporation Crossunders for high density SOS integrated circuits
KR960008735B1 (en) * 1993-04-29 1996-06-29 Samsung Electronics Co Ltd Mos transistor and the manufacturing method thereof
KR100189964B1 (ko) * 1994-05-16 1999-06-01 윤종용 고전압 트랜지스터 및 그 제조방법
JPH10135349A (ja) * 1996-10-25 1998-05-22 Ricoh Co Ltd Ｃｍｏｓ型半導体装置及びその製造方法
JP2001352057A (ja) * 2000-06-09 2001-12-21 Mitsubishi Electric Corp 半導体装置、およびその製造方法
KR100343472B1 (ko) * 2000-08-31 2002-07-18 박종섭 모스 트랜지스터의 제조방법
US6887758B2 (en) * 2002-10-09 2005-05-03 Freescale Semiconductor, Inc. Non-volatile memory device and method for forming
KR100540341B1 (ko) * 2003-12-31 2006-01-11 동부아남반도체 주식회사 반도체 소자 제조방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4951879A (enExample) * 1972-09-20 1974-05-20
JPH0369167A (ja) * 1989-08-08 1991-03-25 Nec Corp 埋め込み型ｐチャネルｍｏｓトランジスタ及びその製造方法
JPH09116154A (ja) * 1995-10-10 1997-05-02 Motorola Inc 傾斜チャネル半導体素子およびその製造方法
JP2004079810A (ja) * 2002-08-19 2004-03-11 Fujitsu Ltd 半導体装置およびその製造方法、ｃｍｏｓ集積回路装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018129536A (ja) * 2013-06-20 2018-08-16 ストレイティオ， インコーポレイテッドＳｔｒａｔｉｏ， Ｉｎｃ． Ｃｍｏｓ画像センサ用のゲート制御型電荷変調デバイス

Also Published As

Publication number Publication date
CN102208445A (zh) 2011-10-05
TWI521702B (zh) 2016-02-11
TW201203548A (en) 2012-01-16
US20110233669A1 (en) 2011-09-29
KR20110109948A (ko) 2011-10-06
CN102208445B (zh) 2016-03-30
US9013007B2 (en) 2015-04-21
KR101781220B1 (ko) 2017-09-22

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