JP2010232230A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP2010232230A
JP2010232230A JP2009075277A JP2009075277A JP2010232230A JP 2010232230 A JP2010232230 A JP 2010232230A JP 2009075277 A JP2009075277 A JP 2009075277A JP 2009075277 A JP2009075277 A JP 2009075277A JP 2010232230 A JP2010232230 A JP 2010232230A
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JP
Japan
Prior art keywords
film
resin film
semiconductor device
thin film
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009075277A
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English (en)
Japanese (ja)
Other versions
JP2010232230A5 (enExample
Inventor
Ichiro Mihara
一郎 三原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP2009075277A priority Critical patent/JP2010232230A/ja
Priority to US12/729,558 priority patent/US8278734B2/en
Priority to TW099108633A priority patent/TW201044555A/zh
Priority to CN201010143224XA priority patent/CN101847610B/zh
Publication of JP2010232230A publication Critical patent/JP2010232230A/ja
Publication of JP2010232230A5 publication Critical patent/JP2010232230A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0236—Shape of the insulating layers therebetween
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/024—Material of the insulating layers therebetween
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Pressure Sensors (AREA)
  • Measuring Fluid Pressure (AREA)
JP2009075277A 2009-03-25 2009-03-25 半導体装置およびその製造方法 Pending JP2010232230A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2009075277A JP2010232230A (ja) 2009-03-25 2009-03-25 半導体装置およびその製造方法
US12/729,558 US8278734B2 (en) 2009-03-25 2010-03-23 Semiconductor device and manufacturing method thereof
TW099108633A TW201044555A (en) 2009-03-25 2010-03-24 Semiconductor device and manufacturing method thereof
CN201010143224XA CN101847610B (zh) 2009-03-25 2010-03-24 半导体装置及其制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009075277A JP2010232230A (ja) 2009-03-25 2009-03-25 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2010232230A true JP2010232230A (ja) 2010-10-14
JP2010232230A5 JP2010232230A5 (enExample) 2011-03-31

Family

ID=42772157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009075277A Pending JP2010232230A (ja) 2009-03-25 2009-03-25 半導体装置およびその製造方法

Country Status (4)

Country Link
US (1) US8278734B2 (enExample)
JP (1) JP2010232230A (enExample)
CN (1) CN101847610B (enExample)
TW (1) TW201044555A (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5758605B2 (ja) * 2010-09-30 2015-08-05 株式会社テラプローブ 半導体装置及びその製造方法
US9219106B2 (en) * 2011-08-05 2015-12-22 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated inductor
US8952530B2 (en) * 2012-09-14 2015-02-10 Taiwan Semiconductor Manufacturing Company, Ltd. Post passivation interconnect structures and methods for forming the same
US10157865B2 (en) * 2013-03-08 2018-12-18 Mitsubishi Electric Corporation Semiconductor device with metal film and method for manufacturing semiconductor device with metal film
DE102017210654B4 (de) * 2017-06-23 2022-06-09 Infineon Technologies Ag Elektronische Vorrichtung, die ein einen Hohlraum umfassendes Umverdrahtungsschicht-Pad umfasst
US12476228B2 (en) 2022-08-25 2025-11-18 Qualcomm Incorporated Wafer level packaging process for thin film inductors

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000235979A (ja) * 1999-02-15 2000-08-29 Casio Comput Co Ltd 半導体装置
JP2002057292A (ja) * 2000-08-11 2002-02-22 Iep Technologies:Kk 半導体装置および半導体装置の製造方法
JP2003347410A (ja) * 2002-05-27 2003-12-05 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2004221297A (ja) * 2003-01-15 2004-08-05 Seiko Epson Corp 半導体装置の製造方法及び半導体装置
JP2006041357A (ja) * 2004-07-29 2006-02-09 Fujikura Ltd 半導体装置およびその製造方法
JP2008210828A (ja) * 2007-02-23 2008-09-11 Casio Comput Co Ltd 半導体装置およびその製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3615206B2 (ja) * 2001-11-15 2005-02-02 富士通株式会社 半導体装置の製造方法
SG119329A1 (en) * 2004-07-29 2006-02-28 Fujikura Ltd Semiconductor device and method for manufacturing the same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000235979A (ja) * 1999-02-15 2000-08-29 Casio Comput Co Ltd 半導体装置
JP2002057292A (ja) * 2000-08-11 2002-02-22 Iep Technologies:Kk 半導体装置および半導体装置の製造方法
JP2003347410A (ja) * 2002-05-27 2003-12-05 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP2004221297A (ja) * 2003-01-15 2004-08-05 Seiko Epson Corp 半導体装置の製造方法及び半導体装置
JP2006041357A (ja) * 2004-07-29 2006-02-09 Fujikura Ltd 半導体装置およびその製造方法
JP2008210828A (ja) * 2007-02-23 2008-09-11 Casio Comput Co Ltd 半導体装置およびその製造方法

Also Published As

Publication number Publication date
CN101847610A (zh) 2010-09-29
TW201044555A (en) 2010-12-16
CN101847610B (zh) 2012-12-19
US20100244188A1 (en) 2010-09-30
US8278734B2 (en) 2012-10-02

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