JP2010192653A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2010192653A
JP2010192653A JP2009035114A JP2009035114A JP2010192653A JP 2010192653 A JP2010192653 A JP 2010192653A JP 2009035114 A JP2009035114 A JP 2009035114A JP 2009035114 A JP2009035114 A JP 2009035114A JP 2010192653 A JP2010192653 A JP 2010192653A
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JP
Japan
Prior art keywords
circuit board
semiconductor device
covering portion
mold body
resin
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Pending
Application number
JP2009035114A
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English (en)
Japanese (ja)
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JP2010192653A5 (enExample
Inventor
Masahiro Ono
正浩 小野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
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Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Priority to JP2009035114A priority Critical patent/JP2010192653A/ja
Priority to US12/702,804 priority patent/US8247898B2/en
Publication of JP2010192653A publication Critical patent/JP2010192653A/ja
Publication of JP2010192653A5 publication Critical patent/JP2010192653A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3737—Organic materials with or without a thermoconductive filler
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
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    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
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    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/0919—Exposing inner circuit layers or metal planes at the side edge of the printed circuit board [PCB] or at the walls of large holes
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305—Moulding and encapsulation
    • H05K2203/1316—Moulded encapsulation of mounted components

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP2009035114A 2009-02-18 2009-02-18 半導体装置 Pending JP2010192653A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009035114A JP2010192653A (ja) 2009-02-18 2009-02-18 半導体装置
US12/702,804 US8247898B2 (en) 2009-02-18 2010-02-09 Semiconductor device and semiconductor device mounted structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009035114A JP2010192653A (ja) 2009-02-18 2009-02-18 半導体装置

Publications (2)

Publication Number Publication Date
JP2010192653A true JP2010192653A (ja) 2010-09-02
JP2010192653A5 JP2010192653A5 (enExample) 2012-02-23

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JP2009035114A Pending JP2010192653A (ja) 2009-02-18 2009-02-18 半導体装置

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US (1) US8247898B2 (enExample)
JP (1) JP2010192653A (enExample)

Cited By (6)

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Publication number Priority date Publication date Assignee Title
JP2017130545A (ja) * 2016-01-20 2017-07-27 ニチコン株式会社 フィルムコンデンサ
WO2018092529A1 (ja) * 2016-11-16 2018-05-24 株式会社村田製作所 高周波モジュール
CN108431946A (zh) * 2016-01-07 2018-08-21 赛灵思公司 具有加强件的堆叠的硅封装组件
WO2023139979A1 (ja) * 2022-01-20 2023-07-27 株式会社村田製作所 高周波モジュール、高周波モジュールの製造方法、及び、通信装置
US12389528B2 (en) 2020-06-10 2025-08-12 Murata Manufacturing Co., Ltd. Module
US12495485B2 (en) 2020-06-10 2025-12-09 Murata Manufacturing Co., Ltd. Module and component

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KR20130026062A (ko) * 2011-09-05 2013-03-13 삼성전자주식회사 인쇄회로기판 조립체 및 그 제조방법
US9202789B2 (en) * 2014-04-16 2015-12-01 Qualcomm Incorporated Die package comprising die-to-wire connector and a wire-to-die connector configured to couple to a die package
KR102508526B1 (ko) 2016-08-24 2023-03-09 삼성전자주식회사 반도체 패키지 제조 방법
WO2019181590A1 (ja) * 2018-03-23 2019-09-26 株式会社村田製作所 高周波モジュールおよび通信装置
CN214123862U (zh) * 2018-03-23 2021-09-03 株式会社村田制作所 高频模块和通信装置
CN109390242B (zh) * 2018-09-27 2020-04-28 日月光半导体（威海）有限公司 一种功率器件封装结构及其制备方法
JP2021106341A (ja) * 2019-12-26 2021-07-26 株式会社村田製作所 高周波モジュールおよび通信装置

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JP2001210737A (ja) * 2000-01-27 2001-08-03 Tdk Corp 半導体チップパッケージおよびその製造方法
JP2003100924A (ja) * 2001-09-21 2003-04-04 Kyocera Corp 半導体装置
JP2005109306A (ja) * 2003-10-01 2005-04-21 Matsushita Electric Ind Co Ltd 電子部品パッケージおよびその製造方法
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JP2008288610A (ja) * 2008-07-17 2008-11-27 Taiyo Yuden Co Ltd 回路モジュールの製造方法

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JP3793421B2 (ja) 2001-04-10 2006-07-05 アルプス電気株式会社 面実装型電子回路ユニット及び面実装型電子回路ユニットの製造方法
US6856007B2 (en) * 2001-08-28 2005-02-15 Tessera, Inc. High-frequency chip packages
JP3966172B2 (ja) 2002-12-09 2007-08-29 松下電器産業株式会社 モジュール部品の製造方法
JP2005183430A (ja) 2003-12-16 2005-07-07 Matsushita Electric Ind Co Ltd 電子部品内蔵モジュール
JP2006196857A (ja) 2004-12-16 2006-07-27 Murata Mfg Co Ltd ケース付き複合回路基板及びその製造方法
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