JP2010183828A5 - - Google Patents

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Publication number
JP2010183828A5
JP2010183828A5 JP2010022902A JP2010022902A JP2010183828A5 JP 2010183828 A5 JP2010183828 A5 JP 2010183828A5 JP 2010022902 A JP2010022902 A JP 2010022902A JP 2010022902 A JP2010022902 A JP 2010022902A JP 2010183828 A5 JP2010183828 A5 JP 2010183828A5
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Japan
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coupled
control circuit
energy
loads
period
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JP2010022902A
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Japanese (ja)
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JP2010183828A (ja
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Priority claimed from US12/366,574 external-priority patent/US7995359B2/en
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JP2010022902A 2009-02-05 2010-02-04 制御回路、および電力変換器の出力を制御するための方法 Pending JP2010183828A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/366,574 US7995359B2 (en) 2009-02-05 2009-02-05 Method and apparatus for implementing an unregulated dormant mode with an event counter in a power converter

Related Child Applications (1)

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JP2014181557A Division JP5995173B2 (ja) 2009-02-05 2014-09-05 制御回路および電力変換器

Publications (2)

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JP2010183828A JP2010183828A (ja) 2010-08-19
JP2010183828A5 true JP2010183828A5 (enExample) 2013-03-21

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JP2010022902A Pending JP2010183828A (ja) 2009-02-05 2010-02-04 制御回路、および電力変換器の出力を制御するための方法
JP2014181557A Expired - Fee Related JP5995173B2 (ja) 2009-02-05 2014-09-05 制御回路および電力変換器

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US (7) US7995359B2 (enExample)
EP (2) EP3358734A1 (enExample)
JP (2) JP2010183828A (enExample)
CN (4) CN103337960A (enExample)

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