JP2010140948A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 79
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 230000001681 protective effect Effects 0.000 claims abstract description 57
- 229920005989 resin Polymers 0.000 claims abstract description 49
- 239000011347 resin Substances 0.000 claims abstract description 49
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- 238000007789 sealing Methods 0.000 claims abstract description 42
- 239000012790 adhesive layer Substances 0.000 claims abstract description 16
- 239000010410 layer Substances 0.000 claims description 42
- 238000000034 method Methods 0.000 claims description 29
- 238000005979 thermal decomposition reaction Methods 0.000 claims description 29
- 239000000853 adhesive Substances 0.000 claims description 12
- 230000001070 adhesive effect Effects 0.000 claims description 12
- 239000007788 liquid Substances 0.000 claims description 11
- 229910000679 solder Inorganic materials 0.000 claims description 7
- 239000011521 glass Substances 0.000 claims description 5
- 238000000227 grinding Methods 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 230000001678 irradiating effect Effects 0.000 claims description 4
- 230000002745 absorbent Effects 0.000 claims description 3
- 239000002250 absorbent Substances 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 25
- 229910052710 silicon Inorganic materials 0.000 abstract description 25
- 239000010703 silicon Substances 0.000 abstract description 25
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 238000002161 passivation Methods 0.000 description 12
- 238000000197 pyrolysis Methods 0.000 description 8
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000010953 base metal Substances 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000006096 absorbing agent Substances 0.000 description 1
- PSNPEOOEWZZFPJ-UHFFFAOYSA-N alumane;yttrium Chemical compound [AlH3].[Y] PSNPEOOEWZZFPJ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
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Abstract
【解決手段】 まず、ダイシングストリート22およびその両側に対応する部分における半導体ウエハ21および封止膜12等に溝28を形成する。この状態では、溝28の形成により、半導体ウエハ21は個々のシリコン基板1に分離されている。次に、溝28内を含む各シリコン基板1の底面に樹脂保護膜11を形成する。この場合、半導体ウエハ21は個々のシリコン基板1に分離されているが、柱状電極10および封止膜12の上面に接着層23等を介してサポート板25が貼り付けられているので、樹脂保護膜11の形成に際し、個々に分離されたシリコン基板1を含む全体が反りにくいようにすることができる。
【選択図】 図8
Description
請求項2に記載の発明は、請求項1に記載の発明において、前記外部接続用バンプ電極および前記封止膜と前記
熱分解層との間に接着層を形成する工程を含むことを特徴とするものである。
請求項3に記載の発明は、請求項2に記載の発明において、前記サポート板を貼り付ける工程は、前記外部接続用バンプ電極および前記封止膜上に紫外線硬化型の液状接着剤を塗布する工程と、予め前記サポート板の一面に前記熱分解層を形成する工程と、前記液状接着剤に予め前記サポート板の一面に形成された前記熱分解層を貼り合せる工程と、紫外線を照射して前記液状接着剤を硬化させて前記接着層を形成する工程とを含むことを特徴とするものである。
請求項4に記載の発明は、請求項3に記載の発明において、前記液状接着剤に予め前記サポート板の一面に形成された前記熱分解層を貼り合せる工程は真空下で行うことを特徴とするものである。
請求項5に記載の発明は、請求項3に記載の発明において、前記サポート板はガラス板からなることを特徴とするものである。
請求項6に記載の発明は、請求項1に記載の発明において、前記サポート板を貼り付けた後にまたは貼り付ける前に、前記半導体ウエハの底面側を研削して該半導体ウエハの厚さを薄くする工程を有することを特徴とするものである。
請求項7に記載の発明は、請求項1に記載の発明において、前記樹脂保護膜を形成した後に、前記樹脂保護膜の上面側を研削して該樹脂保護膜の厚さを薄くするとともにその上面を平坦化する工程を有することを特徴とするものである。
請求項8に記載の発明は、請求項1に記載の発明において、前記外部接続用バンプ電極は、前記電極用接続パッド部上に形成された柱状電極であることを特徴とするものである。
請求項9に記載の発明は、請求項8に記載の発明において、前記樹脂保護膜を形成した後に、前記柱状電極上に半田ボールを形成する工程を有することを特徴とするものである。
Garnet)レーザーを照射する。すると、照射されたYAGレーザーのエネルギーは熱分解層24の光吸収剤に吸収され、熱エネルギーに変換される。この変換された熱エネルギーにより、熱分解層24の熱分解性樹脂が熱分解し、この熱分解によりガスが発生する。この発生したガスにより、熱分解層24内に空隙が形成され、熱分解層24がその厚さ方向に自己分離され、すなわち、上層熱分解層24aと下層熱分解層24bとに自己分離される。光熱変換型の熱分解層については、例えば、特開2004−64040号公報に開示されている。
2 接続パッド
3 パッシベーション膜
5 保護膜
7 配線
10 柱状電極
11 樹脂保護膜
12 封止膜
13 半田ボール
21 半導体ウエハ
22 ダイシングストリート
23 接着層
24 熱分解層
25 サポート板
26 ダイシングテープ
27 ブレード
28 溝
Claims (9)
- 一面上に集積回路が形成された半導体ウエハの当該一面上に絶縁膜が形成され、前記絶縁膜上に電極用接続パッド部が前記集積回路に接続されて形成され、前記電極用接続パッド部上に外部接続用バンプ電極が形成され、前記外部接続用バンプ電極の周囲に封止膜が形成されたものを準備する工程と、
前記外部接続用バンプ電極および前記封止膜上にサポート板を光吸収剤および熱分解性樹脂を含む光熱変換型の熱分解層を介して貼り付ける工程と、
ダイシングストリートおよびその両側に対応する部分における前記半導体ウエハの底面側に前記封止膜の厚さの中間位置まで達する溝を形成する工程と、
前記溝内を含む前記半導体ウエハの底面に樹脂保護膜を形成する工程と、
前記サポート板側から前記熱分解層にレーザーを照射する工程と、
前記サポート板を前記前記外部接続用バンプ電極および前記封止膜から剥離する工程と、
前記封止膜および前記樹脂保護膜を前記溝の幅よりも小さい幅で切断する工程と、
を有し、前記半導体基板の側面から前記封止膜の中間位置までの側面および前記半導体基板の底面に前記樹脂保護膜が形成された半導体装置を複数個得ることを特徴とする半導体装置の製造方法。 - 請求項1に記載の発明において、前記外部接続用バンプ電極および前記封止膜と前記
熱分解層との間に接着層を形成する工程を含むことを特徴とする半導体装置の製造方法。 - 請求項2に記載の発明において、前記サポート板を貼り付ける工程は、前記外部接続用バンプ電極および前記封止膜上に紫外線硬化型の液状接着剤を塗布する工程と、予め前記サポート板の一面に前記熱分解層を形成する工程と、前記液状接着剤に予め前記サポート板の一面に形成された前記熱分解層を貼り合せる工程と、紫外線を照射して前記液状接着剤を硬化させて前記接着層を形成する工程とを含むことを特徴とする半導体装置の製造方法。
- 請求項3に記載の発明において、前記液状接着剤に予め前記サポート板の一面に形成された前記熱分解層を貼り合せる工程は真空下で行うことを特徴とする半導体装置の製造方法。
- 請求項3に記載の発明において、前記サポート板はガラス板からなることを特徴とする半導体装置の製造方法。
- 請求項1に記載の発明において、前記サポート板を貼り付けた後にまたは貼り付ける前に、前記半導体ウエハの底面側を研削して該半導体ウエハの厚さを薄くする工程を有することを特徴とする半導体装置の製造方法。
- 請求項1に記載の発明において、前記樹脂保護膜を形成した後に、前記樹脂保護膜の上面側を研削して該樹脂保護膜の厚さを薄くするとともにその上面を平坦化する工程を有することを特徴とする半導体装置の製造方法。
- 請求項1に記載の発明において、前記外部接続用バンプ電極は、前記電極用接続パッド部上に形成された柱状電極であることを特徴とする半導体装置の製造方法。
- 請求項8に記載の発明において、前記樹脂保護膜を形成した後に、前記柱状電極上に半田ボールを形成する工程を有することを特徴とする半導体装置の製造方法。
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US12/632,054 US20100144097A1 (en) | 2008-12-09 | 2009-12-07 | Method of manufacturing semiconductor device in which bottom surface and side surface of semiconductor substrate are covered with resin protective film |
TW098141809A TW201030862A (en) | 2008-12-09 | 2009-12-08 | Method of manufacturing semiconductor device in which bottom surface and side surface of semiconductor substrate are covered with resin protective film |
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JP2013542599A (ja) * | 2010-09-30 | 2013-11-21 | フリースケール セミコンダクター インコーポレイテッド | 半導体ウェハを処理するための方法、半導体ウェハおよび半導体デバイス |
JP5977717B2 (ja) * | 2013-07-29 | 2016-08-24 | 信越化学工業株式会社 | 半導体封止用基材付封止材、半導体封止用基材付封止材の製造方法、及び半導体装置の製造方法 |
KR102261814B1 (ko) | 2014-06-16 | 2021-06-07 | 삼성전자주식회사 | 반도체 패키지의 제조 방법 |
JP2016146395A (ja) | 2015-02-06 | 2016-08-12 | 株式会社テラプローブ | 半導体装置の製造方法及び半導体装置 |
JP6463664B2 (ja) * | 2015-11-27 | 2019-02-06 | 信越化学工業株式会社 | ウエハ加工体及びウエハ加工方法 |
WO2019106846A1 (ja) * | 2017-12-01 | 2019-06-06 | 日立化成株式会社 | 半導体装置の製造方法、仮固定材用樹脂組成物、及び仮固定材用積層フィルム |
JP7193920B2 (ja) * | 2018-03-09 | 2022-12-21 | 株式会社ディスコ | パッケージ基板の加工方法 |
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