JP2009535817A - 溝型半導体デバイスの製造のためのマスク構造 - Google Patents
溝型半導体デバイスの製造のためのマスク構造 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 7
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 claims abstract description 31
- 229910052751 metal Inorganic materials 0.000 claims abstract description 24
- 239000002184 metal Substances 0.000 claims abstract description 24
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 21
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 21
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 20
- 238000005530 etching Methods 0.000 claims abstract description 17
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 9
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 9
- 239000012535 impurity Substances 0.000 claims abstract description 4
- 230000000873 masking effect Effects 0.000 claims abstract 3
- 239000007943 implant Substances 0.000 claims description 8
- 150000002500 ions Chemical class 0.000 claims description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims 4
- 238000000151 deposition Methods 0.000 claims 3
- 229910052759 nickel Inorganic materials 0.000 claims 2
- 229910052715 tantalum Inorganic materials 0.000 claims 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims 2
- 229910052721 tungsten Inorganic materials 0.000 claims 2
- 239000010937 tungsten Substances 0.000 claims 2
- 238000000206 photolithography Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 abstract description 18
- 238000002513 implantation Methods 0.000 abstract description 6
- 229910052710 silicon Inorganic materials 0.000 abstract description 6
- 239000010703 silicon Substances 0.000 abstract description 6
- 235000012431 wafers Nutrition 0.000 abstract 1
- 238000001020 plasma etching Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000005468 ion implantation Methods 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0475—Changing the shape of the semiconductor body, e.g. forming recesses
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/808—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate
- H01L29/8083—Vertical transistors
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Abstract
【解決手段】 シリコンカーバイド又はその他のウエハに溝を形成するための、及び、薄いアルミニウム層とパターン形成されたハードフォトレジストマスクとを含む同様のマスクを用いて溝の壁に対して不純物を注入するためのマスク構造及び方法。薄いLTO酸化物が金属層とハードフォトレジストマスクとの間に配置されてもよい。
【選択図】 図3
Description
11 N+基板ドレイン体
12 N+緩衝層
13 N型ドリフト領域
14 N+ソース領域
20 酸化物障壁
21 アルミニウム層
30 フォトレジスト層
40 窓
50 溝
Claims (23)
- 半導体ウエハの上の薄い金属層と前記金属層の上のフォトレジストとを包含する半導体ウエハを処理するためのハードマスク。
- 前記金属層と前記ウエハとの間に酸化物層を含むことを特徴とする請求項1に記載のハードマスク。
- 前記ウエハが、シリコンカーバイドであることを特徴とする請求項1に記載のハードマスク。
- 前記ウエハが、シリコンカーバイドであることを特徴とする請求項2に記載のハードマスク。
- 前記マスクが、前記ウエハに溝を形成するための溝エッチング具、及び、前記溝の壁に注入物を注入するためのイオン注入具となることを特徴とする請求項1に記載のハードマスク。
- 前記金属層と前記ウエハとの間に酸化物層を含むことを特徴とする請求項5に記載のハードマスク。
- 前記ウエハが、シリコンカーバイドであることを特徴とする請求項5に記載のハードマスク。
- 前記マスクが、前記ウエハに溝を形成するための溝エッチング具、及び、前記溝の壁に注入物を注入するためのイオン注入具となることを特徴とする請求項4に記載のハードマスク。
- 前記溝の壁が、前記ウエハの平面に垂直であって、前記溝を通る垂直線に対して、0°乃至10°の角度をなしていることを特徴とする請求項5に記載のハードマスク。
- 前記薄い金属層が、およそ0.1μm乃至1μmの厚さを有するアルミニウムであることを特徴とする請求項1に記載のハードマスク。
- 前記酸化物層が、およそ0.1μm乃至1.0μmの厚さを有することを特徴とする請求項2に記載のハードマスク。
- 前記酸化物層がおよそ0.1μm乃至1.0μmの厚さを有することを特徴とする請求項10に記載のハードマスク。
- 前記マスクが、前記ウエハに溝を形成するための溝エッチング具、及び、前記溝の壁に注入物を注入するためのイオン注入具となることを特徴とする請求項10に記載のハードマスク。
- 前記マスクが、前記ウエハに溝を形成するための溝エッチング具、及び、前記溝の壁に注入物を注入するためのイオン注入具となることを特徴とする請求項11に記載のハードマスク。
- 前記マスクが、前記ウエハに溝を形成するための溝エッチング具、及び、前記溝の壁に注入物を注入するためのイオン注入具となることを特徴とする請求項12に記載のハードマスク。
- 半導体ウエハの頂面の上に薄い金属層を堆積させる工程と、
前記金属層の上にフォトレジストを堆積させる工程と、
前記フォトレジストの上にパターン形成されたマスクを適用して、前記フォトレジストをフォトリソグラフィー法によって現像することにより、前記マスクのパターンに対応する窓を含むハードフォトレジストマスクを形成する工程と、
前記窓を介して露出された前記薄い金属層の領域を除去する工程と、
前記金属層から除去された領域によって露出した前記ウエハの頂面に溝を形成する工程とを包含することを特徴とする半導体ウエハにおいて溝を形成する方法。 - 前記ウエハ表面に薄い酸化物層を形成する工程と、
その後、
前記薄い酸化物層の上に前記薄い金属層を堆積させる工程と、
前記溝を形成する前に、
前記薄い金属層の対応する領域の除去の後に露出した前記薄い酸化物層の領域を除去する工程とを含むことを特徴とする請求項16に記載の方法。 - 前記薄い金属層が、およそ0.1μm乃至1.0μmの厚さを有するアルミニウムであることを特徴とする請求項16に記載の方法。
- 前記酸化物が、およそ0.1μm乃至1.0μmの厚さを有することを特徴とする請求項17に記載の方法。
- 前記溝の壁に対して制御された不純物を注入する工程と、
前記フォトレジストと薄い金属層とからなるハードマスクによって、前記注入物に対して前記ウエハの表面をマスクする工程とをさらに含むことを特徴とする請求項16に記載の方法。 - 前記溝の壁に対して制御された不純物を注入する工程と、
前記フォトレジストと薄い金属層とからなるハードマスクによって、前記注入物に対して前記ウエハの表面をマスクする工程とをさらに含むことを特徴とする請求項17に記載の方法。 - 前記薄い金属層は、アルミニウム、ニッケル、タングステン、タンタルからなる群から選択され、およそ0.1μm乃至1.0μmの厚さを有することを特徴とする請求項1に記載のハードマスク。
- 前記薄い金属層は、アルミニウム、ニッケル、タングステン、タンタルからなる群から選択され、およそ0.1μm乃至1.0μmの厚さを有することを特徴とする請求項16に記載の方法。
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US79502606P | 2006-04-26 | 2006-04-26 | |
US11/738,802 US7808029B2 (en) | 2006-04-26 | 2007-04-23 | Mask structure for manufacture of trench type semiconductor device |
PCT/US2007/009929 WO2007127197A2 (en) | 2006-04-26 | 2007-04-24 | Mask structure for manufacture of trench type semiconductor device |
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JP2009535817A true JP2009535817A (ja) | 2009-10-01 |
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US (1) | US7808029B2 (ja) |
EP (1) | EP2013661A4 (ja) |
JP (1) | JP2009535817A (ja) |
TW (1) | TWI358750B (ja) |
WO (1) | WO2007127197A2 (ja) |
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WO2010054073A2 (en) | 2008-11-05 | 2010-05-14 | Semisouth Laboratories, Inc. | Vertical junction field effect transistors having sloped sidewalls and methods of making |
CN107256864B (zh) * | 2017-06-09 | 2019-05-10 | 电子科技大学 | 一种碳化硅TrenchMOS器件及其制作方法 |
CN107275196A (zh) * | 2017-06-22 | 2017-10-20 | 中国科学院上海微系统与信息技术研究所 | 一种利用金属/氧化物双层掩膜结构刻蚀SiC的方法 |
RU198647U1 (ru) * | 2020-04-03 | 2020-07-21 | Акционерное общество "ГРУППА КРЕМНИЙ ЭЛ" | Маска для травления полиимидных защитных покрытий полупроводниковых приборов |
US11527412B2 (en) * | 2020-08-09 | 2022-12-13 | Applied Materials, Inc. | Method for increasing photoresist etch selectivity to enable high energy hot implant in SiC devices |
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- 2007-04-23 US US11/738,802 patent/US7808029B2/en active Active
- 2007-04-24 JP JP2009507758A patent/JP2009535817A/ja active Pending
- 2007-04-24 EP EP07755960A patent/EP2013661A4/en not_active Ceased
- 2007-04-24 WO PCT/US2007/009929 patent/WO2007127197A2/en active Application Filing
- 2007-04-25 TW TW096114602A patent/TWI358750B/zh active
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JPS5992549A (ja) * | 1982-11-18 | 1984-05-28 | Toshiba Corp | 半導体装置の製造方法 |
JPH06252365A (ja) * | 1993-02-24 | 1994-09-09 | Matsushita Electron Corp | 半導体記憶装置の製造方法 |
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JP2005019951A (ja) * | 2003-06-06 | 2005-01-20 | Japan Science & Technology Agency | SiC半導体装置の製造方法及びSiC半導体装置 |
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EP2013661A4 (en) | 2011-03-16 |
TW200746260A (en) | 2007-12-16 |
EP2013661A2 (en) | 2009-01-14 |
US7808029B2 (en) | 2010-10-05 |
US20070254452A1 (en) | 2007-11-01 |
TWI358750B (en) | 2012-02-21 |
WO2007127197A2 (en) | 2007-11-08 |
WO2007127197A3 (en) | 2008-07-10 |
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