JP2009117767A - 半導体装置の製造方法及びそれにより製造した半導体装置 - Google Patents

半導体装置の製造方法及びそれにより製造した半導体装置 Download PDF

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Publication number
JP2009117767A
JP2009117767A JP2007292142A JP2007292142A JP2009117767A JP 2009117767 A JP2009117767 A JP 2009117767A JP 2007292142 A JP2007292142 A JP 2007292142A JP 2007292142 A JP2007292142 A JP 2007292142A JP 2009117767 A JP2009117767 A JP 2009117767A
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Prior art keywords
semiconductor chip
semiconductor device
wiring board
wiring
chip
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JP2007292142A
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Japanese (ja)
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JP2009117767A5 (enExample
Inventor
Atsushi Oi
淳 大井
Masahiro Haruhara
昌宏 春原
Tomoji Fujii
朋治 藤井
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2007292142A priority Critical patent/JP2009117767A/ja
Priority to US12/266,075 priority patent/US20090121334A1/en
Priority to TW097143009A priority patent/TW200921821A/zh
Priority to KR1020080110509A priority patent/KR20090048362A/ko
Publication of JP2009117767A publication Critical patent/JP2009117767A/ja
Publication of JP2009117767A5 publication Critical patent/JP2009117767A5/ja
Pending legal-status Critical Current

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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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JP2007292142A 2007-11-09 2007-11-09 半導体装置の製造方法及びそれにより製造した半導体装置 Pending JP2009117767A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2007292142A JP2009117767A (ja) 2007-11-09 2007-11-09 半導体装置の製造方法及びそれにより製造した半導体装置
US12/266,075 US20090121334A1 (en) 2007-11-09 2008-11-06 Manufacturing method of semiconductor apparatus and semiconductor apparatus
TW097143009A TW200921821A (en) 2007-11-09 2008-11-07 Manufacturing method of semiconductor apparatus and semiconductor apparatus
KR1020080110509A KR20090048362A (ko) 2007-11-09 2008-11-07 반도체 장치의 제조 방법 및 반도체 장치

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Application Number Priority Date Filing Date Title
JP2007292142A JP2009117767A (ja) 2007-11-09 2007-11-09 半導体装置の製造方法及びそれにより製造した半導体装置

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JP2009117767A true JP2009117767A (ja) 2009-05-28
JP2009117767A5 JP2009117767A5 (enExample) 2010-11-04

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JP2007292142A Pending JP2009117767A (ja) 2007-11-09 2007-11-09 半導体装置の製造方法及びそれにより製造した半導体装置

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US (1) US20090121334A1 (enExample)
JP (1) JP2009117767A (enExample)
KR (1) KR20090048362A (enExample)
TW (1) TW200921821A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012114431A (ja) * 2010-11-23 2012-06-14 Ibiden Co Ltd 半導体搭載用基板、半導体装置及び半導体装置の製造方法
JP2012160707A (ja) * 2011-01-28 2012-08-23 Samsung Electronics Co Ltd 積層半導体チップ、半導体装置およびこれらの製造方法
JP2013526066A (ja) * 2010-04-29 2013-06-20 日本テキサス・インスツルメンツ株式会社 低減されたダイ歪みアッセンブリのためのパッケージ基板のためのcte補償
JP2013183002A (ja) * 2012-03-01 2013-09-12 Ibiden Co Ltd 電子部品

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2337068A1 (en) 2009-12-18 2011-06-22 Nxp B.V. Pre-soldered leadless package
US8455991B2 (en) * 2010-09-24 2013-06-04 Stats Chippac Ltd. Integrated circuit packaging system with warpage control and method of manufacture thereof
US8410604B2 (en) * 2010-10-26 2013-04-02 Xilinx, Inc. Lead-free structures in a semiconductor device
US9406579B2 (en) * 2012-05-14 2016-08-02 STATS ChipPAC Pte. Ltd. Semiconductor device and method of controlling warpage in semiconductor package
JP6470095B2 (ja) * 2014-07-25 2019-02-13 京セラ株式会社 配線基板
TWI632647B (zh) * 2016-01-18 2018-08-11 矽品精密工業股份有限公司 封裝製程及其所用之封裝基板
US10580710B2 (en) 2017-08-31 2020-03-03 Micron Technology, Inc. Semiconductor device with a protection mechanism and associated systems, devices, and methods
US10381329B1 (en) 2018-01-24 2019-08-13 Micron Technology, Inc. Semiconductor device with a layered protection mechanism and associated systems, devices, and methods
US10475771B2 (en) 2018-01-24 2019-11-12 Micron Technology, Inc. Semiconductor device with an electrically-coupled protection mechanism and associated systems, devices, and methods
JP7189672B2 (ja) * 2018-04-18 2022-12-14 新光電気工業株式会社 半導体装置及びその製造方法
US12205877B2 (en) * 2019-02-21 2025-01-21 AT&S(Chongqing) Company Limited Ultra-thin component carrier having high stiffness and method of manufacturing the same
CN115547846A (zh) * 2019-02-21 2022-12-30 奥特斯科技(重庆)有限公司 部件承载件及其制造方法和电气装置
CN114582731A (zh) * 2022-05-05 2022-06-03 华进半导体封装先导技术研发中心有限公司 一种层叠封装的下封装体结构及其形成方法
CN118782478A (zh) * 2024-07-01 2024-10-15 中科同德微电子科技(大同)有限公司 Igbt芯片封装方法及igbt芯片封装模块

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003163459A (ja) * 2001-11-26 2003-06-06 Sony Corp 高周波回路ブロック体及びその製造方法、高周波モジュール装置及びその製造方法。

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01313969A (ja) * 1988-06-13 1989-12-19 Hitachi Ltd 半導体装置
US5783465A (en) * 1997-04-03 1998-07-21 Lucent Technologies Inc. Compliant bump technology
JP3834426B2 (ja) * 1997-09-02 2006-10-18 沖電気工業株式会社 半導体装置
US5977626A (en) * 1998-08-12 1999-11-02 Industrial Technology Research Institute Thermally and electrically enhanced PBGA package
US6191360B1 (en) * 1999-04-26 2001-02-20 Advanced Semiconductor Engineering, Inc. Thermally enhanced BGA package
TW411037U (en) * 1999-06-11 2000-11-01 Ind Tech Res Inst Integrated circuit packaging structure with dual directions of thermal conduction path
JP2001267473A (ja) * 2000-03-17 2001-09-28 Hitachi Ltd 半導体装置およびその製造方法
US6566748B1 (en) * 2000-07-13 2003-05-20 Fujitsu Limited Flip-chip semiconductor device having an improved reliability
US6432742B1 (en) * 2000-08-17 2002-08-13 St Assembly Test Services Pte Ltd. Methods of forming drop-in heat spreader plastic ball grid array (PBGA) packages
US6525420B2 (en) * 2001-01-30 2003-02-25 Thermal Corp. Semiconductor package with lid heat spreader
US6519154B1 (en) * 2001-08-17 2003-02-11 Intel Corporation Thermal bus design to cool a microelectronic die
US6775140B2 (en) * 2002-10-21 2004-08-10 St Assembly Test Services Ltd. Heat spreaders, heat spreader packages, and fabrication methods for use with flip chip semiconductor devices
US6747350B1 (en) * 2003-06-06 2004-06-08 Silicon Integrated Systems Corp. Flip chip package structure
TWI236118B (en) * 2003-06-18 2005-07-11 Advanced Semiconductor Eng Package structure with a heat spreader and manufacturing method thereof
US7608789B2 (en) * 2004-08-12 2009-10-27 Epcos Ag Component arrangement provided with a carrier substrate
US7348663B1 (en) * 2005-07-15 2008-03-25 Asat Ltd. Integrated circuit package and method for fabricating same
US7787252B2 (en) * 2008-12-04 2010-08-31 Lsi Corporation Preferentially cooled electronic device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003163459A (ja) * 2001-11-26 2003-06-06 Sony Corp 高周波回路ブロック体及びその製造方法、高周波モジュール装置及びその製造方法。

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013526066A (ja) * 2010-04-29 2013-06-20 日本テキサス・インスツルメンツ株式会社 低減されたダイ歪みアッセンブリのためのパッケージ基板のためのcte補償
JP2012114431A (ja) * 2010-11-23 2012-06-14 Ibiden Co Ltd 半導体搭載用基板、半導体装置及び半導体装置の製造方法
US9338886B2 (en) 2010-11-23 2016-05-10 Ibiden Co., Ltd. Substrate for mounting semiconductor, semiconductor device and method for manufacturing semiconductor device
JP2012160707A (ja) * 2011-01-28 2012-08-23 Samsung Electronics Co Ltd 積層半導体チップ、半導体装置およびこれらの製造方法
JP2013183002A (ja) * 2012-03-01 2013-09-12 Ibiden Co Ltd 電子部品

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