CN114582731A - 一种层叠封装的下封装体结构及其形成方法 - Google Patents

一种层叠封装的下封装体结构及其形成方法 Download PDF

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CN114582731A
CN114582731A CN202210478836.7A CN202210478836A CN114582731A CN 114582731 A CN114582731 A CN 114582731A CN 202210478836 A CN202210478836 A CN 202210478836A CN 114582731 A CN114582731 A CN 114582731A
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metal
package
layer
chip
insulating layer
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孙鹏
徐成
曹立强
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National Center for Advanced Packaging Co Ltd
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Abstract

本发明涉及一种层叠封装的下封装体结构的形成方法，包括：在衬底上形成临时键合牺牲层；在临时键合牺牲层上形成绝缘层和金属重布线互连结构；在金属重布线互连结构上形成金属柱和凸点下金属化层；将芯片焊接在凸点下金属化层上，并在芯片与绝缘层之间填充底填胶；芯片的背面贴装散热结构；进行晶圆塑封形成塑封层；去除衬底和临时键合牺牲层，露出部分金属重布线互连结构；以及在露出的金属重布线互连结构上植球，并将塑封晶圆切割，形成单个下封装体结构。

Description

一种层叠封装的下封装体结构及其形成方法
技术领域
本发明涉及半导体封装技术领域，尤其涉及一种层叠封装的下封装体结构及其形成方法。
背景技术
TI和Nokia第一个认识到PoP（package on package，层叠封装）的潜力，并将PoP推向大规模的应用。作为目前封装高密集成的主要方式，PoP得到越来越多的重视。
手机的印刷电路板（PCB）上总有一些存储器和处理器，在过去，这些器件是单独封装、并排分布的。便携式电子产品在“轻薄短小”的外形驱动下，迫切要求具有相同外形尺寸和形状因子的芯片封装进行叠层，PoP叠层封装获得了巨大的成功。PoP设计已经在业界得到比较广泛的开发和应用，当今每个手机中平均至少含有一个PoP叠层封装。
目前，降低叠层高度是PoP所面临的最困难的挑战之一。PoP一般是手机中最厚的芯片封装。早期PoP叠层的最大高度在1.8mm附近，现在PoP叠层的最大高度范围在1.6mm以内。进一步降低PoP叠层的高度，需要更薄的基板和芯片。
图1示出了现有技术的一种层叠封装结构的示意图。
穿塑通孔层叠封装 (TMV PoP) 是最新一代 PoP，它的互连通孔穿透模塑盖，可以满足 0.4 mm节距低功耗 DDR2 储存器接口要求。图2示出了现有技术的一种穿塑通孔层叠封装的下封装体结构示意图。但是，穿塑通孔层叠封装需要基板，基板会增加封装体的厚度。此外，穿塑通孔层叠封装的焊球节距较窄，上封装和下封装之间的互连密度不足。
发明内容
本发明的任务是提供一种层叠封装的下封装体结构及其形成方法，采用多层金属重布线结构代替有机基板，可以在提升高速信号完整性的同时降低封装体的厚度，增加金属热沉，提升了芯片散热能力，采用金属柱实现更小的堆叠接口焊球节距。
在本发明的第一方面，针对现有技术中存在的问题，本发明提供一种层叠封装的下封装体结构的形成方法来解决，包括：
在衬底上形成临时键合牺牲层；
在临时键合牺牲层上形成绝缘层和金属重布线互连结构；
在金属重布线互连结构上形成金属柱和凸点下金属化层；
将芯片焊接在凸点下金属化层上，并在芯片与绝缘层之间填充底填胶；
芯片的背面贴装散热结构；
进行晶圆塑封形成塑封层；
去除衬底和临时键合牺牲层，露出部分金属重布线互连结构；以及
在露出的金属重布线互连结构上植球，并将塑封晶圆切割，形成单个下封装体结构。
进一步地，形成所述凸点下金属化层时，先在所述绝缘层上涂覆光刻胶，通过光刻去除中间部分的金属重布线互连结构上方的光刻胶形成线路图形，在线路图形上电镀金属形成凸点下金属化层，最后除去光刻胶。
进一步地，形成所述金属柱时，先在所述绝缘层上涂覆光刻胶，通过光刻去除边缘部分的金属重布线互连结构上方的光刻胶形成多个孔，电镀孔形成金属柱，最后除去光刻胶。
进一步地，将位于所述芯片的正面的凸点与所述凸点下金属化层焊接。
进一步地，所述散热结构是金属热沉，并且通过热沉粘接材料将所述金属热沉与所述芯片的背面粘接。
进一步地，通过辅助薄膜封装技术将绝缘层至散热结构的上表面之间塑封形成塑封层，露出所述金属柱的顶部和所述散热结构的上表面。
在本发明的第二方面，针对现有技术中存在的问题，本发明提供通过上述层叠封装的下封装体结构的形成方法形成的一种层叠封装的下封装体结构来解决，包括：
芯片，其具有正面和与正面相对的背面；
凸点，其位于所述芯片的正面；
散热结构，其贴装在所述芯片的背面；
绝缘层；
金属重布线互连结构，其位于所述绝缘层中；
凸点下金属化层，其布置在所述金属重布线互连结构上，且与所述凸点焊接；
底填胶，其布置在所述绝缘层与所述芯片之间；
金属柱，其布置在所述金属重布线互连结构上；
焊球，其与所述金属重布线互连结构电连接；以及
塑封层，其将所述绝缘层至所述散热结构的上表面之间塑封。
进一步地，所述散热结构的上表面和所述金属柱的顶部露出所述塑封层。
进一步地，多个所述金属柱位于所述芯片的两侧。
本发明至少具有下列有益效果：本发明公开的一种层叠封装的下封装体结构及其形成方法，采用多层金属重布线结构代替有机基板，可以在提升高速信号完整性的同时降低封装体的厚度；采用晶圆级工艺贴装金属热沉，金属热沉提升了芯片散热能力，采用晶圆级工艺提高了工艺效率；采用金属柱代替穿塑通孔层叠封装的Z方向连接，实现了更小的堆叠接口焊球节距，能够提升层叠封装的上封装和下封装之间的互联密度。
附图说明
为了进一步阐明本发明的各实施例的以上和其它优点和特征，将参考附图来呈现本发明的各实施例的更具体的描述。可以理解，这些附图只描绘本发明的典型实施例，因此将不被认为是对其范围的限制。在附图中，为了清楚明了，相同或相应的部件将用相同或类似的标记表示。
图1示出了现有技术的一种层叠封装结构的示意图；
图2示出了现有技术的一种穿塑通孔层叠封装的下封装体结构示意图；
图3示出了根据本发明的一个实施例的一种层叠封装的下封装体结构的示意图；以及
图4A至图4H示出了根据本发明的一种层叠封装的下封装体结构的形成过程示意图。
具体实施方式
应当指出，各附图中的各组件可能为了图解说明而被夸大地示出，而不一定是比例正确的。
在本发明中，各实施例仅仅旨在说明本发明的方案，而不应被理解为限制性的。
在本发明中，除非特别指出，量词“一个”、“一”并未排除多个元素的场景。
在此还应当指出，在本发明的实施例中，为清楚、简单起见，可能示出了仅仅一部分部件或组件，但是本领域的普通技术人员能够理解，在本发明的教导下，可根据具体场景需要添加所需的部件或组件。
在此还应当指出，在本发明的范围内，“相同”、“相等”、“等于”等措辞并不意味着二者数值绝对相等，而是允许一定的合理误差，也就是说，所述措辞也涵盖了“基本上相同”、“基本上相等”、“基本上等于”。
在此还应当指出，在本发明的描述中，术语“中心”、“纵向”、“横向”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是明示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为明示或暗示相对重要性。
另外，本发明的实施例以特定顺序对工艺步骤进行描述，然而这只是为了方便区分各步骤，而并不是限定各步骤的先后顺序，在本发明的不同实施例中，可根据工艺的调节来调整各步骤的先后顺序。
图3示出了根据本发明的一个实施例的一种层叠封装的下封装体结构的示意图。
如图3所示，一种层叠封装的下封装体结构包括芯片101、凸点102、金属热沉103、绝缘层104、金属重布线互连结构105、凸点下金属化层106、底填胶107、金属柱108、焊球109以及塑封层110。
芯片101，其具有正面和与正面相对的背面。
凸点102，其位于芯片101的正面。
金属热沉103，其通过热沉粘接材料111贴装在芯片101的背面。
绝缘层104，其具有第一面（上表面）和第二面（下表面）。
金属重布线互连结构105，其位于绝缘层104中。金属重布线互连结构105与凸点下金属化层106、金属柱108电连接。
凸点下金属化层106，其布置在金属重布线互连结构105上，且与凸点102通过焊料层112连接。凸点下金属化层106与芯片101电连接。
底填胶107，其布置在绝缘层104与芯片101之间。底填胶107用于保护凸点102与凸点下金属化层106的连接，增加连接的可靠性。
金属柱108，其布置在金属重布线互连结构105上。金属柱108与金属重布线互连结构105电连接。多个金属柱108位于芯片101的两侧。金属柱108的材料为导电金属材料，优选材料为铜。
焊球109，其与金属重布线互连结构105电连接。
塑封层110，塑封层110，其将绝缘层104至金属热沉103的上表面之间塑封。具体的，塑封层110将绝缘层104的第一面至金属热沉103的上表面之间塑封。金属热沉103的上表面和金属柱108的顶部露出塑封层110。
图4A至图4H示出了根据本发明的一种层叠封装的下封装体结构的形成过程示意图。
在步骤1，如图4A所示，在衬底301上通过涂覆形成临时键合牺牲层302。衬底可包括多种多样的半导体材料、如硅、锗、砷化镓、磷化铟等。可替代地，衬底也可由电学非导电材料、如玻璃、塑料、或蓝宝石晶片制成。
在步骤2，如图4B所示，在临时键合牺牲层302上形成绝缘层204和金属重布线互连结构205。通过涂覆、沉积等方法在临时键合牺牲层302上形成绝缘层204，然后刻蚀绝缘层204形成线路图形，在线路图形上电镀金属形成金属重布线层。多次重复步骤2得到金属重布线互连结构205。
在步骤3，如图4C所示，在金属重布线互连结构205上形成金属柱208和凸点下金属化层206。形成凸点下金属化层206时，先在绝缘层204上涂覆光刻胶，通过光刻去除中间部分的金属重布线互连结构205上方的光刻胶形成线路图形，在线路图形上电镀金属形成凸点下金属化层206，最后除去光刻胶。形成金属柱208时，先在绝缘层204上涂覆光刻胶，通过光刻去除边缘部分的金属重布线互连结构205上方的光刻胶形成多个孔，电镀孔形成金属柱，最后除去光刻胶。
在步骤4，如图4D所示，芯片201通过倒装贴片的方式焊接在凸点下金属化层206上，并在芯片201与绝缘层204之间填充底填胶207增加可靠性。通过将位于芯片201的正面的凸点202与凸点下金属化层206焊接实现芯片201的倒装贴片，其中焊料层212位于凸点202与凸点下金属化层206之间。通过底填工艺在芯片201与绝缘层204之间填充底填胶207。
在步骤5，如图4E所示，芯片201的背面贴装散热用的金属热沉 203。通过热沉粘接材料211将金属热沉 203与芯片201的背面粘接。
在步骤6，如图4F所示，进行晶圆塑封形成塑封层210。采用辅助薄膜封装技术将绝缘层204至金属热沉203的上表面之间塑封形成塑封层210，露出金属柱208的顶部和金属热沉203的上表面。塑封层的材料通常选用热固性或热塑性的树脂材料，可以使用的聚合物材料品种广泛，包括：聚酰亚胺PI、双苯环丁烯树脂BCB或者苯基苯并二恶唑树脂PBO、环氧树脂、有机硅和丙烯酸衍生物等。
在步骤7，如图4G所示，通过拆键合工艺去除衬底301和临时键合牺牲层302，露出部分金属重布线互连结构205。
在步骤8，如图4H所示，在露出的金属重布线互连结构205上布置焊球209，并将塑封晶圆切割，形成单个下封装体结构。
本发明至少具有下列有益效果：本发明公开的一种层叠封装的下封装体结构及其形成方法，采用多层金属重布线结构代替有机基板，可以在提升高速信号完整性的同时降低封装体的厚度；采用晶圆级工艺贴装金属热沉，金属热沉提升了芯片散热能力，采用晶圆级工艺提高了工艺效率；采用金属柱代替穿塑通孔层叠封装的Z方向连接，实现了更小的堆叠接口焊球节距，能够提升层叠封装的上封装和下封装之间的互联密度。
虽然本发明的一些实施方式已经在本申请文件中予以了描述，但是本领域技术人员能够理解，这些实施方式仅仅是作为示例示出的。本领域技术人员在本发明的教导下可以想到众多的变型方案、替代方案和改进方案而不超出本发明的范围。所附权利要求书旨在限定本发明的范围，并藉此涵盖这些权利要求本身及其等同变换的范围内的方法和结构。

Claims (9)

1.一种层叠封装的下封装体结构的形成方法，包括：
在衬底上形成临时键合牺牲层；
在临时键合牺牲层上形成绝缘层和金属重布线互连结构；
在金属重布线互连结构上形成金属柱和凸点下金属化层；
将芯片焊接在凸点下金属化层上，并在芯片与绝缘层之间填充底填胶；
芯片的背面贴装散热结构；
进行晶圆塑封形成塑封层；
去除衬底和临时键合牺牲层，露出部分金属重布线互连结构；以及
在露出的金属重布线互连结构上植球，并将塑封晶圆切割，形成单个下封装体结构。
2.根据权利要求1所述的层叠封装的下封装体结构的形成方法，其特征在于，形成所述凸点下金属化层时，先在所述绝缘层上涂覆光刻胶，通过光刻去除中间部分的金属重布线互连结构上方的光刻胶形成线路图形，在线路图形上电镀金属形成凸点下金属化层，最后除去光刻胶。
3.根据权利要求1所述的层叠封装的下封装体结构的形成方法，其特征在于，形成所述金属柱时，先在所述绝缘层上涂覆光刻胶，通过光刻去除边缘部分的金属重布线互连结构上方的光刻胶形成多个孔，电镀孔形成金属柱，最后除去光刻胶。
4.根据权利要求1所述的层叠封装的下封装体结构的形成方法，其特征在于，将位于所述芯片的正面的凸点与所述凸点下金属化层焊接。
5.根据权利要求1所述的层叠封装的下封装体结构的形成方法，其特征在于，所述散热结构是金属热沉，并且通过热沉粘接材料将所述金属热沉与所述芯片的背面粘接。
6.根据权利要求1所述的层叠封装的下封装体结构的形成方法，其特征在于，通过辅助薄膜封装技术将绝缘层至散热结构的上表面之间塑封形成塑封层，露出所述金属柱的顶部和所述散热结构的上表面。
7.通过权利要求1至6中的任一项所述的层叠封装的下封装体结构的形成方法形成的一种层叠封装的下封装体结构，包括：
芯片，其具有正面和与正面相对的背面；
凸点，其位于所述芯片的正面；
散热结构，其贴装在所述芯片的背面；
绝缘层；
金属重布线互连结构，其位于所述绝缘层中；
凸点下金属化层，其布置在所述金属重布线互连结构上，且与所述凸点焊接；
底填胶，其布置在所述绝缘层与所述芯片之间；
金属柱，其布置在所述金属重布线互连结构上；
焊球，其与所述金属重布线互连结构电连接；以及
塑封层，其将所述绝缘层至所述散热结构的上表面之间塑封。
8.根据权利要求7所述的层叠封装的下封装体结构，其特征在于，所述散热结构的上表面和所述金属柱的顶部露出所述塑封层。
9.根据权利要求7所述的层叠封装的下封装体结构，其特征在于，多个所述金属柱位于所述芯片的两侧。
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