JP2009111333A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2009111333A
JP2009111333A JP2008133712A JP2008133712A JP2009111333A JP 2009111333 A JP2009111333 A JP 2009111333A JP 2008133712 A JP2008133712 A JP 2008133712A JP 2008133712 A JP2008133712 A JP 2008133712A JP 2009111333 A JP2009111333 A JP 2009111333A
Authority
JP
Japan
Prior art keywords
signal wiring
semiconductor device
wiring
center
external terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008133712A
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English (en)
Japanese (ja)
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JP2009111333A5 (https=
Inventor
Michinari Tetani
道成 手谷
Minoru Fujisaku
実 藤作
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Priority to JP2008133712A priority Critical patent/JP2009111333A/ja
Priority to US12/207,790 priority patent/US8084859B2/en
Publication of JP2009111333A publication Critical patent/JP2009111333A/ja
Publication of JP2009111333A5 publication Critical patent/JP2009111333A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2008133712A 2007-10-12 2008-05-22 半導体装置 Pending JP2009111333A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008133712A JP2009111333A (ja) 2007-10-12 2008-05-22 半導体装置
US12/207,790 US8084859B2 (en) 2007-10-12 2008-09-10 Semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007265973 2007-10-12
JP2008133712A JP2009111333A (ja) 2007-10-12 2008-05-22 半導体装置

Publications (2)

Publication Number Publication Date
JP2009111333A true JP2009111333A (ja) 2009-05-21
JP2009111333A5 JP2009111333A5 (https=) 2011-06-23

Family

ID=40779469

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008133712A Pending JP2009111333A (ja) 2007-10-12 2008-05-22 半導体装置

Country Status (1)

Country Link
JP (1) JP2009111333A (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013508954A (ja) * 2009-10-23 2013-03-07 エーティーアイ・テクノロジーズ・ユーエルシー 半導体ダイにおける応力を軽減するためのルーティング層
US9035471B2 (en) 2009-10-23 2015-05-19 Ati Technologies Ulc Routing layer for mitigating stress in a semiconductor die
JP2016518730A (ja) * 2013-05-20 2016-06-23 クアルコム，インコーポレイテッド 上面および側壁保護のためのモールドを備える半導体デバイス

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6314452A (ja) * 1986-07-04 1988-01-21 Hitachi Chem Co Ltd 半導体装置
JPH0338043A (ja) * 1989-07-05 1991-02-19 Hitachi Ltd 半導体集積回路装置
JPH0574770A (ja) * 1991-07-09 1993-03-26 Yamaha Corp 半導体装置
JPH05109813A (ja) * 1991-10-19 1993-04-30 Nec Corp 半導体装置
JP2003068734A (ja) * 2001-08-23 2003-03-07 Seiko Epson Corp 半導体装置およびその製造方法
JP2003318177A (ja) * 2002-04-19 2003-11-07 Sharp Corp 半導体集積回路装置
JP2004273591A (ja) * 2003-03-06 2004-09-30 Seiko Epson Corp 半導体装置及びその製造方法
JP2005050963A (ja) * 2003-07-31 2005-02-24 Seiko Epson Corp 半導体装置、電子デバイス、電子機器および半導体装置の製造方法
JP2006032600A (ja) * 2004-07-15 2006-02-02 Nec Corp 半導体装置
JP2006066505A (ja) * 2004-08-25 2006-03-09 Fujikura Ltd 半導体装置およびこれを備えた電子機器

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6314452A (ja) * 1986-07-04 1988-01-21 Hitachi Chem Co Ltd 半導体装置
JPH0338043A (ja) * 1989-07-05 1991-02-19 Hitachi Ltd 半導体集積回路装置
JPH0574770A (ja) * 1991-07-09 1993-03-26 Yamaha Corp 半導体装置
JPH05109813A (ja) * 1991-10-19 1993-04-30 Nec Corp 半導体装置
JP2003068734A (ja) * 2001-08-23 2003-03-07 Seiko Epson Corp 半導体装置およびその製造方法
JP2003318177A (ja) * 2002-04-19 2003-11-07 Sharp Corp 半導体集積回路装置
JP2004273591A (ja) * 2003-03-06 2004-09-30 Seiko Epson Corp 半導体装置及びその製造方法
JP2005050963A (ja) * 2003-07-31 2005-02-24 Seiko Epson Corp 半導体装置、電子デバイス、電子機器および半導体装置の製造方法
JP2006032600A (ja) * 2004-07-15 2006-02-02 Nec Corp 半導体装置
JP2006066505A (ja) * 2004-08-25 2006-03-09 Fujikura Ltd 半導体装置およびこれを備えた電子機器

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013508954A (ja) * 2009-10-23 2013-03-07 エーティーアイ・テクノロジーズ・ユーエルシー 半導体ダイにおける応力を軽減するためのルーティング層
US9035471B2 (en) 2009-10-23 2015-05-19 Ati Technologies Ulc Routing layer for mitigating stress in a semiconductor die
US9059159B2 (en) 2009-10-23 2015-06-16 Ati Technologies Ulc Routing layer for mitigating stress in a semiconductor die
JP2016518730A (ja) * 2013-05-20 2016-06-23 クアルコム，インコーポレイテッド 上面および側壁保護のためのモールドを備える半導体デバイス
US10141202B2 (en) 2013-05-20 2018-11-27 Qualcomm Incorporated Semiconductor device comprising mold for top side and sidewall protection

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