JP2009026382A - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP2009026382A
JP2009026382A JP2007188328A JP2007188328A JP2009026382A JP 2009026382 A JP2009026382 A JP 2009026382A JP 2007188328 A JP2007188328 A JP 2007188328A JP 2007188328 A JP2007188328 A JP 2007188328A JP 2009026382 A JP2009026382 A JP 2009026382A
Authority
JP
Japan
Prior art keywords
memory device
semiconductor memory
bit line
memory cell
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2007188328A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009026382A5 (enExample
Inventor
Kazuo Ono
和夫 小埜
Riichiro Takemura
理一郎 竹村
Tomonori Sekiguchi
知紀 関口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2007188328A priority Critical patent/JP2009026382A/ja
Priority to TW097123709A priority patent/TW200917246A/zh
Priority to KR1020080067061A priority patent/KR100944058B1/ko
Priority to US12/172,198 priority patent/US7835171B2/en
Publication of JP2009026382A publication Critical patent/JP2009026382A/ja
Publication of JP2009026382A5 publication Critical patent/JP2009026382A5/ja
Priority to US12/916,499 priority patent/US20110044092A1/en
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/02—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0064—Verifying circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0009—RRAM elements whose operation depends upon chemical change
    • G11C13/0011—RRAM elements whose operation depends upon chemical change comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0064—Verifying circuits or methods
    • G11C2013/0066—Verify correct writing whilst writing is in progress, e.g. by detecting onset or cessation of current flow in cell and using the detector output to terminate writing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/009—Write using potential difference applied between cell electrodes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/50—Resistive cell structure aspects
    • G11C2213/52—Structure characterized by the electrode material, shape, etc.
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/79—Array wherein the access device being a transistor

Landscapes

  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
JP2007188328A 2007-07-19 2007-07-19 半導体記憶装置 Withdrawn JP2009026382A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2007188328A JP2009026382A (ja) 2007-07-19 2007-07-19 半導体記憶装置
TW097123709A TW200917246A (en) 2007-07-19 2008-06-25 Semiconductor memory device
KR1020080067061A KR100944058B1 (ko) 2007-07-19 2008-07-10 반도체 기억 장치
US12/172,198 US7835171B2 (en) 2007-07-19 2008-07-11 Semiconductor memory device
US12/916,499 US20110044092A1 (en) 2007-07-19 2010-10-30 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007188328A JP2009026382A (ja) 2007-07-19 2007-07-19 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2009026382A true JP2009026382A (ja) 2009-02-05
JP2009026382A5 JP2009026382A5 (enExample) 2010-04-30

Family

ID=40398066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007188328A Withdrawn JP2009026382A (ja) 2007-07-19 2007-07-19 半導体記憶装置

Country Status (4)

Country Link
US (2) US7835171B2 (enExample)
JP (1) JP2009026382A (enExample)
KR (1) KR100944058B1 (enExample)
TW (1) TW200917246A (enExample)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011045886A1 (ja) * 2009-10-15 2011-04-21 パナソニック株式会社 抵抗変化型不揮発性記憶装置
JP2011253595A (ja) * 2010-06-03 2011-12-15 Toshiba Corp 不揮発性半導体記憶装置
JP2012027972A (ja) * 2010-07-21 2012-02-09 Sony Corp 抵抗変化型メモリデバイスおよびその駆動方法
JP2012523061A (ja) * 2009-04-03 2012-09-27 サンディスク スリーディー，エルエルシー ダイオードを有するクロスポイント不揮発性メモリセルの書き込み方法
JP2013537678A (ja) * 2010-06-14 2013-10-03 クロスバー， インコーポレイテッド 抵抗性メモリーデバイスの書き込み及び消去スキーム
JP5337239B2 (ja) * 2009-04-27 2013-11-06 株式会社日立製作所 半導体装置
JPWO2012124314A1 (ja) * 2011-03-14 2014-07-17 パナソニック株式会社 不揮発性記憶素子の駆動方法及び不揮発性記憶装置
JP2014199959A (ja) * 2009-12-08 2014-10-23 日本電気株式会社 電気化学反応を利用した抵抗変化素子、並びにその製造方法及び動作方法
US9558801B2 (en) 2014-07-07 2017-01-31 Socionext Inc. Data holding circuit including latch circuit and storing circuit having MTJ elements and data recovery method

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009026382A (ja) * 2007-07-19 2009-02-05 Hitachi Ltd 半導体記憶装置
US8189365B2 (en) * 2007-11-21 2012-05-29 Nec Corporation Semiconductor device configuration method
JP5161697B2 (ja) * 2008-08-08 2013-03-13 株式会社東芝 不揮発性半導体記憶装置
CN102171764B (zh) * 2008-10-06 2014-08-27 株式会社日立制作所 半导体器件
IT1392578B1 (it) * 2008-12-30 2012-03-09 St Microelectronics Rousset Metodo di programmazione multilivello di celle di memoria a cambiamento di fase utilizzante impulsi di reset adattativi
JP2011258288A (ja) * 2010-06-10 2011-12-22 Toshiba Corp 半導体記憶装置
US8259485B2 (en) * 2010-08-31 2012-09-04 Hewlett-Packard Development Company, L.P. Multilayer structures having memory elements with varied resistance of switching layers
JP5626529B2 (ja) * 2011-02-08 2014-11-19 ソニー株式会社 記憶装置およびその動作方法
JP5694053B2 (ja) * 2011-05-26 2015-04-01 株式会社東芝 半導体記憶装置
US8619471B2 (en) 2011-07-27 2013-12-31 Micron Technology, Inc. Apparatuses and methods including memory array data line selection
CN103177761A (zh) * 2011-12-23 2013-06-26 北京大学 阻变存储设备及其操作方法
US9275731B1 (en) * 2012-10-05 2016-03-01 Marvell International Ltd. Systems and methods for increasing the read sensitivity of a resistive random access memory (RRAM)
US9042159B2 (en) 2012-10-15 2015-05-26 Marvell World Trade Ltd. Configuring resistive random access memory (RRAM) array for write operations
US9047945B2 (en) 2012-10-15 2015-06-02 Marvell World Trade Ltd. Systems and methods for reading resistive random access memory (RRAM) cells
US8885388B2 (en) 2012-10-24 2014-11-11 Marvell World Trade Ltd. Apparatus and method for reforming resistive memory cells
US9042162B2 (en) 2012-10-31 2015-05-26 Marvell World Trade Ltd. SRAM cells suitable for Fin field-effect transistor (FinFET) process
WO2014074362A1 (en) 2012-11-12 2014-05-15 Marvell World Trade Ltd. Concurrent use of sram cells with both nmos and pmos pass gates in a memory system
AT514477B1 (de) * 2013-07-05 2015-03-15 Nano Tecct Weiz Forschungsgmbh Speicher-Sensoranordnung mit einem Sensorelement und einem Speicher
KR102284643B1 (ko) * 2014-03-24 2021-07-30 고쿠리츠 다이가쿠 호진 도호쿠 다이가쿠 저항 변화형 기억 소자의 데이터 기록 장치
WO2016157719A1 (ja) * 2015-03-27 2016-10-06 パナソニックＩｐマネジメント株式会社 半導体記憶装置の書き換え方法及び半導体記憶装置
KR102401581B1 (ko) * 2015-10-26 2022-05-24 삼성전자주식회사 저항식 메모리 소자
KR102770122B1 (ko) 2016-10-24 2025-02-21 에스케이하이닉스 주식회사 전자 장치
KR102803096B1 (ko) 2016-10-28 2025-05-07 에스케이하이닉스 주식회사 전자 장치
CN112292727B (zh) * 2018-06-27 2024-05-24 北京时代全芯存储技术股份有限公司 记忆体驱动装置
JP2020205003A (ja) * 2019-06-19 2020-12-24 キオクシア株式会社 メモリシステム、メモリコントローラ、及び半導体記憶装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000076873A (ja) 1998-08-26 2000-03-14 Oki Micro Design:Kk メモリセルのしきい値電圧制御方法及び半導体記憶装置
JP4907011B2 (ja) 2001-04-27 2012-03-28 株式会社半導体エネルギー研究所 不揮発性メモリとその駆動方法、及び半導体装置
US7184301B2 (en) * 2002-11-27 2007-02-27 Nec Corporation Magnetic memory cell and magnetic random access memory using the same
JP4249992B2 (ja) 2002-12-04 2009-04-08 シャープ株式会社 半導体記憶装置及びメモリセルの書き込み並びに消去方法
JP4804133B2 (ja) * 2005-12-06 2011-11-02 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
JP2009026382A (ja) * 2007-07-19 2009-02-05 Hitachi Ltd 半導体記憶装置

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012523061A (ja) * 2009-04-03 2012-09-27 サンディスク スリーディー，エルエルシー ダイオードを有するクロスポイント不揮発性メモリセルの書き込み方法
JP5337239B2 (ja) * 2009-04-27 2013-11-06 株式会社日立製作所 半導体装置
WO2011045886A1 (ja) * 2009-10-15 2011-04-21 パナソニック株式会社 抵抗変化型不揮発性記憶装置
CN102197434A (zh) * 2009-10-15 2011-09-21 松下电器产业株式会社 电阻变化型非易失性存储装置
US8625328B2 (en) 2009-10-15 2014-01-07 Panasonic Corporation Variable resistance nonvolatile storage device
JP2014199959A (ja) * 2009-12-08 2014-10-23 日本電気株式会社 電気化学反応を利用した抵抗変化素子、並びにその製造方法及び動作方法
JP2011253595A (ja) * 2010-06-03 2011-12-15 Toshiba Corp 不揮発性半導体記憶装置
JP2013537678A (ja) * 2010-06-14 2013-10-03 クロスバー， インコーポレイテッド 抵抗性メモリーデバイスの書き込み及び消去スキーム
JP2012027972A (ja) * 2010-07-21 2012-02-09 Sony Corp 抵抗変化型メモリデバイスおよびその駆動方法
JPWO2012124314A1 (ja) * 2011-03-14 2014-07-17 パナソニック株式会社 不揮発性記憶素子の駆動方法及び不揮発性記憶装置
US9153319B2 (en) 2011-03-14 2015-10-06 Panasonic Intellectual Property Management Co., Ltd. Method for driving nonvolatile memory element, and nonvolatile memory device having a variable resistance element
US9558801B2 (en) 2014-07-07 2017-01-31 Socionext Inc. Data holding circuit including latch circuit and storing circuit having MTJ elements and data recovery method

Also Published As

Publication number Publication date
US20110044092A1 (en) 2011-02-24
TW200917246A (en) 2009-04-16
KR100944058B1 (ko) 2010-02-24
US20090262568A1 (en) 2009-10-22
US7835171B2 (en) 2010-11-16
KR20090009111A (ko) 2009-01-22

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