JP2009004441A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2009004441A JP2009004441A JP2007161493A JP2007161493A JP2009004441A JP 2009004441 A JP2009004441 A JP 2009004441A JP 2007161493 A JP2007161493 A JP 2007161493A JP 2007161493 A JP2007161493 A JP 2007161493A JP 2009004441 A JP2009004441 A JP 2009004441A
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Abstract
【解決手段】半導体基板2の表層部には、ソース領域13とディープN型ウェル8、N型ウェル10およびコンタクト領域11からなるドレイン領域とが間隔を空けて形成されている。半導体基板2上には、ゲート絶縁膜14が形成されている。そして、ドレイン領域とゲート絶縁膜14との間には、ドレイン−ゲート分離部9が介在されている。このドレイン−ゲート分離部9によって、ドレイン領域とゲート絶縁膜14とは、それらの間に間隔を空けた非接触な状態に分離されている。
【選択図】図1
Description
図4は、MOSFETの基本的な構造を示す断面図である。
MOSFETは、たとえば、シリコン基板101の表層部に、チャネル領域102を挟んで、ソース領域103およびドレイン領域104を備えている。チャネル領域102上には、ソース領域103とドレイン領域104とに跨るように、SiO2(酸化シリコン)からなるゲート酸化膜105が形成されている。そして、ゲート酸化膜105上には、ポリシリコンからなるゲート電極106が形成されている。
また、図4に示す構造のMOSFETでは、ドレイン領域104にサージ電圧が入力されると、ゲート酸化膜105におけるドレイン領域104側の端部にサージ電流が集中して流れ、その部分でゲート酸化膜105が破壊(いわゆるESD(Electro Static Discharge)破壊)されるおそれがある。DMOSFETにおいても、ゲート酸化膜がドレイン領域として機能するエピタキシャル層と接しているので、その部分でゲート酸化膜のESD破壊を生じるおそれがある。
たとえば、請求項2に記載のように、前記半導体装置は、前記ソース領域、前記ドレイン領域、前記ゲート酸化膜および前記ゲート電極を備えるMOSトランジスタとともに、CMOS(Complementary Metal Oxide Semiconductor)トランジスタを備えていてもよい。この場合、前記半導体層の表面から掘り下がった溝に絶縁体を埋設することにより素子分離部が形成され、この素子分離部によって、前記MOSトランジスタと前記CMOSトランジスタとが分離されてもよい。
図1は、本発明の一実施形態に係る半導体装置の構造を示す断面図である。
半導体装置1は、P型の半導体基板(たとえば、シリコン基板)2上に、HVNMOSFET(高耐圧NMOSFET)3、MVCMOSFET(中耐圧CMOSFET)4およびLVCMOSFET(低耐圧CMOSFET)トランジスタ5を備えている。
また、HVNMOSFET形成領域には、素子分離部7と同じ構造を有するドレイン−ゲート分離部9が形成されている。すなわち、ドレイン−ゲート分離部9は、半導体基板2の表面から素子分離部7と同じ深さに掘り下がった溝に、素子分離部7と同じ絶縁体を埋設した構造を有している。ドレイン−ゲート分離部9は、素子分離部7のドレイン側部分に対して、それらの対向方向におけるディープN型ウェル8の幅よりも狭い間隔を空けて、平行をなして延びている。ドレイン−ゲート分離部9の最深部は、ディープN型ウェル8内に位置している。
N型ウェル10の表層部、具体的に半導体基板2の表面とディープN型ウェル8との間には、N型ウェル10よりもN型不純物が高濃度にドープされたN+型のコンタクト領域11が形成されている。
なお、以下では、素子分離部7におけるドレイン側部分と対向する辺を「ソース側部分」という。
P型ウェル12の表層部には、素子分離部7のソース側部分に沿って、N型のソース領域13が形成されている。ソース領域13は、素子分離部7のソース側部分と接している。また、ソース領域13は、そのソース側部分に接する側と反対側の端縁がP型ウェル12の周縁よりもソース側部分寄りに位置し、ディープN型ウェル8に対して適当な間隔を空けて離間している。
ゲート電極15の周囲には、SiN(窒化シリコン)からなるサイドウォール16が形成されている。このサイドウォール16によって、ゲート電極15の側面が取り囲まれて覆われている。また、ドレイン−ゲート分離部9およびサイドウォール16によって、ゲート絶縁膜14の側面が取り囲まれて覆われている。
MVCMOSFET4が形成される領域には、ディープN型ウェル19が形成されている。また、その領域には、素子分離部7と同じ構造を有するPN分離部20が形成されている。すなわち、PN分離部20は、半導体基板2の表面から素子分離部7と同じ深さに掘り下がった溝に、素子分離部7と同じ絶縁体を埋設した構造を有している。このPN分離部20によって、MVCMOSFETが形成される領域は、NMOSFET17が形成されるNMOSFET形成領域と、PMOSFET18が形成されるPMOSFET形成領域とに分けられている。
LVCMOSFET5が形成される領域には、ディープN型ウェル37が形成されている。
図2A〜図2Eは、半導体装置1の製造方法を工程順に示す図解的な断面図である。
まず、図2Aに示すように、反応性イオンエッチングにより、半導体基板2の表層部に、素子分離部7、ドレイン−ゲート分離部9、PN分離部20,38に対応する溝が形成される。その後、HDP−CVD(High Density Plasma Chemical Vapor Deposition:高密度プラズマ化学的気相蒸着)法により、半導体基板2上に、SiO2膜が各溝を埋め尽くす厚さに堆積される。そして、SiO2膜における各溝外にはみ出た部分が選択的に除去され、各溝上にのみSiO2膜が残されることにより、素子分離部7、ドレイン−ゲート分離部9およびPN分離部20,38が形成される。SiO2膜の選択的な除去は、CMP(Chemical Mechanical Polishing:化学的機械的研磨)法により達成することができる。
この製造方法によれば、ドレイン−ゲート分離部9を、素子分離部7、PN分離部20,38と同じ工程で形成することができる。また、MVCMOSFET4およびLVCMOSFET5を形成する過程で、HVNMOSFET3を形成することができる。したがって、MVCMOSFET4およびLVCMOSFET5の製造工程に新たな工程を追加することなく、MVCMOSFET4およびLVCMOSFET5が搭載される半導体基板2上に、HVNMOSFET3を形成することができる。
図3は、本発明の他の実施形態に係る半導体装置の構造を示す図解的な断面図である。この図3において、図1に示す各部に相当する部分には、それらの各部と同一の参照符号を付して示している。
以上、本発明の実施形態を説明したが、本発明は他の形態で実施することもできる。たとえば、高耐圧MOSFETとして、HVNMOSFET3を例にとったが、このHVNMOSFET3に代えて、HVNMOSFET3における各半導体部分の導電型を反転した(N型の部分がP型である)構造を有する、高耐圧PMOSFETが半導体基板2に搭載されてもよい。
2 半導体基板(半導体層)
3 HVNMOSFET
4 MVCMOSFET
5 LVCMOSFET
6 P型エピタキシャル層(半導体層)
7 素子分離部
8 ディープN型ウェル
9 ドレイン−ゲート分離部
10 N型ウェル
11 コンタクト領域
13 ソース領域
14 ゲート絶縁膜
15 ゲート電極
Claims (3)
- 半導体層と、
前記半導体層の表層部に形成されるソース領域と、
前記半導体層の表層部に前記ソース領域と間隔を空けて形成されるドレイン領域と、
前記半導体層の表面上において、前記ソース領域と前記ドレイン領域との間に対向する領域に形成されるゲート絶縁膜と、
前記ゲート絶縁膜上に形成されるゲート電極と、
前記ドレイン領域と前記ゲート絶縁膜との間に介在され、前記ドレイン領域と前記ゲート絶縁膜とを非接触状態に分離するためのドレイン−ゲート分離部とを含む、半導体装置。 - CMOSトランジスタと、
前記半導体層の表面から掘り下がった溝に絶縁体を埋設することにより形成され、前記ソース領域、前記ドレイン領域、前記ゲート酸化膜および前記ゲート電極を備えるMOSトランジスタと前記CMOSトランジスタとを分離するための素子分離部とを含む、請求項1に記載の半導体装置。 - 前記ドレイン−ゲート分離部は、前記半導体層の表面から前記素子分離部と同じ深さに掘り下がった溝に、前記素子分離部に埋設される絶縁体と同じ絶縁体を埋設することにより形成されている、請求項2に記載の半導体装置。
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08213601A (ja) * | 1995-01-31 | 1996-08-20 | Sanyo Electric Co Ltd | 半導体装置とその製造方法 |
US6172401B1 (en) * | 1998-06-30 | 2001-01-09 | Intel Corporation | Transistor device configurations for high voltage applications and improved device performance |
JP2001168210A (ja) * | 1999-10-27 | 2001-06-22 | Texas Instr Inc <Ti> | 集積回路用ドレイン拡張型トランジスタ |
JP2006156990A (ja) * | 2004-11-29 | 2006-06-15 | Taiwan Semiconductor Manufacturing Co Ltd | 半導体デバイスおよび半導体デバイスの製造方法 |
JP2006237341A (ja) * | 2005-02-25 | 2006-09-07 | Seiko Epson Corp | 半導体装置の製造方法及び半導体装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09312399A (ja) * | 1995-07-14 | 1997-12-02 | Seiko Instr Inc | 半導体装置とその製造方法 |
EP0915508A1 (en) * | 1997-10-10 | 1999-05-12 | STMicroelectronics S.r.l. | Integrated circuit with highly efficient junction insulation |
JP3298483B2 (ja) | 1997-12-24 | 2002-07-02 | 日本電気株式会社 | 高耐圧mosfetの製造方法 |
JP3743486B2 (ja) * | 1999-06-23 | 2006-02-08 | セイコーエプソン株式会社 | 不揮発性メモリトランジスタを含む半導体装置の製造方法 |
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JP4407794B2 (ja) * | 2003-07-25 | 2010-02-03 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
JP2005251973A (ja) * | 2004-03-04 | 2005-09-15 | Fujitsu Ltd | 半導体装置の製造方法と半導体装置 |
JP2006210584A (ja) * | 2005-01-27 | 2006-08-10 | Seiko Epson Corp | 半導体装置およびその製造方法 |
US7375408B2 (en) * | 2005-10-11 | 2008-05-20 | United Microelectronics Corp. | Fabricating method of a high voltage metal oxide semiconductor device |
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08213601A (ja) * | 1995-01-31 | 1996-08-20 | Sanyo Electric Co Ltd | 半導体装置とその製造方法 |
US6172401B1 (en) * | 1998-06-30 | 2001-01-09 | Intel Corporation | Transistor device configurations for high voltage applications and improved device performance |
JP2001168210A (ja) * | 1999-10-27 | 2001-06-22 | Texas Instr Inc <Ti> | 集積回路用ドレイン拡張型トランジスタ |
JP2006156990A (ja) * | 2004-11-29 | 2006-06-15 | Taiwan Semiconductor Manufacturing Co Ltd | 半導体デバイスおよび半導体デバイスの製造方法 |
JP2006237341A (ja) * | 2005-02-25 | 2006-09-07 | Seiko Epson Corp | 半導体装置の製造方法及び半導体装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8477124B2 (en) | 2009-12-22 | 2013-07-02 | Renesas Electronics Corporation | Semiconductor device |
JP2015038972A (ja) * | 2013-08-19 | 2015-02-26 | 力旺電子股▲ふん▼有限公司 | 高電圧電力制御システム |
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