JP2007299802A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2007299802A JP2007299802A JP2006124252A JP2006124252A JP2007299802A JP 2007299802 A JP2007299802 A JP 2007299802A JP 2006124252 A JP2006124252 A JP 2006124252A JP 2006124252 A JP2006124252 A JP 2006124252A JP 2007299802 A JP2007299802 A JP 2007299802A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- semiconductor
- region
- semiconductor layer
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 206
- 239000010410 layer Substances 0.000 claims abstract description 105
- 239000000758 substrate Substances 0.000 claims abstract description 62
- 239000002344 surface layer Substances 0.000 claims abstract description 24
- 230000015556 catabolic process Effects 0.000 abstract description 24
- 239000012535 impurity Substances 0.000 description 20
- 238000010586 diagram Methods 0.000 description 11
- 238000004088 simulation Methods 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000013459 approach Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 241000257465 Echinoidea Species 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7824—Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0873—Drain regions
- H01L29/0878—Impurity concentration or distribution
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Abstract
【解決手段】第1導電型の半導体基板(埋め込み酸化膜3を有するSOI基板10)の表層部に、第1導電型チャネルの横型MOSトランジスタが形成されてなる半導体装置であって、横型MOSトランジスタのソース領域8とドレイン領域5の間において、第1半導体層1aに、基板表面から所定の深さで、第1導電型で第1半導体層1a(n−)より高濃度の第2半導体層6a(n)が形成されてなる半導体装置100とする。
【選択図】図1
Description
10 半導体基板(SOI基板)
1 SOI層
1a 第1半導体層
1b 第3半導体層
2 支持基板
3 埋め込み酸化膜
4 LOCOS酸化膜
5 ドレイン領域
6 追加ドレイン領域
6a 第2半導体層
7 ベース領域
7a 追加ベース領域
7b 第2追加ベース領域
8 ソース領域
Claims (8)
- 第1導電型の半導体基板の表層部に、第1導電型チャネルの横型MOSトランジスタが形成されてなる半導体装置であって、
前記横型MOSトランジスタのソース領域とドレイン領域の間において、前記半導体基板からなる第1半導体層に、基板表面から所定の深さで、第1導電型で前記第1半導体層より高濃度の第2半導体層が形成されてなることを特徴とする半導体装置。 - 前記半導体基板が、埋め込み酸化膜を有するSOI基板であって、
前記第1半導体層が、前記埋め込み酸化膜上のSOI層であることを特徴とする請求項1に記載の半導体装置。 - 前記第1半導体層の表層部において、第2導電型のベース領域が形成され、
前記第1半導体層の表層部において、基板面内で前記ベース領域内に含まれるように配置され、基板断面において前記ベース領域より深い、第2導電型で前記ベース領域より高濃度の追加ベース領域が形成され、
前記ベース領域の表層部において、第1導電型の前記ソース領域が形成され、
前記第1半導体層の表層部において、基板面内で前記ベース領域から離間するように配置され、第1導電型で前記第2半導体層より高濃度の追加ドレイン領域が形成され、
前記ドレイン領域の表層部において、第1導電型で前記追加ドレイン領域より高濃度の前記ドレイン領域が形成されてなることを特徴とする請求項1または2に記載の半導体装置。 - 第2導電型で前記ベース領域より低濃度の第2追加ベース領域が、基板面内で前記ベース領域を取り囲み前記追加ドレイン領域から離間するように、基板断面において前記ベース領域より深い位置で前記半導体基板中に形成されてなることを特徴とする請求項3に記載の半導体装置。
- 前記第2半導体層が、前記追加ベース領域より浅く形成されてなることを特徴とする請求項3または4に記載の半導体装置。
- 前記第1導電型が、N導電型であり、
前記第2半導体層の濃度が、3×1015[1/cm3]以上、10×1015[1/cm3]以下であることを特徴とする請求項1乃至5のいずれか一項に記載の半導体装置。 - 前記ソース領域とドレイン領域が、基板面内において市松模様の格子状に配置されてなることを特徴とする請求項6に記載の半導体装置。
- 前記ソース領域とドレイン領域が、基板面内においてストライプ状に配置されてなり、
前記第2半導体層の濃度が、6×1015[1/cm3]以上、10×1015[1/cm3]以下であることを特徴とする請求項6に記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006124252A JP4952042B2 (ja) | 2006-04-27 | 2006-04-27 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006124252A JP4952042B2 (ja) | 2006-04-27 | 2006-04-27 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007299802A true JP2007299802A (ja) | 2007-11-15 |
JP4952042B2 JP4952042B2 (ja) | 2012-06-13 |
Family
ID=38769081
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006124252A Expired - Fee Related JP4952042B2 (ja) | 2006-04-27 | 2006-04-27 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4952042B2 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010219151A (ja) * | 2009-03-13 | 2010-09-30 | Furukawa Electric Co Ltd:The | 電界効果トランジスタ |
JP2011181709A (ja) * | 2010-03-02 | 2011-09-15 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2020145300A (ja) * | 2019-03-06 | 2020-09-10 | 株式会社東芝 | 半導体装置及びその製造方法 |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015141996A (ja) | 2014-01-28 | 2015-08-03 | 株式会社東芝 | 半導体装置及びその製造方法 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08181321A (ja) * | 1994-12-26 | 1996-07-12 | Matsushita Electric Works Ltd | Soi基板及びその製造方法 |
JP2000307120A (ja) * | 1999-04-23 | 2000-11-02 | Matsushita Electric Works Ltd | 半導体装置 |
JP2001102586A (ja) * | 1999-09-28 | 2001-04-13 | Toshiba Corp | 高耐圧半導体装置 |
JP2002270844A (ja) * | 2001-03-07 | 2002-09-20 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2003318404A (ja) * | 2002-04-25 | 2003-11-07 | Nec Kansai Ltd | 横型パワーmosトランジスタおよびその製造方法 |
JP2004063918A (ja) * | 2002-07-31 | 2004-02-26 | Nec Kansai Ltd | 横型mosトランジスタ |
JP2005332891A (ja) * | 2004-05-18 | 2005-12-02 | Denso Corp | 半導体装置 |
JP2006019508A (ja) * | 2004-07-01 | 2006-01-19 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
-
2006
- 2006-04-27 JP JP2006124252A patent/JP4952042B2/ja not_active Expired - Fee Related
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08181321A (ja) * | 1994-12-26 | 1996-07-12 | Matsushita Electric Works Ltd | Soi基板及びその製造方法 |
JP2000307120A (ja) * | 1999-04-23 | 2000-11-02 | Matsushita Electric Works Ltd | 半導体装置 |
JP2001102586A (ja) * | 1999-09-28 | 2001-04-13 | Toshiba Corp | 高耐圧半導体装置 |
JP2002270844A (ja) * | 2001-03-07 | 2002-09-20 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2003318404A (ja) * | 2002-04-25 | 2003-11-07 | Nec Kansai Ltd | 横型パワーmosトランジスタおよびその製造方法 |
JP2004063918A (ja) * | 2002-07-31 | 2004-02-26 | Nec Kansai Ltd | 横型mosトランジスタ |
JP2005332891A (ja) * | 2004-05-18 | 2005-12-02 | Denso Corp | 半導体装置 |
JP2006019508A (ja) * | 2004-07-01 | 2006-01-19 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010219151A (ja) * | 2009-03-13 | 2010-09-30 | Furukawa Electric Co Ltd:The | 電界効果トランジスタ |
JP2011181709A (ja) * | 2010-03-02 | 2011-09-15 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2020145300A (ja) * | 2019-03-06 | 2020-09-10 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP7148440B2 (ja) | 2019-03-06 | 2022-10-05 | 株式会社東芝 | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
JP4952042B2 (ja) | 2012-06-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5641131B2 (ja) | 半導体装置およびその製造方法 | |
US7964915B2 (en) | Semiconductor device having a DMOS structure | |
CN105448712B (zh) | 半导体装置的制造方法 | |
US8174066B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
US7511319B2 (en) | Methods and apparatus for a stepped-drift MOSFET | |
JP4972855B2 (ja) | 半導体装置およびその製造方法 | |
US20060001110A1 (en) | Lateral trench MOSFET | |
JP2017045884A (ja) | 半導体装置および半導体装置の製造方法 | |
US20130056790A1 (en) | Semiconductor device and method for manufacturing same | |
JP2008140817A (ja) | 半導体装置 | |
TW201801318A (zh) | 半導體裝置及半導體裝置之製造方法 | |
JP2009088199A (ja) | 半導体装置 | |
JP2009164460A (ja) | 半導体装置 | |
US7705399B2 (en) | Semiconductor device with field insulation film formed therein | |
KR20160002642A (ko) | 반도체 장치 및 그 제조 방법 | |
JP7090073B2 (ja) | 半導体装置 | |
JP4952042B2 (ja) | 半導体装置 | |
JP2005101334A (ja) | 半導体装置およびその製造方法 | |
JP2009152442A (ja) | 半導体装置及びその製造方法 | |
JP2005347367A (ja) | 半導体装置とその製造方法 | |
JP2009038214A (ja) | 半導体装置 | |
JP2008066508A (ja) | 半導体装置 | |
JP2004200441A (ja) | 半導体装置とその製造方法 | |
JP2019160901A (ja) | 半導体装置 | |
JP2010016284A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20080521 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20110907 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110913 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20111108 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120214 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120227 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150323 Year of fee payment: 3 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |