JP2008547220A5 - - Google Patents

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Publication number
JP2008547220A5
JP2008547220A5 JP2008518181A JP2008518181A JP2008547220A5 JP 2008547220 A5 JP2008547220 A5 JP 2008547220A5 JP 2008518181 A JP2008518181 A JP 2008518181A JP 2008518181 A JP2008518181 A JP 2008518181A JP 2008547220 A5 JP2008547220 A5 JP 2008547220A5
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JP
Japan
Prior art keywords
silicon oxynitride
annealing
oxynitride film
partial pressure
film
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JP2008518181A
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English (en)
Japanese (ja)
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JP2008547220A (ja
JP5072837B2 (ja
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Priority claimed from US11/167,526 external-priority patent/US7429538B2/en
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Publication of JP2008547220A publication Critical patent/JP2008547220A/ja
Publication of JP2008547220A5 publication Critical patent/JP2008547220A5/ja
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Publication of JP5072837B2 publication Critical patent/JP5072837B2/ja
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JP2008518181A 2005-06-27 2006-05-26 プラズマ窒化したゲート誘電体を2段階式で窒化後アニーリングするための改善された製造方法 Active JP5072837B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/167,526 2005-06-27
US11/167,526 US7429538B2 (en) 2005-06-27 2005-06-27 Manufacturing method for two-step post nitridation annealing of plasma nitrided gate dielectric
PCT/US2006/020508 WO2007001709A2 (en) 2005-06-27 2006-05-26 Improved manufacturing method for two-step post nitridation annealing of plasma nitrided gate dielectric

Publications (3)

Publication Number Publication Date
JP2008547220A JP2008547220A (ja) 2008-12-25
JP2008547220A5 true JP2008547220A5 (enExample) 2011-08-11
JP5072837B2 JP5072837B2 (ja) 2012-11-14

Family

ID=37568096

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008518181A Active JP5072837B2 (ja) 2005-06-27 2006-05-26 プラズマ窒化したゲート誘電体を2段階式で窒化後アニーリングするための改善された製造方法

Country Status (6)

Country Link
US (1) US7429538B2 (enExample)
JP (1) JP5072837B2 (enExample)
KR (1) KR100993124B1 (enExample)
CN (1) CN101208782B (enExample)
TW (1) TWI343604B (enExample)
WO (1) WO2007001709A2 (enExample)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007281181A (ja) * 2006-04-06 2007-10-25 Elpida Memory Inc 半導体装置の製造方法
US20080274626A1 (en) * 2007-05-04 2008-11-06 Frederique Glowacki Method for depositing a high quality silicon dielectric film on a germanium substrate with high quality interface
US7910446B2 (en) * 2007-07-16 2011-03-22 Applied Materials, Inc. Integrated scheme for forming inter-poly dielectrics for non-volatile memory devices
US7638442B2 (en) * 2008-05-09 2009-12-29 Promos Technologies, Inc. Method of forming a silicon nitride layer on a gate oxide film of a semiconductor device and annealing the nitride layer
JP2010021378A (ja) * 2008-07-11 2010-01-28 Tokyo Electron Ltd シリコン酸窒化膜の形成方法および形成装置
CN101685766B (zh) * 2008-09-23 2011-09-07 中芯国际集成电路制造(上海)有限公司 增加热处理反应室利用率的方法
KR101008994B1 (ko) 2009-05-13 2011-01-17 주식회사 하이닉스반도체 듀얼 폴리 게이트의 산화막 형성 방법
WO2011097178A2 (en) * 2010-02-02 2011-08-11 Applied Materials, Inc. Methods for nitridation and oxidation
US8450221B2 (en) * 2010-08-04 2013-05-28 Texas Instruments Incorporated Method of forming MOS transistors including SiON gate dielectric with enhanced nitrogen concentration at its sidewalls
JP2012079785A (ja) * 2010-09-30 2012-04-19 Tokyo Electron Ltd 絶縁膜の改質方法
US20120270411A1 (en) * 2011-04-25 2012-10-25 Nanya Technology Corporation Manufacturing method of gate dielectric layer
KR101858524B1 (ko) 2011-05-26 2018-05-18 삼성전자주식회사 반도체 소자의 제조 방법
US8394688B2 (en) 2011-06-27 2013-03-12 United Microelectronics Corp. Process for forming repair layer and MOS transistor having repair layer
US8741784B2 (en) 2011-09-20 2014-06-03 United Microelectronics Corp. Process for fabricating semiconductor device and method of fabricating metal oxide semiconductor device
US9634083B2 (en) 2012-12-10 2017-04-25 United Microelectronics Corp. Semiconductor structure and process thereof
CN103887337A (zh) * 2012-12-21 2014-06-25 联华电子股份有限公司 半导体结构及其制作工艺
US9824881B2 (en) 2013-03-14 2017-11-21 Asm Ip Holding B.V. Si precursors for deposition of SiN at low temperatures
US9564309B2 (en) 2013-03-14 2017-02-07 Asm Ip Holding B.V. Si precursors for deposition of SiN at low temperatures
JP2015142034A (ja) * 2014-01-29 2015-08-03 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN103943475A (zh) * 2014-02-21 2014-07-23 上海华力微电子有限公司 一种提高栅氧化物介电常数的方法
CN103855035A (zh) * 2014-03-27 2014-06-11 上海华力微电子有限公司 一种制备栅介质层的设备
US9576792B2 (en) 2014-09-17 2017-02-21 Asm Ip Holding B.V. Deposition of SiN
US9761687B2 (en) 2015-01-04 2017-09-12 United Microelectronics Corp. Method of forming gate dielectric layer for MOS transistor
US10410857B2 (en) * 2015-08-24 2019-09-10 Asm Ip Holding B.V. Formation of SiN thin films
TWI679703B (zh) * 2016-04-25 2019-12-11 聯華電子股份有限公司 閘介電層的製造方法
US10103027B2 (en) 2016-06-20 2018-10-16 Applied Materials, Inc. Hydrogenation and nitridization processes for modifying effective oxide thickness of a film
US10510545B2 (en) 2016-06-20 2019-12-17 Applied Materials, Inc. Hydrogenation and nitridization processes for modifying effective oxide thickness of a film
CN109003879B (zh) * 2017-06-06 2021-03-19 中芯国际集成电路制造(上海)有限公司 栅介质层的形成方法
WO2019032457A1 (en) * 2017-08-08 2019-02-14 Applied Materials, Inc. METHODS AND APPARATUSES FOR DEPOSITING LOW DIELECTRIC CONSTANT FILMS
WO2021150625A1 (en) 2020-01-23 2021-07-29 Applied Materials, Inc. Method of cleaning a structure and method of depositiing a capping layer in a structure
KR20220081905A (ko) 2020-12-09 2022-06-16 에이에스엠 아이피 홀딩 비.브이. 실리콘 질화물 증착용 실리콘 전구체
CN116197739B (zh) * 2023-05-05 2023-07-14 松诺盟科技有限公司 氢压力传感器芯体弹性体的表面处理工艺、弹性体及应用
US20240405096A1 (en) * 2023-06-02 2024-12-05 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of manufacture

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2641385B2 (ja) * 1993-09-24 1997-08-13 アプライド マテリアルズ インコーポレイテッド 膜形成方法
KR100207467B1 (ko) * 1996-02-29 1999-07-15 윤종용 반도체 장치의 커패시터 제조 방법
KR100207485B1 (ko) * 1996-07-23 1999-07-15 윤종용 반도체장치의 커패시터 제조방법
US6268267B1 (en) * 2000-01-24 2001-07-31 Taiwan Semiconductor Manufacturing Company Silicon-oxynitride-oxide (SXO) continuity film pad to recessed bird's beak of LOCOS
US6509604B1 (en) * 2000-01-26 2003-01-21 Advanced Micro Devices, Inc. Nitridation barriers for nitridated tunnel oxide for circuitry for flash technology and for LOCOS/STI isolation
US6548368B1 (en) * 2000-08-23 2003-04-15 Applied Materials, Inc. Method of forming a MIS capacitor
US6365518B1 (en) * 2001-03-26 2002-04-02 Applied Materials, Inc. Method of processing a substrate in a processing chamber
US6632747B2 (en) * 2001-06-20 2003-10-14 Texas Instruments Incorporated Method of ammonia annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile
US6610614B2 (en) * 2001-06-20 2003-08-26 Texas Instruments Incorporated Method for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates
US6503846B1 (en) * 2001-06-20 2003-01-07 Texas Instruments Incorporated Temperature spike for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates
US6548366B2 (en) * 2001-06-20 2003-04-15 Texas Instruments Incorporated Method of two-step annealing of ultra-thin silicon dioxide layers for uniform nitrogen profile
KR100532409B1 (ko) * 2001-08-14 2005-11-30 삼성전자주식회사 유전체막과 상부 전극 계면에서의 누설 전류 특성이개선된 반도체 소자의 커패시터 형성 방법
US20030082884A1 (en) * 2001-10-26 2003-05-01 International Business Machine Corporation And Kabushiki Kaisha Toshiba Method of forming low-leakage dielectric layer
US20030109146A1 (en) * 2001-12-12 2003-06-12 Luigi Colombo Oxynitride device and method using non-stoichiometric silicon oxide
US20030111678A1 (en) * 2001-12-14 2003-06-19 Luigi Colombo CVD deposition of M-SION gate dielectrics
WO2003107399A2 (en) * 2002-06-12 2003-12-24 Applied Materials, Inc. Method for improving nitrogen profile in plasma nitrided gate dielectric layers
US20080090425A9 (en) * 2002-06-12 2008-04-17 Christopher Olsen Two-step post nitridation annealing for lower EOT plasma nitrided gate dielectrics
US6831021B2 (en) * 2002-06-12 2004-12-14 Applied Materials, Inc. Plasma method and apparatus for processing a substrate
US6858547B2 (en) * 2002-06-14 2005-02-22 Applied Materials, Inc. System and method for forming a gate dielectric
US6780720B2 (en) * 2002-07-01 2004-08-24 International Business Machines Corporation Method for fabricating a nitrided silicon-oxide gate dielectric
JP2004247528A (ja) * 2003-02-14 2004-09-02 Sony Corp 半導体装置の製造方法
US7514376B2 (en) * 2003-04-30 2009-04-07 Fujitsu Microelectronics Limited Manufacture of semiconductor device having nitridized insulating film
US7179754B2 (en) * 2003-05-28 2007-02-20 Applied Materials, Inc. Method and apparatus for plasma nitridation of gate dielectrics using amplitude modulated radio-frequency energy
JPWO2005004224A1 (ja) * 2003-07-01 2007-09-20 日本電気株式会社 半導体装置及びその製造方法
JP4261276B2 (ja) * 2003-08-15 2009-04-30 パナソニック株式会社 半導体装置の製造方法
US7291568B2 (en) * 2003-08-26 2007-11-06 International Business Machines Corporation Method for fabricating a nitrided silicon-oxide gate dielectric
US20050130448A1 (en) * 2003-12-15 2005-06-16 Applied Materials, Inc. Method of forming a silicon oxynitride layer
TW200620471A (en) * 2004-08-31 2006-06-16 Tokyo Electron Ltd Silicon oxide film forming method, semiconductor device manufacturing method and computer storage medium
JP4965849B2 (ja) * 2004-11-04 2012-07-04 東京エレクトロン株式会社 絶縁膜形成方法およびコンピュータ記録媒体
KR101005953B1 (ko) * 2004-11-04 2011-01-05 도쿄엘렉트론가부시키가이샤 절연막 형성 방법

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